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from 99402db0aa1 [DEBUGINFO, NVPTX] Try to pack bytes data into a single string. new 31fda7550e7 [FPEnv] Convert more BinaryOperator::isFNeg(...) to m_FNeg(...) new a9c48593d99 [llvm-mca] Refactor class SourceMgr. NFCI new c26bd2324dd [InstCombine] try harder to form select from logic ops (2nd try) new 0ca5e5ea617 IR: Optimize FunctionType::get to perform one hash lookup i [...] new ed350b9c592 [InstCombine] add test for select with shuffled condition ( [...] new 8ae5d120406 [LegalizeDAG] ExpandLegalINT_TO_FP - cleanup UINT_TO_FP i64 [...] new 3f46d1d9fae [llvm-mca] Remove dependency from InstrBuilder in class Ins [...] new 95f42d0b8c4 [InstCombine] add test for ComputeNumSignBits with shuffle; NFC new e781359f6e6 [CodeGen] skip lifetime end marker in isInTailCallPosition new b3b0836b9b3 [CostModel][X86] Enable non-uniform vector division by cons [...] new a1d58c65372 [X86] Bring back the MOV64r0 pseudo instruction new 048958afe03 [docs] Add rawspeed to test-suite proposals. new 3be6adfc140 [Hexagon] Flip hexagon-autohvx to be true by default new fdd0e51f3ee ARM: Use BKPT instead of TRAP to implement llvm.debugtrap. new 5b4f9ef85eb [CostModel][X86] Add vXi8 vector division by constants costs. new 0c69da83b35 [hot-cold-split] Name split functions with ".cold" suffix new 3cc8b4921a6 [TargetLowering] Add SimplifyDemandedBitsForTargetNode callback new 24c5a02353e [X86][SSE] Add SimplifyDemandedBitsForTargetNode PMULDQ/PMU [...] new c76c43b05e9 [X86] Explicitly list all KNL features of inheriting from IVB. NFC new e65789f9913 [llvm-mca] Simplify the logic in FetchStage. NFCI new b0a35e2f85d [AArch64] Fix overlapping instructions new 07660eab690 [AArch64] Refactor Exynos machine model (NFC) new 55134c631c6 AArch64: add a pass to compress jump-table entries when possible. new 3435941b05c [MC] Separate masm integer literal lexer support from inline asm new 679afabe4ef [llvm-mca] Replace InstRef::isValid with operator bool. NFC. new e7543196c95 [ExecutionEngine] Remove some dead code from JITEventListener.h. new b8895a84ec6 [MIR] Add hasWinCFI field new 04070efcd23 [X86] Add *SP to tailcall register class to fix verifier error new 76616be80bb [DAG] check more operands for cycles when merging stores. new 36c040be6bd [AArch64] Refactor Exynos machine model new 718a779582c [SourceMgr][FileCheck] Obey -color by extending WithColor new d51aaa8a3f6 Make llvm-dwarfdump -name work on type units. new a5ed0ab1fe7 [InstCombine] add test for fptrunc with vector with undef elt; NFC new c0bb0349d79 [HotColdSplitting] Identify larger cold regions using domtr [...] new a740192ca60 [SelectionDAG] DAG combiner for fminnan and fmaxnan new 69b255770f9 [VFS] Remove 'ignore-non-existent-contents' attribute for Y [...] new b8fd9d55db1 llvm-dwarfdump: Account for skeleton addr_base when dumping [...] new 86e199d8d61 Update MemorySSA in LoopRotate. new bcfd1f3eadd [llvm-objcopy] Introduce dispatch mechanism based on the input new bbc2ea9b218 [NFC] Rename minnan and maxnan to minimum and maximum new 59116cffe1e [ELF] Fix large code model MIR verifier errors new d63364426de Make fminimum/fmaximum SDNodes commutative and associative new 409b1027e90 [WebAssembly] Retain shuffle types during custom lowering new d5d108ee21b [WebAssembly] Fix immediate of rethrow when throwing to caller new 57075a5226d DebugInfo: Reuse common addresses for rnglist base address [...] new 3d8e85cd863 [X86] Fix pipeline tests when enabling MIR verification, NFC new 7b105bc3a6c [X86] Adjust MIR test case to pacify machine verifier new 7c10f9a44d5 [WebAssembly] Set LoadExt and TruncStore actions for SIMD types new 21435b345c5 [X86] Fix typo in comment. NFC new 5c27f3e8877 [llvm-readobj] Print ELF header flags names in GNU output new 42e23ebc6e4 [X86] Don't use the OriginalDemandedBits to calculate the D [...] new f4fb61b34ba [MCSched] Bind PFM Counters to the CPUs instead of the SchedModel. new 65f864674d9 [llvm-exegesis] Fix warning in r345243. new a06ebcb65fa [llvm-exegesis] Fix VC build of r345243. new 4a4eaf68ea0 [llvm-exegesis] Add missing initializer. new e658a002300 Add -instcombine-code-sinking option new 406bb74d509 [DebugInfo][Dexter] Unreachable line stepped onto after Sim [...] new 5d0d6ef5911 Fix MSVC llvm-exegesis build. NFCI. new 474181f1d60 [TTI] Add generic SK_Broadcast shuffle costs new 8377922c282 [llvm-dwarfdump] - Fix incorrect parsing of the DW_LLE_star [...] new f86533efab9 [TargetLowering] Improve vXi64 UINT_TO_FP vXf64 support (P38226) new 8893acb1d7d Missing semicolon. new aa7c2d802d9 [llvm-mca] Removed a couple of redundant method declaration [...] new 6f98ad09313 [CostModel][X86] Add realistic i64 uitofp f64 scalar costs new a9f0942cd97 [RISCV] Use PatFrags for variable shift patterns new 8a10b6b077a [CostModel][X86] Add realistic vXi64 uitofp vXf64 costs new 5b13734c4d8 IR: Optimize StructType::get to perform one hash lookup ins [...] new 497bf4892d2 [GlobalISel] Use the target preferred type for G_EXTRACT_VE [...] new c00e256ef2c [X86] Fix llc invocation on MIR test case new 1b6f74f7adc [DEBUG_INFO][NVPTX]Fix processing of DBG_VALUES. new b79b03ee2a8 [AArch64] Do 64-bit vector move of 0 and -1 by extracting f [...] new 4f4e519ae66 [AArch64] Refactor definition of EXT patterns to use a multiclass new 7efb6dd83cf [ARM] Use Cortex-A57 sched model for Cortex-A72 new 7dddaa81329 [AArch64] Add EXT patterns for 64-bit EXT of a subvector of [...] new c8f0858dfc5 [ARM] Regenerate vdup tests new c915aaf6e9a [AArch64] Refactor Exynos feature sets (NFC) new a64e4ae25fd [llvm-mca] Introduce a new base class for mca::Instruction, [...] new a46fc2a0845 [AArch64][GlobalISel] Fix the LegalityPredicate for lowerIf [...] new 681afad76c7 [X86] Remove some uarch tuning flags from KNL that look to [...] new e662a68784e [X86] Remove ProcIntelKNL and replace with a SlowPMADDWD fl [...] new af0086ca57f [GISel] LegalizerInfo: Rename MemDesc::Size to SizeInBits t [...] new 4532ef4dfdf [LegalizeDAG] Remove dead SINT_TO_FP legalization code new 32b8b6b1e18 [GlobalISel] LegalizerHelper: Fix the incorrect alignment w [...] new f6da6905251 [X86] Add KNL command lines to movmsk-cmp.ll. new 88b2c1ee841 [FPEnv] Last BinaryOperator::isFNeg(...) to m_FNeg(...) changes new ee0e48f6cbb [X86] Add some non-AVX512VL command lines to the *vl-vec-te [...] new 6c8035cd897 [WebAssembly] Use target-independent saturating add
The 87 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference.
Summary of changes: docs/CommandGuide/FileCheck.rst | 4 + docs/CommandGuide/llvm-exegesis.rst | 4 + docs/CommandGuide/tblgen.rst | 4 + docs/Proposals/TestSuite.rst | 7 + include/llvm/CodeGen/BasicTTIImpl.h | 23 +- include/llvm/CodeGen/GlobalISel/LegalizerInfo.h | 2 +- include/llvm/CodeGen/ISDOpcodes.h | 8 +- include/llvm/CodeGen/MIRYamlMapping.h | 2 + include/llvm/CodeGen/TargetLowering.h | 23 +- include/llvm/DebugInfo/DWARF/DWARFDebugLoc.h | 6 +- include/llvm/DebugInfo/DWARF/DWARFListTable.h | 1 + include/llvm/ExecutionEngine/JITEventListener.h | 22 - include/llvm/IR/IntrinsicsAArch64.td | 6 + include/llvm/IR/IntrinsicsWebAssembly.td | 8 - include/llvm/IR/PatternMatch.h | 29 +- include/llvm/MC/MCParser/AsmLexer.h | 2 - include/llvm/MC/MCParser/MCAsmLexer.h | 5 + include/llvm/MC/MCSchedule.h | 16 - include/llvm/Support/VirtualFileSystem.h | 5 - include/llvm/Support/WithColor.h | 63 +- .../llvm/Target/GlobalISel/SelectionDAGCompat.td | 1 + include/llvm/Target/Target.td | 5 + include/llvm/Target/TargetPfmCounters.td | 46 + include/llvm/Target/TargetSchedule.td | 28 - include/llvm/Target/TargetSelectionDAG.td | 7 +- include/llvm/Transforms/Utils/CodeExtractor.h | 11 +- include/llvm/Transforms/Utils/Local.h | 9 + include/llvm/Transforms/Utils/LoopRotationUtils.h | 5 +- lib/CodeGen/Analysis.cpp | 4 + lib/CodeGen/AsmPrinter/AsmPrinterInlineAsm.cpp | 5 +- lib/CodeGen/AsmPrinter/DwarfCompileUnit.cpp | 1 + lib/CodeGen/AsmPrinter/DwarfDebug.cpp | 9 + lib/CodeGen/AsmPrinter/DwarfDebug.h | 5 + lib/CodeGen/GlobalISel/IRTranslator.cpp | 17 +- lib/CodeGen/GlobalISel/LegalityPredicates.cpp | 4 +- lib/CodeGen/GlobalISel/LegalizerHelper.cpp | 18 +- lib/CodeGen/GlobalISel/LegalizerInfo.cpp | 2 +- lib/CodeGen/MIRParser/MIRParser.cpp | 1 + lib/CodeGen/MIRPrinter.cpp | 1 + lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 56 +- lib/CodeGen/SelectionDAG/FastISel.cpp | 13 +- lib/CodeGen/SelectionDAG/LegalizeDAG.cpp | 103 +- lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp | 4 +- lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp | 9 +- lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp | 16 +- lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 5 +- lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp | 28 +- lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp | 5 +- lib/CodeGen/SelectionDAG/TargetLowering.cpp | 66 ++ lib/CodeGen/TargetLoweringBase.cpp | 4 +- lib/DebugInfo/DWARF/DWARFContext.cpp | 7 +- lib/DebugInfo/DWARF/DWARFDebugLoc.cpp | 14 +- lib/DebugInfo/DWARF/DWARFDie.cpp | 12 +- lib/DebugInfo/DWARF/DWARFUnit.cpp | 10 + lib/IR/Type.cpp | 41 +- lib/MC/MCParser/AsmLexer.cpp | 36 +- lib/MC/MCParser/AsmParser.cpp | 4 +- lib/Support/SourceMgr.cpp | 108 +- lib/Support/VirtualFileSystem.cpp | 24 +- lib/Support/WithColor.cpp | 63 +- lib/Target/AArch64/AArch64.h | 2 + lib/Target/AArch64/AArch64.td | 13 +- lib/Target/AArch64/AArch64AsmPrinter.cpp | 132 +++ lib/Target/AArch64/AArch64CompressJumpTables.cpp | 162 +++ lib/Target/AArch64/AArch64ISelLowering.cpp | 40 +- lib/Target/AArch64/AArch64ISelLowering.h | 1 + lib/Target/AArch64/AArch64InstrInfo.cpp | 131 +-- lib/Target/AArch64/AArch64InstrInfo.h | 9 +- lib/Target/AArch64/AArch64InstrInfo.td | 133 ++- lib/Target/AArch64/AArch64LegalizerInfo.cpp | 15 +- lib/Target/AArch64/AArch64MachineFunctionInfo.h | 15 + lib/Target/AArch64/AArch64SchedExynosM1.td | 31 +- lib/Target/AArch64/AArch64SchedExynosM3.td | 55 +- lib/Target/AArch64/AArch64Subtarget.h | 2 + lib/Target/AArch64/AArch64TargetMachine.cpp | 8 + lib/Target/AArch64/AArch64TargetTransformInfo.cpp | 15 +- lib/Target/AArch64/CMakeLists.txt | 1 + lib/Target/ARM/ARM.td | 2 +- lib/Target/ARM/ARMISelLowering.cpp | 27 +- lib/Target/ARM/ARMInstrInfo.td | 4 + lib/Target/ARM/ARMInstrNEON.td | 24 +- lib/Target/ARM/ARMInstrThumb.td | 3 + lib/Target/ARM/ARMTargetTransformInfo.cpp | 25 +- lib/Target/Hexagon/HexagonTargetTransformInfo.cpp | 2 +- lib/Target/Mips/MipsSEISelLowering.cpp | 4 +- lib/Target/NVPTX/NVPTXISelLowering.cpp | 4 +- lib/Target/NVPTX/NVPTXPrologEpilogPass.cpp | 19 + lib/Target/RISCV/RISCVInstrInfo.td | 19 +- lib/Target/SystemZ/SystemZISelLowering.cpp | 20 +- lib/Target/SystemZ/SystemZInstrVector.td | 4 +- lib/Target/WebAssembly/WebAssemblyCFGStackify.cpp | 2 +- lib/Target/WebAssembly/WebAssemblyISelLowering.cpp | 27 +- lib/Target/WebAssembly/WebAssemblyInstrFloat.td | 4 +- lib/Target/WebAssembly/WebAssemblyInstrSIMD.td | 14 +- lib/Target/X86/AsmParser/X86AsmParser.cpp | 2 - lib/Target/X86/CMakeLists.txt | 1 + lib/Target/X86/X86.td | 31 +- lib/Target/X86/X86FastISel.cpp | 32 +- lib/Target/X86/X86ISelDAGToDAG.cpp | 13 +- lib/Target/X86/X86ISelLowering.cpp | 35 +- lib/Target/X86/X86ISelLowering.h | 6 + lib/Target/X86/X86InstrCompiler.td | 11 +- lib/Target/X86/X86InstrInfo.cpp | 51 +- lib/Target/X86/X86InterleavedAccess.cpp | 2 +- lib/Target/X86/X86MCInstLower.cpp | 35 - lib/Target/X86/X86PfmCounters.td | 137 +-- lib/Target/X86/X86RegisterInfo.td | 7 +- lib/Target/X86/X86SpeculativeLoadHardening.cpp | 10 +- lib/Target/X86/X86Subtarget.h | 7 +- lib/Target/X86/X86TargetTransformInfo.cpp | 122 ++- lib/Transforms/IPO/HotColdSplitting.cpp | 359 ++++--- lib/Transforms/InstCombine/InstCombineAndOrXor.cpp | 72 +- lib/Transforms/InstCombine/InstCombineCasts.cpp | 5 +- lib/Transforms/InstCombine/InstCombineInternal.h | 3 + .../InstCombine/InstructionCombining.cpp | 6 +- lib/Transforms/Scalar/LoopRotation.cpp | 28 +- lib/Transforms/Scalar/Reassociate.cpp | 17 +- lib/Transforms/Utils/CodeExtractor.cpp | 56 +- lib/Transforms/Utils/Local.cpp | 41 + lib/Transforms/Utils/LoopRotationUtils.cpp | 60 +- lib/Transforms/Utils/SimplifyCFG.cpp | 22 +- test/Analysis/CostModel/X86/div.ll | 432 ++++++-- test/Analysis/CostModel/X86/rem.ll | 432 ++++++-- test/Analysis/CostModel/X86/uitofp.ll | 34 +- test/Analysis/CostModel/X86/vdiv-cost.ll | 54 +- test/CodeGen/AArch64/GlobalISel/arm64-fallback.ll | 2 +- .../AArch64/GlobalISel/arm64-irtranslator.ll | 13 +- .../legalize-load-store-s128-unaligned.mir | 31 + .../AArch64/GlobalISel/legalize-load-v4s32.mir | 21 + .../GlobalISel/legalizer-info-validation.mir | 2 +- test/CodeGen/AArch64/O3-pipeline.ll | 1 + test/CodeGen/AArch64/aarch64-be-bv.ll | 2 +- test/CodeGen/AArch64/aarch64-smax-constantfold.ll | 2 +- .../AArch64/arm64-neon-compare-instructions.ll | 6 +- test/CodeGen/AArch64/arm64-neon-copy.ll | 4 +- test/CodeGen/AArch64/arm64-vector-ext.ll | 2 +- test/CodeGen/AArch64/arm64-vshuffle.ll | 2 +- test/CodeGen/AArch64/arm64-zero-cycle-zeroing.ll | 8 +- test/CodeGen/AArch64/bitcast.ll | 4 +- test/CodeGen/AArch64/ext-narrow-index.ll | 345 +++++++ test/CodeGen/AArch64/fast-isel-cmp-vec.ll | 4 +- test/CodeGen/AArch64/fold-constants.ll | 2 +- test/CodeGen/AArch64/jump-table-compress.mir | 111 +++ test/CodeGen/AArch64/jump-table-exynos.ll | 67 ++ test/CodeGen/AArch64/jump-table.ll | 156 ++- test/CodeGen/AArch64/machine_cse.ll | 24 + test/CodeGen/AArch64/min-jump-table.ll | 6 +- test/CodeGen/AArch64/neon-compare-instructions.ll | 6 +- test/CodeGen/AArch64/selectiondag-order.ll | 6 +- test/CodeGen/ARM/analyze-branch-bkpt.ll | 61 ++ test/CodeGen/ARM/debugtrap.ll | 8 +- test/CodeGen/ARM/fp16-promote.ll | 8 +- test/CodeGen/ARM/trap.ll | 14 +- test/CodeGen/ARM/vdup.ll | 352 +++++-- test/CodeGen/SystemZ/vec-max-05.ll | 6 +- test/CodeGen/SystemZ/vec-min-05.ll | 6 +- test/CodeGen/WebAssembly/cfg-stackify-eh.mir | 2 +- test/CodeGen/WebAssembly/simd-arith.ll | 64 +- .../WebAssembly/simd-ext-load-trunc-store.ll | 60 ++ test/CodeGen/WebAssembly/simd-intrinsics.ll | 24 +- test/CodeGen/WebAssembly/simd-nested-shuffles.ll | 17 + test/CodeGen/X86/GlobalISel/constant.ll | 2 +- test/CodeGen/X86/O0-pipeline.ll | 5 +- test/CodeGen/X86/O3-pipeline.ll | 5 +- test/CodeGen/X86/PR37310.mir | 4 +- test/CodeGen/X86/avg.ll | 455 +++++---- test/CodeGen/X86/avx512-cvt.ll | 200 +--- test/CodeGen/X86/avx512-select.ll | 4 +- test/CodeGen/X86/avx512bwvl-vec-test-testn.ll | 383 +++++-- test/CodeGen/X86/avx512vl-vec-test-testn.ll | 736 +++++++++----- test/CodeGen/X86/code-model-elf-memset.ll | 12 +- test/CodeGen/X86/code-model-elf.ll | 84 +- test/CodeGen/X86/combine-pmuldq.ll | 30 +- test/CodeGen/X86/crash-O0.ll | 8 +- test/CodeGen/X86/ftrunc.ll | 157 ++- test/CodeGen/X86/hoist-spill.ll | 2 - test/CodeGen/X86/large-pic-string.ll | 16 +- test/CodeGen/X86/machine-cse.ll | 15 +- test/CodeGen/X86/madd.ll | 66 +- test/CodeGen/X86/mmx-arith.ll | 11 +- test/CodeGen/X86/movmsk-cmp.ll | 1050 ++++++++++++++++++++ test/CodeGen/X86/musttail-indirect.ll | 4 +- test/CodeGen/X86/musttail-thiscall.ll | 4 +- test/CodeGen/X86/musttail-varargs.ll | 4 +- test/CodeGen/X86/pr32284.ll | 19 +- test/CodeGen/X86/pr32340.ll | 25 +- test/CodeGen/X86/pr38762.ll | 101 ++ test/CodeGen/X86/pr38763.ll | 20 +- test/CodeGen/X86/pr39243.ll | 132 +++ test/CodeGen/X86/scheduler-backtracking.ll | 212 ++-- test/CodeGen/X86/sibcall-2.ll | 4 +- test/CodeGen/X86/sibcall.ll | 63 +- test/CodeGen/X86/spill-zero-x86_64.ll | 75 ++ test/CodeGen/X86/swifterror.ll | 21 +- test/CodeGen/X86/tailcall-lifetime-end.ll | 27 + test/CodeGen/X86/urem-seteq-vec-nonsplat.ll | 68 +- test/CodeGen/X86/vec_int_to_fp.ll | 513 +++++----- test/DebugInfo/NVPTX/dbg-value-const-byref.ll | 81 ++ test/DebugInfo/X86/split-dwarf-v5-ranges.ll | 10 +- test/FileCheck/opt-color.txt | 22 + test/MC/AArch64/macro-hex-int.s | 8 + test/MC/X86/intel-syntax-hex.s | 2 +- test/MC/X86/pr27884.s | 2 +- test/Transforms/BlockExtractor/extract-blocks.ll | 8 +- .../CodeExtractor/ExtractedFnEntryCount.ll | 2 +- test/Transforms/CodeExtractor/PartialInlineAnd.ll | 4 +- .../Transforms/CodeExtractor/PartialInlineAndOr.ll | 2 +- .../CodeExtractor/PartialInlineAttributes.ll | 8 +- .../Transforms/CodeExtractor/PartialInlineDebug.ll | 8 +- .../CodeExtractor/PartialInlineEntryUpdate.ll | 6 +- .../PartialInlineInvokeProducesOutVal.ll | 4 +- .../CodeExtractor/PartialInlineLiveAcross.ll | 4 +- .../CodeExtractor/PartialInlineNoLiveOut.ll | 4 +- test/Transforms/CodeExtractor/PartialInlineOr.ll | 4 +- .../Transforms/CodeExtractor/PartialInlineOrAnd.ll | 4 +- .../CodeExtractor/PartialInlinePGOMultiRegion.ll | 8 +- .../CodeExtractor/PartialInlinePGORegion.ll | 4 +- .../CodeExtractor/PartialInlineVarArg.ll | 6 +- .../CodeExtractor/PartialInlineVarArgsDebug.ll | 4 +- test/Transforms/CodeExtractor/SingleCondition.ll | 2 +- .../CodeExtractor/X86/InheritTargetAttributes.ll | 2 +- test/Transforms/CodeExtractor/cost.ll | 4 +- test/Transforms/CodeExtractor/cost_meta.ll | 2 +- test/Transforms/CodeExtractor/inline_eh.ll | 4 +- test/Transforms/CodeExtractor/inline_eh_1.ll | 4 +- test/Transforms/CodeExtractor/live_shrink.ll | 4 +- test/Transforms/CodeExtractor/live_shrink_gep.ll | 4 +- test/Transforms/CodeExtractor/live_shrink_hoist.ll | 2 +- .../CodeExtractor/live_shrink_multiple.ll | 2 +- test/Transforms/CodeExtractor/unreachable-block.ll | 4 +- .../{split-cold-1.ll => do-not-split.ll} | 21 +- .../HotColdSplit/duplicate-phi-preds-crash.ll | 54 + test/Transforms/HotColdSplit/minsize.ll | 4 +- test/Transforms/HotColdSplit/multiple-exits.ll | 73 ++ .../HotColdSplit/outline-if-then-else.ll | 64 ++ test/Transforms/HotColdSplit/outline-while-loop.ll | 67 ++ test/Transforms/HotColdSplit/split-cold-2.ll | 4 +- .../HotColdSplit/split-out-dbg-val-of-arg.ll | 2 +- test/Transforms/InstCombine/fpcast.ll | 15 +- test/Transforms/InstCombine/logical-select.ll | 76 +- test/Transforms/InstCombine/no_sink_instruction.ll | 19 + test/Transforms/InstCombine/nsw.ll | 83 +- test/Transforms/InstCombine/vec_sext.ll | 18 +- .../LoopRotate/2009-01-25-SingleEntryPhi.ll | 1 + test/Transforms/LoopRotate/PhiRename-1.ll | 1 + test/Transforms/LoopRotate/PhiSelfReference-1.ll | 1 + test/Transforms/LoopRotate/alloca.ll | 1 + test/Transforms/LoopRotate/basic.ll | 2 + test/Transforms/LoopRotate/catchret.ll | 1 + test/Transforms/LoopRotate/convergent.ll | 1 + test/Transforms/LoopRotate/crash.ll | 1 + test/Transforms/LoopRotate/dbg-value-duplicates.ll | 1 + test/Transforms/LoopRotate/dbgvalue.ll | 1 + test/Transforms/LoopRotate/indirectbr.ll | 1 + test/Transforms/LoopRotate/loopexitinglatch.ll | 1 + test/Transforms/LoopRotate/multiple-exits.ll | 1 + test/Transforms/LoopRotate/phi-dbgvalue.ll | 1 + test/Transforms/LoopRotate/phi-duplicate.ll | 1 + test/Transforms/LoopRotate/pr22337.ll | 1 + test/Transforms/LoopRotate/pr33701.ll | 1 + test/Transforms/LoopRotate/pr35210.ll | 51 + test/Transforms/LoopRotate/pr37205.ll | 1 + test/Transforms/LoopRotate/preserve-mssa.ll | 109 ++ test/Transforms/LoopRotate/preserve-scev.ll | 37 +- test/Transforms/LoopRotate/vect.omp.persistence.ll | 1 + test/Transforms/LoopUnroll/ARM/loop-unrolling.ll | 1 + .../LoopVectorize/X86/uint64_to_fp64-cost-model.ll | 5 +- test/Transforms/Reassociate/fp-expr.ll | 4 +- test/Transforms/SLPVectorizer/X86/uitofp.ll | 137 +-- .../X86/debug_loclists_startx_length.s | 27 + test/tools/llvm-dwarfdump/X86/typeunit-name.s | 100 ++ test/tools/llvm-extract/extract-block.ll | 2 +- test/tools/llvm-extract/extract-multiple-blocks.ll | 4 +- test/tools/llvm-mca/X86/intel-syntax.s | 2 +- test/tools/llvm-readobj/gnu-file-headers.test | 23 + tools/llvm-dwarfdump/llvm-dwarfdump.cpp | 4 +- tools/llvm-exegesis/lib/AArch64/Target.cpp | 4 + tools/llvm-exegesis/lib/Latency.cpp | 9 +- tools/llvm-exegesis/lib/LlvmState.cpp | 7 +- tools/llvm-exegesis/lib/LlvmState.h | 8 +- tools/llvm-exegesis/lib/Target.cpp | 27 + tools/llvm-exegesis/lib/Target.h | 39 + tools/llvm-exegesis/lib/Uops.cpp | 20 +- tools/llvm-exegesis/lib/X86/Target.cpp | 6 + tools/llvm-exegesis/llvm-exegesis.cpp | 11 +- tools/llvm-mc/llvm-mc.cpp | 5 + tools/llvm-mca/Views/InstructionInfoView.cpp | 4 +- tools/llvm-mca/Views/ResourcePressureView.cpp | 23 +- tools/llvm-mca/Views/ResourcePressureView.h | 19 +- tools/llvm-mca/Views/RetireControlUnitStatistics.h | 2 - tools/llvm-mca/Views/SchedulerStatistics.h | 2 - tools/llvm-mca/Views/SummaryView.cpp | 3 +- tools/llvm-mca/Views/SummaryView.h | 1 - tools/llvm-mca/Views/TimelineView.cpp | 51 +- tools/llvm-mca/include/InstrBuilder.h | 17 +- tools/llvm-mca/include/Instruction.h | 108 +- tools/llvm-mca/include/SourceMgr.h | 22 +- tools/llvm-mca/include/Stages/FetchStage.h | 2 +- tools/llvm-mca/include/Stages/InstructionTables.h | 9 +- .../llvm-mca/lib/HardwareUnits/ResourceManager.cpp | 3 +- .../lib/HardwareUnits/RetireControlUnit.cpp | 4 +- tools/llvm-mca/lib/HardwareUnits/Scheduler.cpp | 4 +- tools/llvm-mca/lib/InstrBuilder.cpp | 20 +- tools/llvm-mca/lib/Instruction.cpp | 24 +- tools/llvm-mca/lib/Pipeline.cpp | 5 +- tools/llvm-mca/lib/Stages/DispatchStage.cpp | 19 +- tools/llvm-mca/lib/Stages/ExecuteStage.cpp | 4 +- tools/llvm-mca/lib/Stages/FetchStage.cpp | 28 +- tools/llvm-mca/lib/Stages/InstructionTables.cpp | 1 - tools/llvm-mca/lib/Stages/RetireStage.cpp | 4 +- tools/llvm-mca/llvm-mca.cpp | 2 +- tools/llvm-objcopy/Object.cpp | 15 +- tools/llvm-objcopy/Object.h | 3 + tools/llvm-objcopy/llvm-objcopy.cpp | 88 +- tools/llvm-readobj/ELFDumper.cpp | 133 ++- unittests/Analysis/ValueTrackingTest.cpp | 4 +- unittests/Transforms/Utils/CodeExtractorTest.cpp | 21 +- utils/FileCheck/FileCheck.cpp | 5 + utils/TableGen/CMakeLists.txt | 1 + utils/TableGen/CodeGenSchedule.cpp | 31 +- utils/TableGen/CodeGenSchedule.h | 12 +- utils/TableGen/CodeGenTarget.cpp | 1 - utils/TableGen/ExegesisEmitter.cpp | 212 ++++ utils/TableGen/SubtargetEmitter.cpp | 86 +- utils/TableGen/TableGen.cpp | 8 +- utils/TableGen/TableGenBackends.h | 1 + 326 files changed, 8862 insertions(+), 3666 deletions(-) create mode 100644 include/llvm/Target/TargetPfmCounters.td create mode 100644 lib/Target/AArch64/AArch64CompressJumpTables.cpp create mode 100644 test/CodeGen/AArch64/GlobalISel/legalize-load-store-s128-unaligned.mir create mode 100644 test/CodeGen/AArch64/GlobalISel/legalize-load-v4s32.mir create mode 100644 test/CodeGen/AArch64/ext-narrow-index.ll create mode 100644 test/CodeGen/AArch64/jump-table-compress.mir create mode 100644 test/CodeGen/AArch64/jump-table-exynos.ll create mode 100644 test/CodeGen/ARM/analyze-branch-bkpt.ll create mode 100644 test/CodeGen/WebAssembly/simd-ext-load-trunc-store.ll create mode 100644 test/CodeGen/WebAssembly/simd-nested-shuffles.ll create mode 100644 test/CodeGen/X86/pr38762.ll create mode 100644 test/CodeGen/X86/pr39243.ll create mode 100644 test/CodeGen/X86/spill-zero-x86_64.ll create mode 100644 test/CodeGen/X86/tailcall-lifetime-end.ll create mode 100644 test/DebugInfo/NVPTX/dbg-value-const-byref.ll create mode 100644 test/FileCheck/opt-color.txt create mode 100644 test/MC/AArch64/macro-hex-int.s rename test/Transforms/HotColdSplit/{split-cold-1.ll => do-not-split.ll} (71%) create mode 100644 test/Transforms/HotColdSplit/duplicate-phi-preds-crash.ll create mode 100644 test/Transforms/HotColdSplit/multiple-exits.ll create mode 100644 test/Transforms/HotColdSplit/outline-if-then-else.ll create mode 100644 test/Transforms/HotColdSplit/outline-while-loop.ll create mode 100644 test/Transforms/InstCombine/no_sink_instruction.ll create mode 100644 test/Transforms/LoopRotate/preserve-mssa.ll create mode 100644 test/tools/llvm-dwarfdump/X86/debug_loclists_startx_length.s create mode 100644 test/tools/llvm-dwarfdump/X86/typeunit-name.s create mode 100644 utils/TableGen/ExegesisEmitter.cpp