This is an automated email from the git hooks/post-receive script.

unknown user pushed a change to branch master in repository llvm.

from b93b2b7c04d [ORC] Remove a stray debugging output line left in a unit test. new 7e212e4168a AMDGPU: Remove remnants of old address space mapping

The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference.

Summary of changes: lib/Target/AMDGPU/AMDGPU.h | 19 +-- lib/Target/AMDGPU/AMDGPUAliasAnalysis.cpp | 43 ++---- lib/Target/AMDGPU/AMDGPUAliasAnalysis.h | 8 +- lib/Target/AMDGPU/AMDGPUAlwaysInlinePass.cpp | 4 +- lib/Target/AMDGPU/AMDGPUAnnotateKernelFeatures.cpp | 30 ++-- lib/Target/AMDGPU/AMDGPUAnnotateUniformValues.cpp | 4 +- lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp | 3 +- lib/Target/AMDGPU/AMDGPUAsmPrinter.h | 1 - lib/Target/AMDGPU/AMDGPUCallLowering.cpp | 6 +- lib/Target/AMDGPU/AMDGPUCallLowering.h | 2 - lib/Target/AMDGPU/AMDGPUCodeGenPrepare.cpp | 6 +- lib/Target/AMDGPU/AMDGPUHSAMetadataStreamer.cpp | 19 ++- lib/Target/AMDGPU/AMDGPUHSAMetadataStreamer.h | 1 - lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp | 17 +-- lib/Target/AMDGPU/AMDGPUISelLowering.cpp | 7 +- lib/Target/AMDGPU/AMDGPUISelLowering.h | 6 - lib/Target/AMDGPU/AMDGPUInline.cpp | 4 +- lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp | 5 +- lib/Target/AMDGPU/AMDGPUInstructionSelector.h | 3 - lib/Target/AMDGPU/AMDGPUInstructions.td | 36 ++--- lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp | 6 +- lib/Target/AMDGPU/AMDGPULibCalls.cpp | 5 +- lib/Target/AMDGPU/AMDGPUPerfHintAnalysis.cpp | 10 +- lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp | 25 ++-- lib/Target/AMDGPU/AMDGPUSubtarget.cpp | 4 +- lib/Target/AMDGPU/AMDGPUSubtarget.h | 8 -- lib/Target/AMDGPU/AMDGPUTargetMachine.cpp | 1 - lib/Target/AMDGPU/AMDGPUTargetMachine.h | 10 +- lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp | 54 ++++---- lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h | 2 +- lib/Target/AMDGPU/BUFInstructions.td | 4 +- lib/Target/AMDGPU/FLATInstructions.td | 2 +- lib/Target/AMDGPU/R600ISelLowering.cpp | 36 ++--- lib/Target/AMDGPU/R600InstrInfo.cpp | 6 +- lib/Target/AMDGPU/R600Instructions.td | 8 +- lib/Target/AMDGPU/SIISelLowering.cpp | 151 ++++++++++----------- lib/Target/AMDGPU/SIInsertWaitcnts.cpp | 8 +- lib/Target/AMDGPU/SIInstrInfo.cpp | 14 +- lib/Target/AMDGPU/SIMemoryLegalizer.cpp | 13 +- lib/Target/AMDGPU/SMInstructions.td | 4 +- lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp | 23 ---- test/CodeGen/AMDGPU/alloca.ll | 4 +- test/CodeGen/AMDGPU/call-return-types.ll | 6 +- test/CodeGen/AMDGPU/combine_vloads.ll | 2 +- test/CodeGen/AMDGPU/debug-value.ll | 2 +- test/CodeGen/AMDGPU/debug-value2.ll | 2 +- test/CodeGen/AMDGPU/debugger-emit-prologue.ll | 4 +- test/CodeGen/AMDGPU/debugger-insert-nops.ll | 4 +- test/CodeGen/AMDGPU/dynamic_stackalloc.ll | 6 +- test/CodeGen/AMDGPU/env-amdgiz.ll | 4 +- test/CodeGen/AMDGPU/env-amdgizcl.ll | 4 +- test/CodeGen/AMDGPU/extload-align.ll | 2 +- test/CodeGen/AMDGPU/extract_vector_elt-f16.ll | 4 +- test/CodeGen/AMDGPU/extract_vector_elt-f64.ll | 4 +- test/CodeGen/AMDGPU/extract_vector_elt-i16.ll | 6 +- test/CodeGen/AMDGPU/extract_vector_elt-i64.ll | 4 +- test/CodeGen/AMDGPU/fence-amdgiz.ll | 2 +- test/CodeGen/AMDGPU/fence-barrier.ll | 4 +- test/CodeGen/AMDGPU/frame-index-amdgiz.ll | 4 +- test/CodeGen/AMDGPU/function-returns.ll | 6 +- .../AMDGPU/hsa-metadata-kernel-debug-props.ll | 6 +- test/CodeGen/AMDGPU/invalid-alloca.ll | 4 +- test/CodeGen/AMDGPU/load-constant-i1.ll | 6 +- test/CodeGen/AMDGPU/load-global-i1.ll | 6 +- test/CodeGen/AMDGPU/load-local-i1.ll | 8 +- test/CodeGen/AMDGPU/load-local-i8.ll | 8 +- .../CodeGen/AMDGPU/load-private-double16-amdgiz.ll | 2 +- .../AMDGPU/memory-legalizer-store-infinite-loop.ll | 2 +- test/CodeGen/AMDGPU/nullptr.ll | 4 +- .../AMDGPU/promote-alloca-invariant-markers.ll | 2 +- test/CodeGen/AMDGPU/r600.amdgpu-alias-analysis.ll | 2 +- test/CodeGen/AMDGPU/sched-crash-dbg-value.mir | 2 +- test/CodeGen/AMDGPU/scratch-simple.ll | 6 +- test/CodeGen/AMDGPU/setcc.ll | 4 +- test/CodeGen/AMDGPU/sext-in-reg.ll | 8 +- test/CodeGen/AMDGPU/shl.ll | 6 +- test/CodeGen/AMDGPU/si-lower-control-flow.mir | 2 +- test/CodeGen/AMDGPU/sibling-call.ll | 6 +- test/CodeGen/AMDGPU/simplify-libcalls.ll | 6 +- test/CodeGen/AMDGPU/sra.ll | 6 +- test/CodeGen/AMDGPU/store-global.ll | 10 +- test/CodeGen/AMDGPU/store-local.ll | 10 +- .../AMDGPU/trunc-vector-store-assertion-failure.ll | 2 +- test/CodeGen/AMDGPU/unknown-processor.ll | 4 +- test/CodeGen/AMDGPU/unsupported-calls.ll | 4 +- test/CodeGen/AMDGPU/vector-alloca.ll | 12 +- .../vgpr-spill-emergency-stack-slot-compute.ll | 10 +- .../AMDGPU/vgpr-spill-emergency-stack-slot.ll | 6 +- test/tools/llvm-objdump/AMDGPU/source-lines.ll | 8 +- 89 files changed, 362 insertions(+), 492 deletions(-)