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from 47bb5db5abc template template parm context adds 529ea7d9596 Complete change to resolve pr90275. adds 07fe4af4d51 rs6000: Add back some w* constraints (PR91886) adds b3341826531 libstdc++: Fix is_trivially_constructible (PR 94033) adds b5562f1187d Daily bump. adds 73bc09fa8c6 middle-end/94216 fix another build_fold_addr_expr use adds f3280e4c0c9 ipa/94217 simplify offsetted address build adds c7e90196818 phiopt: Avoid -fcompare-debug bug in phiopt [PR94211] adds bb83e069eba libgomp/testsuite: ignore blank-line output for function-no [...] adds 02f7334ac93 c++: Fix up handling of captured vars in lambdas in OpenMP [...] adds f5389e17e4b Update include/plugin-api.h. adds c8429c2aba8 API extension for binutils (type of symbols). adds f22712bd8a2 Fix inliner ICE on alias with flatten attribute [PR92372] adds 37482edc3f7 d/dmd: Merge upstream dmd d1a606599 adds 9def91e9f2a c: Fix up cfun->function_end_locus from the C FE [PR94029] adds f7dceb4e658 Fix cgraph_node::function_symbol availability compuattion [ [...] adds 3373d3e38ea Daily bump. adds 94e2418780f c++: Avoid unnecessary empty class copy [94175]. adds 4a18f168f47 [rs6000] Rewrite the declaration of a variable adds 05009698eeb gcc, Arm: Fix no_cond issue introduced by MVE adds 4119cd693d2 store-merging: Fix up -fnon-call-exceptions handling [PR94224] adds 0efe7d8796e gcc, Arm: Fix MVE move from GPR -> GPR adds 005f6fc59e5 gcc, Arm: Fix testisms for MVE testsuite adds 719c864225e gcc, Arm: Revert changes to {get,set}_fpscr adds 8fefa21fcf6 tree-optimization/94266 - fix object type extraction heuristics adds 7d4549b2cd2 Fix correct offset in ipa_get_jf_ancestor_result. adds 3eff57aacfe [ARM][GCC][6x]:MVE ACLE vaddq intrinsics using arithmetic p [...] adds 85a94e87901 [ARM][GCC][7x]: MVE vreinterpretq and vuninitializedq intrinsics. adds 92f80065d10 [ARM][GCC][1/8x]: MVE ACLE vidup, vddup, viwdup and vdwdup [...] adds 41e1a7ffae9 [ARM][GCC][2/8x]: MVE ACLE gather load and scatter store in [...] adds 3d42842c07f fix CTOR vectorization adds 261014a1be4 [ARM][GCC][9x]: MVE ACLE predicated intrinsics with (dont-c [...] adds 828878c35c8 c++: Include the constraint parameter mapping in diagnostic [...] adds c3562f81042 [ARM][GCC][10x]: MVE ACLE intrinsics "add with carry across [...] adds 1aa22b1916a c-family: Tighten vector handling in type_for_mode [PR94072] adds b5446d0cc09 d: Fix SEGV in hash_table<odr_name_hasher, false, xcallocat [...] adds 1dfcc3b541c [ARM][GCC][11x]: MVE ACLE vector interleaving store and dei [...] adds a23eff1bd04 c++: Add testcases from PR c++/69694 adds a89349e664f adjust SLP tree dumping adds 72b3bc895f0 Fix verifier ICE on wrong comdat local flag [PR93347] adds 68dd57808f7 rs6000: Add command line and builtin compatibility check adds cc3afc9db07 Regenerate gcc.pot. adds 29f23ed79b6 sra: Cap number of sub-access propagations with a param (PR 93435) adds 8416602026d Daily bump. adds 15711e837b2 Fix comma at end of enumerator list seen with -std=c++98. adds 497498c878d lra: Tighten check for reloading paradoxical subregs [PR94052] adds b599bf9d6d1 c++: Reject changing active member of union during initiali [...] adds 98eb7b2ed24 d: Fix ICE in add_symbol_to_partition_1, at lto/lto-partiti [...] adds 837cece888f Darwin: Address translation comments (PR93694). adds dfb25dfe3d3 Darwin: Handle NULL DECL_SIZE_TYPE in machopic_select_secti [...] adds 9fc985118d9 libstdc++: Fix path::generic_string allocator handling (PR 94242) adds a577c0c2693 libstdc++: Fix experimental::path::generic_string (PR 93245) adds 424e39081f9 d: Fix typo in ChangeLog for last change adds 4a01f7b1e73 d: Fix missing dependencies in depfile for imported files ( [...] adds 88d7d0ce8fa testsuite: Fix lambda-vis.C for targets with user label pre [...] adds 85e10e4f0fa Darwin: Fix i686 bootstrap when the assembler supports GOTO [...] adds fbe60463bb8 d: Generate phony targets for content imported files (PR93038) adds 83aa5aa313a Daily bump. adds 6e00d8dcf32 Daily bump. adds b809f0b6580 Set proper DECL_ALIGN in offload_handle_link_vars (PR94233) adds 2fa4b1ffd6e Save ref->speculative_id before clone_reference. adds 263ee1260bc tree-optimization/94266 - aovid propagating addresses of TA [...] adds 7a2090b04e5 ipa/94245 - avoid folding when we want an ADDR_EXPR adds 26b3e568a60 [PR94044] Fix ICE with sizeof<argumentpack> adds a3586eeb884 AMDGCN offloading – use amdgcn-amdhsa new abd986fa1dd Merge master a3586eeb88414e77c7cccb69362b8d04562536b6. new 3e550ed6758 no need to stream tpl-tpl-parm-contextness

The 2 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference.

Summary of changes: ChangeLog.modules | 8 + gcc/ChangeLog | 1663 ++ gcc/DATESTAMP | 2 +- gcc/c-family/ChangeLog | 7 + gcc/c-family/c-common.c | 11 +- gcc/c/ChangeLog | 14 + gcc/c/c-decl.c | 4 +- gcc/c/c-parser.c | 51 +- gcc/c/c-tree.h | 2 +- gcc/cgraph.c | 90 +- gcc/cgraph.h | 17 +- gcc/cgraphunit.c | 8 + gcc/config/arm/arm-builtins.c | 86 + gcc/config/arm/arm.md | 8 +- gcc/config/arm/arm_mve.h | 8413 ++++++++-- gcc/config/arm/arm_mve_builtins.def | 61 + gcc/config/arm/iterators.md | 8 + gcc/config/arm/mve.md | 1250 +- gcc/config/arm/neon.md | 32 +- gcc/config/arm/unspecs.md | 4 +- gcc/config/arm/vec-common.md | 42 +- gcc/config/arm/vfp.md | 7 +- gcc/config/darwin.c | 29 +- gcc/config/darwin.opt | 96 +- gcc/config/i386/darwin.h | 10 + gcc/config/i386/i386.h | 5 +- gcc/config/rs6000/constraints.md | 11 + gcc/config/rs6000/rs6000-internal.h | 1 - gcc/config/rs6000/rs6000.c | 9 +- gcc/config/rs6000/rs6000.h | 1 + gcc/cp/ChangeLog | 53 + gcc/cp/call.c | 4 + gcc/cp/constexpr.c | 69 +- gcc/cp/cp-gimplify.c | 30 +- gcc/cp/cp-tree.h | 1 + gcc/cp/cxx-pretty-print.c | 18 +- gcc/cp/cxx-pretty-print.h | 1 + gcc/cp/error.c | 35 +- gcc/cp/module.cc | 31 +- gcc/cp/parser.c | 2 + gcc/cp/tree.c | 6 +- gcc/cse.c | 1 - gcc/d/ChangeLog | 37 + gcc/d/d-lang.cc | 81 +- gcc/d/d-tree.h | 5 + gcc/d/decl.cc | 10 +- gcc/d/dmd/MERGE | 2 +- gcc/d/dmd/dclass.c | 1 - gcc/d/dmd/expressionsem.c | 1 + gcc/d/dmd/module.h | 1 + gcc/d/typeinfo.cc | 47 +- gcc/d/types.cc | 48 + gcc/doc/install.texi | 16 +- gcc/fold-const.c | 2 +- gcc/gimple-ssa-sprintf.c | 4 +- gcc/gimple-ssa-store-merging.c | 4 +- gcc/ipa-cp.c | 13 +- gcc/ipa-fnsummary.c | 4 - gcc/ipa-inline-transform.c | 9 +- gcc/ipa-inline.c | 3 + gcc/ipa-prop.c | 2 +- gcc/ipa-split.c | 2 +- gcc/lra-constraints.c | 24 +- gcc/lto-section-in.c | 1 + gcc/lto-streamer-out.c | 82 +- gcc/lto-streamer.h | 1 + gcc/lto/ChangeLog | 6 + gcc/lto/lto.c | 14 +- gcc/params.opt | 4 + gcc/po/ChangeLog | 4 + gcc/po/gcc.pot | 15239 +++++++++++-------- gcc/symtab.c | 20 +- gcc/testsuite/ChangeLog | 679 + gcc/testsuite/g++.dg/abi/empty30.C | 14 + gcc/testsuite/g++.dg/abi/lambda-vis.C | 12 +- gcc/testsuite/g++.dg/concepts/diagnostic6.C | 14 + gcc/testsuite/g++.dg/cpp0x/decltype74.C | 30 + gcc/testsuite/g++.dg/cpp0x/decltype75.C | 24 + gcc/testsuite/g++.dg/cpp1y/constexpr-union2.C | 9 + gcc/testsuite/g++.dg/cpp1y/constexpr-union3.C | 9 + gcc/testsuite/g++.dg/cpp1y/constexpr-union4.C | 9 + gcc/testsuite/g++.dg/cpp1y/constexpr-union5.C | 15 + gcc/testsuite/g++.dg/cpp1y/pr94066-2.C | 19 + gcc/testsuite/g++.dg/cpp1y/pr94066-3.C | 16 + gcc/testsuite/g++.dg/cpp1y/pr94066.C | 18 + gcc/testsuite/g++.dg/cpp2a/constexpr-union1.C | 18 + gcc/testsuite/g++.dg/torture/pr93347.C | 306 + gcc/testsuite/g++.dg/torture/pr94202.C | 22 + gcc/testsuite/g++.dg/torture/pr94216.C | 45 + gcc/testsuite/g++.dg/tree-ssa/pr94224.C | 34 + gcc/testsuite/g++.target/aarch64/pr94052.C | 174 + gcc/testsuite/gcc.c-torture/pr92372.c | 16 + gcc/testsuite/gcc.dg/attr-flatten-1.c | 18 + gcc/testsuite/gcc.dg/pr94211.c | 12 + gcc/testsuite/gcc.dg/tree-ssa/pr93435.c | 159 + gcc/testsuite/gcc.misc-tests/gcov-pr94029.c | 14 + gcc/testsuite/gcc.target/aarch64/pr94072.c | 9 + .../gcc.target/arm/mve/intrinsics/mve_fp_fpu1.c | 3 +- .../gcc.target/arm/mve/intrinsics/mve_fp_fpu2.c | 2 +- .../gcc.target/arm/mve/intrinsics/mve_fpu1.c | 3 +- .../gcc.target/arm/mve/intrinsics/mve_fpu2.c | 3 +- .../gcc.target/arm/mve/intrinsics/mve_fpu3.c | 3 +- .../gcc.target/arm/mve/intrinsics/mve_libcall1.c | 1 + .../gcc.target/arm/mve/intrinsics/mve_libcall2.c | 1 + .../arm/mve/intrinsics/mve_move_gpr_to_gpr.c | 18 + .../arm/mve/intrinsics/mve_vector_float.c | 3 +- .../arm/mve/intrinsics/mve_vector_float1.c | 3 +- .../arm/mve/intrinsics/mve_vector_float2.c | 3 +- .../gcc.target/arm/mve/intrinsics/mve_vector_int.c | 3 +- .../arm/mve/intrinsics/mve_vector_int1.c | 11 +- .../arm/mve/intrinsics/mve_vector_int2.c | 3 +- .../arm/mve/intrinsics/mve_vector_uint.c | 3 +- .../arm/mve/intrinsics/mve_vector_uint1.c | 3 +- .../arm/mve/intrinsics/mve_vector_uint2.c | 3 +- .../intrinsics/{vmaxnmaq_m_f16.c => vabdq_x_f16.c} | 6 +- .../intrinsics/{vmaxnmaq_m_f32.c => vabdq_x_f32.c} | 6 +- .../intrinsics/{vsriq_m_n_s16.c => vabdq_x_s16.c} | 7 +- .../intrinsics/{vsriq_m_n_s32.c => vabdq_x_s32.c} | 6 +- .../intrinsics/{vsriq_m_n_s8.c => vabdq_x_s8.c} | 6 +- .../intrinsics/{vsriq_m_n_u16.c => vabdq_x_u16.c} | 6 +- .../intrinsics/{vsriq_m_n_u32.c => vabdq_x_u32.c} | 6 +- .../intrinsics/{vsriq_m_n_u8.c => vabdq_x_u8.c} | 6 +- .../intrinsics/{vabsq_m_f16.c => vabsq_x_f16.c} | 8 +- .../intrinsics/{vabsq_m_f32.c => vabsq_x_f32.c} | 8 +- .../intrinsics/{vbicq_m_n_s16.c => vabsq_x_s16.c} | 6 +- .../intrinsics/{vbicq_m_n_s32.c => vabsq_x_s32.c} | 6 +- .../mve/intrinsics/{vabsq_m_s8.c => vabsq_x_s8.c} | 8 +- .../gcc.target/arm/mve/intrinsics/vadciq_m_s32.c | 24 + .../gcc.target/arm/mve/intrinsics/vadciq_m_u32.c | 24 + .../gcc.target/arm/mve/intrinsics/vadciq_s32.c | 22 + .../gcc.target/arm/mve/intrinsics/vadciq_u32.c | 22 + .../gcc.target/arm/mve/intrinsics/vadcq_m_s32.c | 24 + .../gcc.target/arm/mve/intrinsics/vadcq_m_u32.c | 24 + .../gcc.target/arm/mve/intrinsics/vadcq_s32.c | 22 + .../gcc.target/arm/mve/intrinsics/vadcq_u32.c | 22 + .../mve/intrinsics/{vaddq_n_f16.c => vaddq_f16.c} | 6 +- .../mve/intrinsics/{vaddq_n_f32.c => vaddq_f32.c} | 6 +- .../mve/intrinsics/{vaddq_n_s16.c => vaddq_s16.c} | 6 +- .../mve/intrinsics/{vaddq_n_s32.c => vaddq_s32.c} | 6 +- .../mve/intrinsics/{vaddq_n_s8.c => vaddq_s8.c} | 6 +- .../mve/intrinsics/{vaddq_n_u16.c => vaddq_u16.c} | 6 +- .../mve/intrinsics/{vaddq_n_u32.c => vaddq_u32.c} | 6 +- .../mve/intrinsics/{vaddq_n_u8.c => vaddq_u8.c} | 6 +- .../intrinsics/{vmaxnmaq_m_f16.c => vaddq_x_f16.c} | 7 +- .../intrinsics/{vmaxnmaq_m_f32.c => vaddq_x_f32.c} | 7 +- .../{vcmpgtq_m_n_f16.c => vaddq_x_n_f16.c} | 11 +- .../{vcmpleq_m_n_f32.c => vaddq_x_n_f32.c} | 11 +- .../{vcmpleq_m_n_s16.c => vaddq_x_n_s16.c} | 11 +- .../{vqrshlq_m_n_s32.c => vaddq_x_n_s32.c} | 7 +- .../{vcmpgeq_m_n_s8.c => vaddq_x_n_s8.c} | 11 +- .../{vcmpneq_m_n_u16.c => vaddq_x_n_u16.c} | 11 +- .../{vcmpneq_m_n_u32.c => vaddq_x_n_u32.c} | 11 +- .../{vcmpneq_m_n_u8.c => vaddq_x_n_u8.c} | 11 +- .../intrinsics/{vsriq_m_n_s16.c => vaddq_x_s16.c} | 7 +- .../intrinsics/{vsriq_m_n_s32.c => vaddq_x_s32.c} | 7 +- .../intrinsics/{vsriq_m_n_s8.c => vaddq_x_s8.c} | 7 +- .../intrinsics/{vsriq_m_n_u16.c => vaddq_x_u16.c} | 7 +- .../intrinsics/{vsriq_m_n_u32.c => vaddq_x_u32.c} | 7 +- .../intrinsics/{vsriq_m_n_u8.c => vaddq_x_u8.c} | 7 +- .../intrinsics/{vmaxnmaq_m_f16.c => vandq_x_f16.c} | 6 +- .../intrinsics/{vmaxnmaq_m_f32.c => vandq_x_f32.c} | 6 +- .../intrinsics/{vsriq_m_n_s16.c => vandq_x_s16.c} | 6 +- .../intrinsics/{vsriq_m_n_s32.c => vandq_x_s32.c} | 6 +- .../intrinsics/{vsriq_m_n_s8.c => vandq_x_s8.c} | 6 +- .../intrinsics/{vsriq_m_n_u16.c => vandq_x_u16.c} | 6 +- .../intrinsics/{vsriq_m_n_u32.c => vandq_x_u32.c} | 6 +- .../intrinsics/{vsriq_m_n_u8.c => vandq_x_u8.c} | 6 +- .../intrinsics/{vmaxnmaq_m_f16.c => vbicq_x_f16.c} | 6 +- .../intrinsics/{vmaxnmaq_m_f32.c => vbicq_x_f32.c} | 6 +- .../intrinsics/{vsriq_m_n_s16.c => vbicq_x_s16.c} | 6 +- .../intrinsics/{vsriq_m_n_s32.c => vbicq_x_s32.c} | 6 +- .../intrinsics/{vsriq_m_n_s8.c => vbicq_x_s8.c} | 6 +- .../intrinsics/{vsriq_m_n_u16.c => vbicq_x_u16.c} | 6 +- .../intrinsics/{vsriq_m_n_u32.c => vbicq_x_u32.c} | 6 +- .../intrinsics/{vsriq_m_n_u8.c => vbicq_x_u8.c} | 6 +- .../{vbrsrq_m_n_f16.c => vbrsrq_x_n_f16.c} | 8 +- .../{vbrsrq_m_n_f32.c => vbrsrq_x_n_f32.c} | 8 +- .../{vqrshlq_m_n_s16.c => vbrsrq_x_n_s16.c} | 7 +- .../{vqrshlq_m_n_s32.c => vbrsrq_x_n_s32.c} | 7 +- .../intrinsics/{vshlq_m_r_s8.c => vbrsrq_x_n_s8.c} | 7 +- .../{vqrshlq_m_n_u16.c => vbrsrq_x_n_u16.c} | 7 +- .../{vqrshlq_m_n_u32.c => vbrsrq_x_n_u32.c} | 7 +- .../{vrshlq_m_n_u8.c => vbrsrq_x_n_u8.c} | 7 +- .../{vmaxnmaq_m_f16.c => vcaddq_rot270_x_f16.c} | 6 +- .../{vmaxnmaq_m_f32.c => vcaddq_rot270_x_f32.c} | 6 +- .../{vsriq_m_n_s16.c => vcaddq_rot270_x_s16.c} | 6 +- .../{vsriq_m_n_s32.c => vcaddq_rot270_x_s32.c} | 6 +- .../{vsriq_m_n_s8.c => vcaddq_rot270_x_s8.c} | 6 +- .../{vsriq_m_n_u16.c => vcaddq_rot270_x_u16.c} | 6 +- .../{vsriq_m_n_u32.c => vcaddq_rot270_x_u32.c} | 6 +- .../{vsriq_m_n_u8.c => vcaddq_rot270_x_u8.c} | 6 +- .../{vmaxnmaq_m_f16.c => vcaddq_rot90_x_f16.c} | 6 +- .../{vmaxnmaq_m_f32.c => vcaddq_rot90_x_f32.c} | 6 +- .../{vsriq_m_n_s16.c => vcaddq_rot90_x_s16.c} | 6 +- .../{vsriq_m_n_s32.c => vcaddq_rot90_x_s32.c} | 6 +- .../{vsriq_m_n_s8.c => vcaddq_rot90_x_s8.c} | 6 +- .../{vsriq_m_n_u16.c => vcaddq_rot90_x_u16.c} | 6 +- .../{vsriq_m_n_u32.c => vcaddq_rot90_x_u32.c} | 6 +- .../{vsriq_m_n_u8.c => vcaddq_rot90_x_u8.c} | 6 +- .../intrinsics/{vbicq_m_n_s16.c => vclsq_x_s16.c} | 6 +- .../intrinsics/{vbicq_m_n_s32.c => vclsq_x_s32.c} | 6 +- .../mve/intrinsics/{vclsq_m_s8.c => vclsq_x_s8.c} | 8 +- .../intrinsics/{vbicq_m_n_s16.c => vclzq_x_s16.c} | 6 +- .../intrinsics/{vbicq_m_n_s32.c => vclzq_x_s32.c} | 6 +- .../mve/intrinsics/{vclzq_m_s8.c => vclzq_x_s8.c} | 8 +- .../intrinsics/{vorrq_m_n_u16.c => vclzq_x_u16.c} | 6 +- .../intrinsics/{vorrq_m_n_u32.c => vclzq_x_u32.c} | 6 +- .../mve/intrinsics/{vclzq_m_u8.c => vclzq_x_u8.c} | 8 +- .../{vmaxnmaq_m_f16.c => vcmulq_rot180_x_f16.c} | 6 +- .../{vmaxnmaq_m_f32.c => vcmulq_rot180_x_f32.c} | 6 +- .../{vmaxnmaq_m_f16.c => vcmulq_rot270_x_f16.c} | 6 +- .../{vmaxnmaq_m_f32.c => vcmulq_rot270_x_f32.c} | 6 +- .../{vmaxnmaq_m_f16.c => vcmulq_rot90_x_f16.c} | 7 +- .../{vmaxnmaq_m_f32.c => vcmulq_rot90_x_f32.c} | 7 +- .../{vmaxnmaq_m_f16.c => vcmulq_x_f16.c} | 6 +- .../{vmaxnmaq_m_f32.c => vcmulq_x_f32.c} | 6 +- .../{vcvtaq_m_s16_f16.c => vcvtaq_x_s16_f16.c} | 12 +- .../{vcvtaq_m_s32_f32.c => vcvtaq_x_s32_f32.c} | 12 +- .../{vcvtaq_m_u16_f16.c => vcvtaq_x_u16_f16.c} | 12 +- .../{vcvtaq_m_u32_f32.c => vcvtaq_x_u32_f32.c} | 12 +- .../{vcvtbq_f32_f16.c => vcvtbq_x_f32_f16.c} | 7 +- .../{vcvtmq_m_s16_f16.c => vcvtmq_x_s16_f16.c} | 12 +- .../{vcvtmq_m_s32_f32.c => vcvtmq_x_s32_f32.c} | 12 +- .../{vcvtmq_m_u16_f16.c => vcvtmq_x_u16_f16.c} | 12 +- .../{vcvtmq_m_u32_f32.c => vcvtmq_x_u32_f32.c} | 12 +- .../{vcvtnq_m_s16_f16.c => vcvtnq_x_s16_f16.c} | 12 +- .../{vcvtnq_m_s32_f32.c => vcvtnq_x_s32_f32.c} | 12 +- .../{vcvtnq_m_u16_f16.c => vcvtnq_x_u16_f16.c} | 12 +- .../{vcvtnq_m_u32_f32.c => vcvtnq_x_u32_f32.c} | 12 +- .../{vcvtpq_m_s16_f16.c => vcvtpq_x_s16_f16.c} | 12 +- .../{vcvtpq_m_s32_f32.c => vcvtpq_x_s32_f32.c} | 12 +- .../{vcvtpq_m_u16_f16.c => vcvtpq_x_u16_f16.c} | 12 +- .../{vcvtpq_m_u32_f32.c => vcvtpq_x_u32_f32.c} | 12 +- .../{vcvtq_m_n_f16_s16.c => vcvtq_x_f16_s16.c} | 8 +- .../{vcvtq_m_n_f16_u16.c => vcvtq_x_f16_u16.c} | 8 +- .../{vcvtq_m_n_f32_s32.c => vcvtq_x_f32_s32.c} | 8 +- .../{vcvtq_m_n_f32_u32.c => vcvtq_x_f32_u32.c} | 8 +- .../{vcvtq_m_n_f16_s16.c => vcvtq_x_n_f16_s16.c} | 8 +- .../{vcvtq_m_n_f16_u16.c => vcvtq_x_n_f16_u16.c} | 8 +- .../{vcvtq_m_n_f32_s32.c => vcvtq_x_n_f32_s32.c} | 8 +- .../{vcvtq_m_n_f32_u32.c => vcvtq_x_n_f32_u32.c} | 8 +- .../{vcvtq_m_s16_f16.c => vcvtq_x_n_s16_f16.c} | 12 +- .../{vcvtq_m_s32_f32.c => vcvtq_x_n_s32_f32.c} | 12 +- .../{vcvtq_m_u16_f16.c => vcvtq_x_n_u16_f16.c} | 12 +- .../{vcvtq_m_u32_f32.c => vcvtq_x_n_u32_f32.c} | 12 +- .../{vcvtq_m_s16_f16.c => vcvtq_x_s16_f16.c} | 12 +- .../{vcvtq_m_s32_f32.c => vcvtq_x_s32_f32.c} | 12 +- .../{vcvtaq_u16_f16.c => vcvtq_x_u16_f16.c} | 7 +- .../{vcvtaq_u32_f32.c => vcvtq_x_u32_f32.c} | 7 +- .../{vcvtbq_f32_f16.c => vcvttq_x_f32_f16.c} | 7 +- .../intrinsics/{vclzq_m_u16.c => vddupq_m_n_u16.c} | 11 +- .../{vdupq_m_n_u32.c => vddupq_m_n_u32.c} | 7 +- .../intrinsics/{vdupq_m_n_u8.c => vddupq_m_n_u8.c} | 11 +- .../{vclzq_m_u16.c => vddupq_m_wb_u16.c} | 11 +- .../{vclzq_m_u32.c => vddupq_m_wb_u32.c} | 11 +- .../{vdupq_m_n_u8.c => vddupq_m_wb_u8.c} | 11 +- .../mve/intrinsics/{vctp32q.c => vddupq_n_u16.c} | 12 +- .../mve/intrinsics/{vctp32q.c => vddupq_n_u32.c} | 12 +- .../mve/intrinsics/{vctp32q.c => vddupq_n_u8.c} | 12 +- .../intrinsics/{vmovlbq_u8.c => vddupq_wb_u16.c} | 12 +- .../intrinsics/{vmovlbq_u16.c => vddupq_wb_u32.c} | 12 +- .../intrinsics/{vqshluq_n_s8.c => vddupq_wb_u8.c} | 12 +- .../intrinsics/{vctp64q_m.c => vddupq_x_n_u16.c} | 11 +- .../intrinsics/{vctp64q_m.c => vddupq_x_n_u32.c} | 11 +- .../mve/intrinsics/{vctp8q_m.c => vddupq_x_n_u8.c} | 11 +- .../{vminaq_m_s16.c => vddupq_x_wb_u16.c} | 13 +- .../{vbicq_m_n_u32.c => vddupq_x_wb_u32.c} | 13 +- .../{vmovnbq_m_u16.c => vddupq_x_wb_u8.c} | 13 +- .../{vcvtbq_f16_f32.c => vdupq_x_n_f16.c} | 7 +- .../{vcvtbq_f32_f16.c => vdupq_x_n_f32.c} | 7 +- .../intrinsics/{vbicq_n_s16.c => vdupq_x_n_s16.c} | 7 +- .../intrinsics/{vcreateq_s32.c => vdupq_x_n_s32.c} | 7 +- .../intrinsics/{vcreateq_s8.c => vdupq_x_n_s8.c} | 7 +- .../intrinsics/{vcreateq_u16.c => vdupq_x_n_u16.c} | 7 +- .../mve/intrinsics/{vctp8q_m.c => vdupq_x_n_u32.c} | 14 +- .../intrinsics/{vcreateq_u8.c => vdupq_x_n_u8.c} | 7 +- .../arm/mve/intrinsics/vdwdupq_m_n_u16.c | 24 + .../arm/mve/intrinsics/vdwdupq_m_n_u32.c | 24 + .../gcc.target/arm/mve/intrinsics/vdwdupq_m_n_u8.c | 24 + .../{vqrshlq_m_n_u16.c => vdwdupq_m_wb_u16.c} | 11 +- .../arm/mve/intrinsics/vdwdupq_m_wb_u32.c | 24 + .../arm/mve/intrinsics/vdwdupq_m_wb_u8.c | 24 + .../gcc.target/arm/mve/intrinsics/vdwdupq_n_u16.c | 22 + .../gcc.target/arm/mve/intrinsics/vdwdupq_n_u32.c | 22 + .../gcc.target/arm/mve/intrinsics/vdwdupq_n_u8.c | 22 + .../gcc.target/arm/mve/intrinsics/vdwdupq_wb_u16.c | 22 + .../gcc.target/arm/mve/intrinsics/vdwdupq_wb_u32.c | 22 + .../gcc.target/arm/mve/intrinsics/vdwdupq_wb_u8.c | 22 + .../{vbicq_m_n_u16.c => vdwdupq_x_n_u16.c} | 11 +- .../{vbicq_m_n_u32.c => vdwdupq_x_n_u32.c} | 11 +- .../intrinsics/{vclzq_m_u8.c => vdwdupq_x_n_u8.c} | 11 +- .../{vclzq_m_u16.c => vdwdupq_x_wb_u16.c} | 11 +- .../{vclzq_m_u32.c => vdwdupq_x_wb_u32.c} | 11 +- .../{vmaxaq_m_s8.c => vdwdupq_x_wb_u8.c} | 11 +- .../intrinsics/{vmaxnmaq_m_f16.c => veorq_x_f16.c} | 7 +- .../intrinsics/{vmaxnmaq_m_f32.c => veorq_x_f32.c} | 7 +- .../intrinsics/{vsriq_m_n_s16.c => veorq_x_s16.c} | 7 +- .../intrinsics/{vsriq_m_n_s32.c => veorq_x_s32.c} | 7 +- .../intrinsics/{vsriq_m_n_s8.c => veorq_x_s8.c} | 7 +- .../intrinsics/{vsriq_m_n_u16.c => veorq_x_u16.c} | 7 +- .../intrinsics/{vsriq_m_n_u32.c => veorq_x_u32.c} | 7 +- .../intrinsics/{vsriq_m_n_u8.c => veorq_x_u8.c} | 7 +- .../gcc.target/arm/mve/intrinsics/vfmaq_n_f16.c | 2 +- .../gcc.target/arm/mve/intrinsics/vfmaq_n_f32.c | 2 +- .../gcc.target/arm/mve/intrinsics/vfmasq_n_f16.c | 2 +- .../gcc.target/arm/mve/intrinsics/vfmasq_n_f32.c | 2 +- .../{vcmpeqq_m_n_s16.c => vhaddq_x_n_s16.c} | 11 +- .../{vqrshlq_m_n_s32.c => vhaddq_x_n_s32.c} | 7 +- .../{vcmpgeq_m_n_s8.c => vhaddq_x_n_s8.c} | 11 +- .../{vcmphiq_m_n_u16.c => vhaddq_x_n_u16.c} | 11 +- .../{vcmphiq_m_n_u32.c => vhaddq_x_n_u32.c} | 11 +- .../{vcmpneq_m_n_u8.c => vhaddq_x_n_u8.c} | 11 +- .../intrinsics/{vsriq_m_n_s16.c => vhaddq_x_s16.c} | 6 +- .../intrinsics/{vsriq_m_n_s32.c => vhaddq_x_s32.c} | 6 +- .../intrinsics/{vsriq_m_n_s8.c => vhaddq_x_s8.c} | 6 +- .../intrinsics/{vsriq_m_n_u16.c => vhaddq_x_u16.c} | 6 +- .../intrinsics/{vsriq_m_n_u32.c => vhaddq_x_u32.c} | 6 +- .../intrinsics/{vsriq_m_n_u8.c => vhaddq_x_u8.c} | 6 +- .../{vsriq_m_n_s16.c => vhcaddq_rot270_x_s16.c} | 6 +- .../{vsriq_m_n_s32.c => vhcaddq_rot270_x_s32.c} | 6 +- .../{vsriq_m_n_s8.c => vhcaddq_rot270_x_s8.c} | 6 +- .../{vsriq_m_n_s16.c => vhcaddq_rot90_x_s16.c} | 6 +- .../{vsriq_m_n_s32.c => vhcaddq_rot90_x_s32.c} | 6 +- .../{vsriq_m_n_s8.c => vhcaddq_rot90_x_s8.c} | 6 +- .../{vcmpeqq_m_n_s16.c => vhsubq_x_n_s16.c} | 11 +- .../{vqrshlq_m_n_s32.c => vhsubq_x_n_s32.c} | 7 +- .../{vcmpgeq_m_n_s8.c => vhsubq_x_n_s8.c} | 11 +- .../{vcmphiq_m_n_u16.c => vhsubq_x_n_u16.c} | 11 +- .../{vcmphiq_m_n_u32.c => vhsubq_x_n_u32.c} | 11 +- .../{vcmpneq_m_n_u8.c => vhsubq_x_n_u8.c} | 11 +- .../intrinsics/{vsriq_m_n_s16.c => vhsubq_x_s16.c} | 6 +- .../intrinsics/{vsriq_m_n_s32.c => vhsubq_x_s32.c} | 6 +- .../intrinsics/{vsriq_m_n_s8.c => vhsubq_x_s8.c} | 6 +- .../intrinsics/{vsriq_m_n_u16.c => vhsubq_x_u16.c} | 6 +- .../intrinsics/{vsriq_m_n_u32.c => vhsubq_x_u32.c} | 6 +- .../intrinsics/{vsriq_m_n_u8.c => vhsubq_x_u8.c} | 6 +- .../intrinsics/{vclzq_m_u16.c => vidupq_m_n_u16.c} | 11 +- .../{vdupq_m_n_u32.c => vidupq_m_n_u32.c} | 7 +- .../intrinsics/{vdupq_m_n_u8.c => vidupq_m_n_u8.c} | 11 +- .../{vclzq_m_u16.c => vidupq_m_wb_u16.c} | 11 +- .../{vclzq_m_u32.c => vidupq_m_wb_u32.c} | 11 +- .../{vdupq_m_n_u8.c => vidupq_m_wb_u8.c} | 11 +- .../mve/intrinsics/{vctp32q.c => vidupq_n_u16.c} | 12 +- .../mve/intrinsics/{vctp32q.c => vidupq_n_u32.c} | 12 +- .../mve/intrinsics/{vctp32q.c => vidupq_n_u8.c} | 12 +- .../intrinsics/{vmovlbq_u8.c => vidupq_wb_u16.c} | 12 +- .../intrinsics/{vmovlbq_u16.c => vidupq_wb_u32.c} | 12 +- .../intrinsics/{vqshluq_n_s8.c => vidupq_wb_u8.c} | 12 +- .../intrinsics/{vctp64q_m.c => vidupq_x_n_u16.c} | 11 +- .../intrinsics/{vctp64q_m.c => vidupq_x_n_u32.c} | 11 +- .../mve/intrinsics/{vctp8q_m.c => vidupq_x_n_u8.c} | 11 +- .../{vminaq_m_s16.c => vidupq_x_wb_u16.c} | 13 +- .../{vbicq_m_n_u32.c => vidupq_x_wb_u32.c} | 13 +- .../{vmovnbq_m_u16.c => vidupq_x_wb_u8.c} | 13 +- .../arm/mve/intrinsics/viwdupq_m_n_u16.c | 24 + .../arm/mve/intrinsics/viwdupq_m_n_u32.c | 24 + .../gcc.target/arm/mve/intrinsics/viwdupq_m_n_u8.c | 24 + .../arm/mve/intrinsics/viwdupq_m_wb_u16.c | 24 + .../arm/mve/intrinsics/viwdupq_m_wb_u32.c | 24 + .../arm/mve/intrinsics/viwdupq_m_wb_u8.c | 24 + .../gcc.target/arm/mve/intrinsics/viwdupq_n_u16.c | 22 + .../gcc.target/arm/mve/intrinsics/viwdupq_n_u32.c | 22 + .../gcc.target/arm/mve/intrinsics/viwdupq_n_u8.c | 22 + .../gcc.target/arm/mve/intrinsics/viwdupq_wb_u16.c | 22 + .../gcc.target/arm/mve/intrinsics/viwdupq_wb_u32.c | 22 + .../gcc.target/arm/mve/intrinsics/viwdupq_wb_u8.c | 22 + .../{vbicq_m_n_u16.c => viwdupq_x_n_u16.c} | 11 +- .../{vbicq_m_n_u32.c => viwdupq_x_n_u32.c} | 11 +- .../intrinsics/{vclzq_m_u8.c => viwdupq_x_n_u8.c} | 11 +- .../{vclzq_m_u16.c => viwdupq_x_wb_u16.c} | 11 +- .../{vclzq_m_u32.c => viwdupq_x_wb_u32.c} | 11 +- .../{vmaxaq_m_s8.c => viwdupq_x_wb_u8.c} | 11 +- .../intrinsics/{vldrhq_z_f16.c => vld1q_z_f16.c} | 10 +- .../intrinsics/{vldrwq_z_f32.c => vld1q_z_f32.c} | 10 +- .../intrinsics/{vldrhq_z_s16.c => vld1q_z_s16.c} | 10 +- .../intrinsics/{vldrwq_z_s32.c => vld1q_z_s32.c} | 10 +- .../mve/intrinsics/{vldrbq_z_s8.c => vld1q_z_s8.c} | 10 +- .../intrinsics/{vldrhq_z_u16.c => vld1q_z_u16.c} | 10 +- .../intrinsics/{vldrwq_z_u32.c => vld1q_z_u32.c} | 10 +- .../mve/intrinsics/{vldrbq_z_u8.c => vld1q_z_u8.c} | 10 +- .../gcc.target/arm/mve/intrinsics/vld2q_f16.c | 23 + .../gcc.target/arm/mve/intrinsics/vld2q_f32.c | 23 + .../gcc.target/arm/mve/intrinsics/vld2q_s16.c | 23 + .../gcc.target/arm/mve/intrinsics/vld2q_s32.c | 23 + .../gcc.target/arm/mve/intrinsics/vld2q_s8.c | 23 + .../gcc.target/arm/mve/intrinsics/vld2q_u16.c | 23 + .../gcc.target/arm/mve/intrinsics/vld2q_u32.c | 23 + .../gcc.target/arm/mve/intrinsics/vld2q_u8.c | 23 + .../gcc.target/arm/mve/intrinsics/vld4q_f16.c | 25 + .../gcc.target/arm/mve/intrinsics/vld4q_f32.c | 25 + .../gcc.target/arm/mve/intrinsics/vld4q_s16.c | 25 + .../gcc.target/arm/mve/intrinsics/vld4q_s32.c | 25 + .../gcc.target/arm/mve/intrinsics/vld4q_s8.c | 25 + .../gcc.target/arm/mve/intrinsics/vld4q_u16.c | 25 + .../gcc.target/arm/mve/intrinsics/vld4q_u32.c | 25 + .../gcc.target/arm/mve/intrinsics/vld4q_u8.c | 25 + ...ther_base_s64.c => vldrdq_gather_base_wb_s64.c} | 4 +- ...ther_base_u64.c => vldrdq_gather_base_wb_u64.c} | 4 +- ..._base_z_s64.c => vldrdq_gather_base_wb_z_s64.c} | 6 +- ..._base_z_s64.c => vldrdq_gather_base_wb_z_u64.c} | 6 +- ...ther_base_f32.c => vldrwq_gather_base_wb_f32.c} | 4 +- ...ther_base_s32.c => vldrwq_gather_base_wb_s32.c} | 4 +- ...ther_base_u32.c => vldrwq_gather_base_wb_u32.c} | 4 +- ..._base_z_f32.c => vldrwq_gather_base_wb_z_f32.c} | 4 +- ..._base_z_s32.c => vldrwq_gather_base_wb_z_s32.c} | 4 +- ..._base_z_u32.c => vldrwq_gather_base_wb_z_u32.c} | 4 +- .../{vmaxnmaq_m_f16.c => vmaxnmq_x_f16.c} | 6 +- .../{vmaxnmaq_m_f32.c => vmaxnmq_x_f32.c} | 6 +- .../intrinsics/{vsriq_m_n_s16.c => vmaxq_x_s16.c} | 6 +- .../intrinsics/{vsriq_m_n_s32.c => vmaxq_x_s32.c} | 6 +- .../intrinsics/{vsriq_m_n_s8.c => vmaxq_x_s8.c} | 6 +- .../intrinsics/{vsriq_m_n_u16.c => vmaxq_x_u16.c} | 6 +- .../intrinsics/{vsriq_m_n_u32.c => vmaxq_x_u32.c} | 6 +- .../intrinsics/{vsriq_m_n_u8.c => vmaxq_x_u8.c} | 6 +- .../{vmaxnmaq_m_f16.c => vminnmq_x_f16.c} | 6 +- .../{vmaxnmaq_m_f32.c => vminnmq_x_f32.c} | 6 +- .../intrinsics/{vsriq_m_n_s16.c => vminq_x_s16.c} | 6 +- .../intrinsics/{vsriq_m_n_s32.c => vminq_x_s32.c} | 6 +- .../intrinsics/{vsriq_m_n_s8.c => vminq_x_s8.c} | 6 +- .../intrinsics/{vsriq_m_n_u16.c => vminq_x_u16.c} | 6 +- .../intrinsics/{vsriq_m_n_u32.c => vminq_x_u32.c} | 6 +- .../intrinsics/{vsriq_m_n_u8.c => vminq_x_u8.c} | 6 +- .../{vbicq_m_n_s16.c => vmovlbq_x_s16.c} | 10 +- .../intrinsics/{vmovlbq_m_s8.c => vmovlbq_x_s8.c} | 8 +- .../{vorrq_m_n_u16.c => vmovlbq_x_u16.c} | 10 +- .../intrinsics/{vmovlbq_m_u8.c => vmovlbq_x_u8.c} | 8 +- .../{vbicq_m_n_s16.c => vmovltq_x_s16.c} | 10 +- .../intrinsics/{vmovltq_m_s8.c => vmovltq_x_s8.c} | 8 +- .../{vorrq_m_n_u16.c => vmovltq_x_u16.c} | 10 +- .../intrinsics/{vmovltq_m_u8.c => vmovltq_x_u8.c} | 8 +- .../intrinsics/{vsriq_m_n_s16.c => vmulhq_x_s16.c} | 6 +- .../intrinsics/{vsriq_m_n_s32.c => vmulhq_x_s32.c} | 6 +- .../intrinsics/{vsriq_m_n_s8.c => vmulhq_x_s8.c} | 6 +- .../intrinsics/{vsriq_m_n_u16.c => vmulhq_x_u16.c} | 6 +- .../intrinsics/{vsriq_m_n_u32.c => vmulhq_x_u32.c} | 6 +- .../intrinsics/{vsriq_m_n_u8.c => vmulhq_x_u8.c} | 6 +- .../{vcmpeqq_m_s16.c => vmullbq_int_x_s16.c} | 10 +- .../{vcmpleq_m_s32.c => vmullbq_int_x_s32.c} | 10 +- .../{vcmpleq_m_s8.c => vmullbq_int_x_s8.c} | 10 +- .../{vcmphiq_m_u16.c => vmullbq_int_x_u16.c} | 10 +- .../{vcmphiq_m_u32.c => vmullbq_int_x_u32.c} | 10 +- .../{vcmphiq_m_u8.c => vmullbq_int_x_u8.c} | 10 +- .../{vcmphiq_m_u16.c => vmullbq_poly_x_p16.c} | 10 +- .../{vcmphiq_m_u8.c => vmullbq_poly_x_p8.c} | 10 +- .../{vcmpeqq_m_s16.c => vmulltq_int_x_s16.c} | 10 +- .../{vcmpleq_m_s32.c => vmulltq_int_x_s32.c} | 10 +- .../{vcmpleq_m_s8.c => vmulltq_int_x_s8.c} | 10 +- .../{vcmphiq_m_u16.c => vmulltq_int_x_u16.c} | 10 +- .../{vcmphiq_m_u32.c => vmulltq_int_x_u32.c} | 10 +- .../{vcmphiq_m_u8.c => vmulltq_int_x_u8.c} | 10 +- .../{vcmphiq_m_u16.c => vmulltq_poly_x_p16.c} | 10 +- .../{vcmphiq_m_u8.c => vmulltq_poly_x_p8.c} | 10 +- .../intrinsics/{vmaxnmaq_m_f16.c => vmulq_x_f16.c} | 7 +- .../intrinsics/{vmaxnmaq_m_f32.c => vmulq_x_f32.c} | 7 +- .../{vcmpgtq_m_n_f16.c => vmulq_x_n_f16.c} | 11 +- .../{vcmpgtq_m_n_f32.c => vmulq_x_n_f32.c} | 11 +- .../{vcmpeqq_m_n_s16.c => vmulq_x_n_s16.c} | 11 +- .../{vqrshlq_m_n_s32.c => vmulq_x_n_s32.c} | 7 +- .../{vcmpgeq_m_n_s8.c => vmulq_x_n_s8.c} | 11 +- .../{vcmphiq_m_n_u16.c => vmulq_x_n_u16.c} | 11 +- .../{vcmphiq_m_n_u32.c => vmulq_x_n_u32.c} | 11 +- .../{vcmpneq_m_n_u8.c => vmulq_x_n_u8.c} | 11 +- .../intrinsics/{vsriq_m_n_s16.c => vmulq_x_s16.c} | 7 +- .../intrinsics/{vsriq_m_n_s32.c => vmulq_x_s32.c} | 7 +- .../intrinsics/{vsriq_m_n_s8.c => vmulq_x_s8.c} | 7 +- .../intrinsics/{vsriq_m_n_u16.c => vmulq_x_u16.c} | 7 +- .../intrinsics/{vsriq_m_n_u32.c => vmulq_x_u32.c} | 7 +- .../intrinsics/{vsriq_m_n_u8.c => vmulq_x_u8.c} | 7 +- .../{vmvnq_m_n_s16.c => vmvnq_x_n_s16.c} | 12 +- .../{vmvnq_m_n_s32.c => vmvnq_x_n_s32.c} | 12 +- .../intrinsics/{vcreateq_u16.c => vmvnq_x_n_u16.c} | 7 +- .../intrinsics/{vcreateq_u32.c => vmvnq_x_n_u32.c} | 7 +- .../intrinsics/{vbicq_m_n_s16.c => vmvnq_x_s16.c} | 7 +- .../intrinsics/{vorrq_m_n_s32.c => vmvnq_x_s32.c} | 7 +- .../mve/intrinsics/{vmvnq_m_s8.c => vmvnq_x_s8.c} | 9 +- .../intrinsics/{vbicq_m_n_u16.c => vmvnq_x_u16.c} | 7 +- .../intrinsics/{vorrq_m_n_u32.c => vmvnq_x_u32.c} | 7 +- .../mve/intrinsics/{vmvnq_m_u8.c => vmvnq_x_u8.c} | 9 +- .../intrinsics/{vnegq_m_f16.c => vnegq_x_f16.c} | 8 +- .../intrinsics/{vnegq_m_f32.c => vnegq_x_f32.c} | 8 +- .../intrinsics/{vbicq_m_n_s16.c => vnegq_x_s16.c} | 6 +- .../intrinsics/{vbicq_m_n_s32.c => vnegq_x_s32.c} | 6 +- .../mve/intrinsics/{vnegq_m_s8.c => vnegq_x_s8.c} | 8 +- .../intrinsics/{vmaxnmaq_m_f16.c => vornq_x_f16.c} | 6 +- .../intrinsics/{vmaxnmaq_m_f32.c => vornq_x_f32.c} | 6 +- .../intrinsics/{vsriq_m_n_s16.c => vornq_x_s16.c} | 6 +- .../intrinsics/{vsriq_m_n_s32.c => vornq_x_s32.c} | 6 +- .../intrinsics/{vsriq_m_n_s8.c => vornq_x_s8.c} | 6 +- .../intrinsics/{vsriq_m_n_u16.c => vornq_x_u16.c} | 6 +- .../intrinsics/{vsriq_m_n_u32.c => vornq_x_u32.c} | 6 +- .../intrinsics/{vsriq_m_n_u8.c => vornq_x_u8.c} | 6 +- .../intrinsics/{vmaxnmaq_m_f16.c => vorrq_x_f16.c} | 6 +- .../intrinsics/{vmaxnmaq_m_f32.c => vorrq_x_f32.c} | 6 +- .../intrinsics/{vsriq_m_n_s16.c => vorrq_x_s16.c} | 6 +- .../intrinsics/{vsriq_m_n_s32.c => vorrq_x_s32.c} | 6 +- .../intrinsics/{vsriq_m_n_s8.c => vorrq_x_s8.c} | 6 +- .../intrinsics/{vsriq_m_n_u16.c => vorrq_x_u16.c} | 6 +- .../intrinsics/{vsriq_m_n_u32.c => vorrq_x_u32.c} | 6 +- .../intrinsics/{vsriq_m_n_u8.c => vorrq_x_u8.c} | 6 +- .../arm/mve/intrinsics/vreinterpretq_f16.c | 45 + .../arm/mve/intrinsics/vreinterpretq_f32.c | 45 + .../arm/mve/intrinsics/vreinterpretq_s16.c | 45 + .../arm/mve/intrinsics/vreinterpretq_s32.c | 45 + .../arm/mve/intrinsics/vreinterpretq_s64.c | 46 + .../arm/mve/intrinsics/vreinterpretq_s8.c | 45 + .../arm/mve/intrinsics/vreinterpretq_u16.c | 45 + .../arm/mve/intrinsics/vreinterpretq_u32.c | 45 + .../arm/mve/intrinsics/vreinterpretq_u64.c | 46 + .../arm/mve/intrinsics/vreinterpretq_u8.c | 45 + .../intrinsics/{vrev16q_m_s8.c => vrev16q_x_s8.c} | 8 +- .../intrinsics/{vrev16q_m_u8.c => vrev16q_x_u8.c} | 8 +- .../{vrev32q_m_f16.c => vrev32q_x_f16.c} | 8 +- .../{vbicq_m_n_s16.c => vrev32q_x_s16.c} | 6 +- .../intrinsics/{vrev32q_m_s8.c => vrev32q_x_s8.c} | 8 +- .../{vbicq_m_n_u16.c => vrev32q_x_u16.c} | 6 +- .../intrinsics/{vrev32q_m_u8.c => vrev32q_x_u8.c} | 8 +- .../{vrev64q_m_f16.c => vrev64q_x_f16.c} | 8 +- .../{vrev64q_m_f32.c => vrev64q_x_f32.c} | 8 +- .../{vbicq_m_n_s16.c => vrev64q_x_s16.c} | 6 +- .../{vbicq_m_n_s32.c => vrev64q_x_s32.c} | 6 +- .../intrinsics/{vrev64q_m_s8.c => vrev64q_x_s8.c} | 8 +- .../{vbicq_m_n_u16.c => vrev64q_x_u16.c} | 6 +- .../{vorrq_m_n_u32.c => vrev64q_x_u32.c} | 6 +- .../intrinsics/{vrev64q_m_u8.c => vrev64q_x_u8.c} | 8 +- .../{vsriq_m_n_s16.c => vrhaddq_x_s16.c} | 6 +- .../{vsriq_m_n_s32.c => vrhaddq_x_s32.c} | 6 +- .../intrinsics/{vsriq_m_n_s8.c => vrhaddq_x_s8.c} | 6 +- .../{vsriq_m_n_u16.c => vrhaddq_x_u16.c} | 6 +- .../{vsriq_m_n_u32.c => vrhaddq_x_u32.c} | 6 +- .../intrinsics/{vsriq_m_n_u8.c => vrhaddq_x_u8.c} | 6 +- .../{vsriq_m_n_s16.c => vrmulhq_x_s16.c} | 6 +- .../{vsriq_m_n_s32.c => vrmulhq_x_s32.c} | 6 +- .../intrinsics/{vsriq_m_n_s8.c => vrmulhq_x_s8.c} | 6 +- .../{vsriq_m_n_u16.c => vrmulhq_x_u16.c} | 6 +- .../{vsriq_m_n_u32.c => vrmulhq_x_u32.c} | 6 +- .../intrinsics/{vsriq_m_n_u8.c => vrmulhq_x_u8.c} | 6 +- .../intrinsics/{vrndaq_m_f16.c => vrndaq_x_f16.c} | 8 +- .../intrinsics/{vrndaq_m_f32.c => vrndaq_x_f32.c} | 8 +- .../intrinsics/{vrndmq_m_f16.c => vrndmq_x_f16.c} | 8 +- .../intrinsics/{vrndmq_m_f32.c => vrndmq_x_f32.c} | 8 +- .../intrinsics/{vrndnq_m_f16.c => vrndnq_x_f16.c} | 8 +- .../intrinsics/{vrndnq_m_f32.c => vrndnq_x_f32.c} | 8 +- .../intrinsics/{vrndpq_m_f16.c => vrndpq_x_f16.c} | 8 +- .../intrinsics/{vrndpq_m_f32.c => vrndpq_x_f32.c} | 8 +- .../intrinsics/{vrndq_m_f16.c => vrndq_x_f16.c} | 8 +- .../intrinsics/{vrndq_m_f32.c => vrndq_x_f32.c} | 8 +- .../intrinsics/{vrndxq_m_f16.c => vrndxq_x_f16.c} | 8 +- .../intrinsics/{vrndxq_m_f32.c => vrndxq_x_f32.c} | 8 +- .../intrinsics/{vsriq_m_n_s16.c => vrshlq_x_s16.c} | 6 +- .../intrinsics/{vsriq_m_n_s32.c => vrshlq_x_s32.c} | 6 +- .../intrinsics/{vsriq_m_n_s8.c => vrshlq_x_s8.c} | 6 +- .../intrinsics/{vminaq_m_s16.c => vrshlq_x_u16.c} | 6 +- .../intrinsics/{vminaq_m_s32.c => vrshlq_x_u32.c} | 6 +- .../intrinsics/{vmaxaq_m_s8.c => vrshlq_x_u8.c} | 6 +- .../{vbicq_m_n_s16.c => vrshrq_x_n_s16.c} | 7 +- .../{vorrq_m_n_s32.c => vrshrq_x_n_s32.c} | 7 +- .../{vrshrq_m_n_s8.c => vrshrq_x_n_s8.c} | 8 +- .../{vbicq_m_n_u16.c => vrshrq_x_n_u16.c} | 7 +- .../{vbicq_m_n_u32.c => vrshrq_x_n_u32.c} | 7 +- .../{vrshrq_m_n_u8.c => vrshrq_x_n_u8.c} | 8 +- .../gcc.target/arm/mve/intrinsics/vsbciq_m_s32.c | 24 + .../gcc.target/arm/mve/intrinsics/vsbciq_m_u32.c | 24 + .../gcc.target/arm/mve/intrinsics/vsbciq_s32.c | 22 + .../gcc.target/arm/mve/intrinsics/vsbciq_u32.c | 22 + .../gcc.target/arm/mve/intrinsics/vsbcq_m_s32.c | 24 + .../gcc.target/arm/mve/intrinsics/vsbcq_m_u32.c | 23 + .../gcc.target/arm/mve/intrinsics/vsbcq_s32.c | 22 + .../gcc.target/arm/mve/intrinsics/vsbcq_u32.c | 22 + .../{vbicq_m_n_s16.c => vshllbq_x_n_s16.c} | 13 +- .../{vcreateq_s16.c => vshllbq_x_n_s8.c} | 8 +- .../{vorrq_m_n_u16.c => vshllbq_x_n_u16.c} | 13 +- .../{vcreateq_u16.c => vshllbq_x_n_u8.c} | 8 +- .../{vbicq_m_n_s16.c => vshlltq_x_n_s16.c} | 13 +- .../{vcreateq_s16.c => vshlltq_x_n_s8.c} | 8 +- .../{vorrq_m_n_u16.c => vshlltq_x_n_u16.c} | 13 +- .../{vcreateq_u16.c => vshlltq_x_n_u8.c} | 8 +- .../{vshlq_m_r_s16.c => vshlq_x_n_s16.c} | 11 +- .../{vshlq_m_r_s32.c => vshlq_x_n_s32.c} | 11 +- .../intrinsics/{vshlq_m_r_s8.c => vshlq_x_n_s8.c} | 11 +- .../{vshlq_m_r_u16.c => vshlq_x_n_u16.c} | 11 +- .../{vshlq_m_r_u32.c => vshlq_x_n_u32.c} | 11 +- .../intrinsics/{vshlq_m_r_u8.c => vshlq_x_n_u8.c} | 11 +- .../intrinsics/{vshlq_m_r_s16.c => vshlq_x_s16.c} | 11 +- .../intrinsics/{vshlq_m_r_s32.c => vshlq_x_s32.c} | 11 +- .../intrinsics/{vshlq_m_r_s8.c => vshlq_x_s8.c} | 11 +- .../intrinsics/{vshlq_m_r_u16.c => vshlq_x_u16.c} | 11 +- .../intrinsics/{vshlq_m_r_u32.c => vshlq_x_u32.c} | 11 +- .../intrinsics/{vshlq_m_r_u8.c => vshlq_x_u8.c} | 11 +- .../arm/mve/intrinsics/vshrntq_m_n_u32.c | 5 +- .../{vbicq_m_n_s16.c => vshrq_x_n_s16.c} | 11 +- .../{vorrq_m_n_s32.c => vshrq_x_n_s32.c} | 11 +- .../intrinsics/{vqshlq_n_s16.c => vshrq_x_n_s8.c} | 16 +- .../{vorrq_m_n_u16.c => vshrq_x_n_u16.c} | 11 +- .../intrinsics/{vcreateq_u8.c => vshrq_x_n_u8.c} | 8 +- .../intrinsics/{vstrhq_p_f16.c => vst1q_p_f16.c} | 4 +- .../intrinsics/{vstrwq_p_f32.c => vst1q_p_f32.c} | 4 +- .../intrinsics/{vstrhq_p_s16.c => vst1q_p_s16.c} | 4 +- .../intrinsics/{vstrwq_p_s32.c => vst1q_p_s32.c} | 4 +- .../mve/intrinsics/{vstrbq_p_s8.c => vst1q_p_s8.c} | 4 +- .../intrinsics/{vstrhq_p_u16.c => vst1q_p_u16.c} | 4 +- .../intrinsics/{vstrwq_p_u32.c => vst1q_p_u32.c} | 4 +- .../mve/intrinsics/{vstrbq_p_u8.c => vst1q_p_u8.c} | 4 +- .../gcc.target/arm/mve/intrinsics/vst2q_f16.c | 23 + .../gcc.target/arm/mve/intrinsics/vst2q_f32.c | 23 + .../gcc.target/arm/mve/intrinsics/vst2q_s16.c | 23 + .../gcc.target/arm/mve/intrinsics/vst2q_s32.c | 23 + .../intrinsics/{vmlaldavaq_s32.c => vst2q_s8.c} | 17 +- .../gcc.target/arm/mve/intrinsics/vst2q_u16.c | 23 + .../gcc.target/arm/mve/intrinsics/vst2q_u32.c | 23 + .../gcc.target/arm/mve/intrinsics/vst2q_u8.c | 23 + ...base_p_u64.c => vstrdq_scatter_base_wb_p_s64.c} | 8 +- ...base_p_s64.c => vstrdq_scatter_base_wb_p_u64.c} | 8 +- ...ter_base_s64.c => vstrdq_scatter_base_wb_s64.c} | 8 +- ...ter_base_s64.c => vstrdq_scatter_base_wb_u64.c} | 8 +- ...ter_base_f32.c => vstrwq_scatter_base_wb_f32.c} | 8 +- ...base_p_f32.c => vstrwq_scatter_base_wb_p_f32.c} | 8 +- ...base_p_u32.c => vstrwq_scatter_base_wb_p_s32.c} | 8 +- ...base_p_s32.c => vstrwq_scatter_base_wb_p_u32.c} | 8 +- ...ter_base_s32.c => vstrwq_scatter_base_wb_s32.c} | 8 +- ...ter_base_s32.c => vstrwq_scatter_base_wb_u32.c} | 8 +- .../intrinsics/{vmaxnmaq_m_f16.c => vsubq_x_f16.c} | 11 +- .../intrinsics/{vmaxnmaq_m_f32.c => vsubq_x_f32.c} | 11 +- .../{vcmpgeq_m_n_f16.c => vsubq_x_n_f16.c} | 13 +- .../{vcmpgeq_m_n_f32.c => vsubq_x_n_f32.c} | 13 +- .../{vcmpleq_m_n_s16.c => vsubq_x_n_s16.c} | 13 +- .../{vshlq_m_r_s32.c => vsubq_x_n_s32.c} | 11 +- .../{vcmpltq_m_n_s8.c => vsubq_x_n_s8.c} | 13 +- .../{vcmpneq_m_n_u16.c => vsubq_x_n_u16.c} | 13 +- .../{vcmpneq_m_n_u32.c => vsubq_x_n_u32.c} | 13 +- .../{vcmpeqq_m_n_u8.c => vsubq_x_n_u8.c} | 13 +- .../intrinsics/{vsriq_m_n_s16.c => vsubq_x_s16.c} | 11 +- .../intrinsics/{vsriq_m_n_s32.c => vsubq_x_s32.c} | 11 +- .../intrinsics/{vsriq_m_n_s8.c => vsubq_x_s8.c} | 11 +- .../intrinsics/{vsriq_m_n_u16.c => vsubq_x_u16.c} | 11 +- .../intrinsics/{vsriq_m_n_u32.c => vsubq_x_u32.c} | 11 +- .../intrinsics/{vsriq_m_n_u8.c => vsubq_x_u8.c} | 11 +- .../arm/mve/intrinsics/vuninitializedq_float.c | 17 + .../arm/mve/intrinsics/vuninitializedq_float1.c | 17 + .../arm/mve/intrinsics/vuninitializedq_int.c | 29 + .../arm/mve/intrinsics/vuninitializedq_int1.c | 29 + gcc/testsuite/gdc.dg/fileimports/pr93038.txt | 1 + gcc/testsuite/gdc.dg/pr93038.d | 8 + gcc/testsuite/gdc.dg/pr93038b.d | 8 + .../gdc.test/compilable/imports/pr9471a.d | 2 + .../gdc.test/compilable/imports/pr9471b.d | 5 + .../gdc.test/compilable/imports/pr9471c.d | 18 + .../gdc.test/compilable/imports/pr9471d.d | 1 + gcc/testsuite/gdc.test/compilable/pr9471.d | 6 + gcc/testsuite/gdc.test/runnable/traits.d | 4 +- gcc/testsuite/lib/target-supports.exp | 2 +- gcc/tree-sra.c | 37 +- gcc/tree-ssa-forwprop.c | 1 + gcc/tree-ssa-phiopt.c | 10 +- gcc/tree-vect-slp.c | 4 +- include/ChangeLog | 19 + include/lto-symtab.h | 13 + include/plugin-api.h | 32 +- libgomp/ChangeLog | 10 + libgomp/testsuite/libgomp.c++/pr93931.C | 120 + .../libgomp.c-c++-common/function-not-offloaded.c | 1 + libstdc++-v3/ChangeLog | 30 + libstdc++-v3/include/bits/fs_path.h | 11 +- libstdc++-v3/include/experimental/bits/fs_path.h | 40 +- libstdc++-v3/include/std/type_traits | 70 +- .../93208.cc => is_nothrow_constructible/94003.cc} | 31 +- .../replace_filename.cc => generic/94242.cc} | 26 +- .../filesystem/path/generic/generic_string.cc | 32 + .../filesystem/path/generic/generic_string.cc | 46 +- lto-plugin/ChangeLog | 20 + lto-plugin/lto-plugin.c | 141 +- 670 files changed, 26598 insertions(+), 9487 deletions(-) create mode 100644 gcc/testsuite/g++.dg/abi/empty30.C create mode 100644 gcc/testsuite/g++.dg/concepts/diagnostic6.C create mode 100644 gcc/testsuite/g++.dg/cpp0x/decltype74.C create mode 100644 gcc/testsuite/g++.dg/cpp0x/decltype75.C create mode 100644 gcc/testsuite/g++.dg/cpp1y/constexpr-union2.C create mode 100644 gcc/testsuite/g++.dg/cpp1y/constexpr-union3.C create mode 100644 gcc/testsuite/g++.dg/cpp1y/constexpr-union4.C create mode 100644 gcc/testsuite/g++.dg/cpp1y/constexpr-union5.C create mode 100644 gcc/testsuite/g++.dg/cpp1y/pr94066-2.C create mode 100644 gcc/testsuite/g++.dg/cpp1y/pr94066-3.C create mode 100644 gcc/testsuite/g++.dg/cpp1y/pr94066.C create mode 100644 gcc/testsuite/g++.dg/cpp2a/constexpr-union1.C create mode 100644 gcc/testsuite/g++.dg/torture/pr93347.C create mode 100644 gcc/testsuite/g++.dg/torture/pr94202.C create mode 100644 gcc/testsuite/g++.dg/torture/pr94216.C create mode 100644 gcc/testsuite/g++.dg/tree-ssa/pr94224.C create mode 100644 gcc/testsuite/g++.target/aarch64/pr94052.C create mode 100644 gcc/testsuite/gcc.c-torture/pr92372.c create mode 100644 gcc/testsuite/gcc.dg/attr-flatten-1.c create mode 100644 gcc/testsuite/gcc.dg/pr94211.c create mode 100644 gcc/testsuite/gcc.dg/tree-ssa/pr93435.c create mode 100644 gcc/testsuite/gcc.misc-tests/gcov-pr94029.c create mode 100644 gcc/testsuite/gcc.target/aarch64/pr94072.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_move_gpr_to_gpr.c copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vmaxnmaq_m_f16.c => vabdq_x_f16. [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vmaxnmaq_m_f32.c => vabdq_x_f32. [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vsriq_m_n_s16.c => vabdq_x_s16.c} (70%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vsriq_m_n_s32.c => vabdq_x_s32.c} (76%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vsriq_m_n_s8.c => vabdq_x_s8.c} (77%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vsriq_m_n_u16.c => vabdq_x_u16.c} (77%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vsriq_m_n_u32.c => vabdq_x_u32.c} (77%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vsriq_m_n_u8.c => vabdq_x_u8.c} (77%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vabsq_m_f16.c => vabsq_x_f16.c} (65%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vabsq_m_f32.c => vabsq_x_f32.c} (65%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vbicq_m_n_s16.c => vabsq_x_s16.c} (75%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vbicq_m_n_s32.c => vabsq_x_s32.c} (76%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vabsq_m_s8.c => vabsq_x_s8.c} (65%) create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vadciq_m_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vadciq_m_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vadciq_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vadciq_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vadcq_m_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vadcq_m_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vadcq_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vadcq_u32.c copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vaddq_n_f16.c => vaddq_f16.c} (77%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vaddq_n_f32.c => vaddq_f32.c} (77%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vaddq_n_s16.c => vaddq_s16.c} (78%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vaddq_n_s32.c => vaddq_s32.c} (78%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vaddq_n_s8.c => vaddq_s8.c} (78%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vaddq_n_u16.c => vaddq_u16.c} (78%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vaddq_n_u32.c => vaddq_u32.c} (78%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vaddq_n_u8.c => vaddq_u8.c} (78%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vmaxnmaq_m_f16.c => vaddq_x_f16. [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vmaxnmaq_m_f32.c => vaddq_x_f32. [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcmpgtq_m_n_f16.c => vaddq_x_n_f [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcmpleq_m_n_f32.c => vaddq_x_n_f [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcmpleq_m_n_s16.c => vaddq_x_n_s [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vqrshlq_m_n_s32.c => vaddq_x_n_s [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcmpgeq_m_n_s8.c => vaddq_x_n_s8 [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcmpneq_m_n_u16.c => vaddq_x_n_u [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcmpneq_m_n_u32.c => vaddq_x_n_u [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcmpneq_m_n_u8.c => vaddq_x_n_u8 [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vsriq_m_n_s16.c => vaddq_x_s16.c} (70%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vsriq_m_n_s32.c => vaddq_x_s32.c} (70%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vsriq_m_n_s8.c => vaddq_x_s8.c} (71%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vsriq_m_n_u16.c => vaddq_x_u16.c} (71%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vsriq_m_n_u32.c => vaddq_x_u32.c} (71%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vsriq_m_n_u8.c => vaddq_x_u8.c} (71%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vmaxnmaq_m_f16.c => vandq_x_f16. [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vmaxnmaq_m_f32.c => vandq_x_f32. [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vsriq_m_n_s16.c => vandq_x_s16.c} (76%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vsriq_m_n_s32.c => vandq_x_s32.c} (76%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vsriq_m_n_s8.c => vandq_x_s8.c} (77%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vsriq_m_n_u16.c => vandq_x_u16.c} (77%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vsriq_m_n_u32.c => vandq_x_u32.c} (77%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vsriq_m_n_u8.c => vandq_x_u8.c} (77%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vmaxnmaq_m_f16.c => vbicq_x_f16. [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vmaxnmaq_m_f32.c => vbicq_x_f32. [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vsriq_m_n_s16.c => vbicq_x_s16.c} (76%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vsriq_m_n_s32.c => vbicq_x_s32.c} (76%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vsriq_m_n_s8.c => vbicq_x_s8.c} (77%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vsriq_m_n_u16.c => vbicq_x_u16.c} (77%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vsriq_m_n_u32.c => vbicq_x_u32.c} (77%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vsriq_m_n_u8.c => vbicq_x_u8.c} (77%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vbrsrq_m_n_f16.c => vbrsrq_x_n_f [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vbrsrq_m_n_f32.c => vbrsrq_x_n_f [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vqrshlq_m_n_s16.c => vbrsrq_x_n_ [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vqrshlq_m_n_s32.c => vbrsrq_x_n_ [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vshlq_m_r_s8.c => vbrsrq_x_n_s8. [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vqrshlq_m_n_u16.c => vbrsrq_x_n_ [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vqrshlq_m_n_u32.c => vbrsrq_x_n_ [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vrshlq_m_n_u8.c => vbrsrq_x_n_u8 [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vmaxnmaq_m_f16.c => vcaddq_rot27 [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vmaxnmaq_m_f32.c => vcaddq_rot27 [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vsriq_m_n_s16.c => vcaddq_rot270 [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vsriq_m_n_s32.c => vcaddq_rot270 [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vsriq_m_n_s8.c => vcaddq_rot270_ [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vsriq_m_n_u16.c => vcaddq_rot270 [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vsriq_m_n_u32.c => vcaddq_rot270 [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vsriq_m_n_u8.c => vcaddq_rot270_ [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vmaxnmaq_m_f16.c => vcaddq_rot90 [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vmaxnmaq_m_f32.c => vcaddq_rot90 [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vsriq_m_n_s16.c => vcaddq_rot90_ [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vsriq_m_n_s32.c => vcaddq_rot90_ [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vsriq_m_n_s8.c => vcaddq_rot90_x [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vsriq_m_n_u16.c => vcaddq_rot90_ [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vsriq_m_n_u32.c => vcaddq_rot90_ [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vsriq_m_n_u8.c => vcaddq_rot90_x [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vbicq_m_n_s16.c => vclsq_x_s16.c} (75%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vbicq_m_n_s32.c => vclsq_x_s32.c} (76%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vclsq_m_s8.c => vclsq_x_s8.c} (65%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vbicq_m_n_s16.c => vclzq_x_s16.c} (75%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vbicq_m_n_s32.c => vclzq_x_s32.c} (76%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vclzq_m_s8.c => vclzq_x_s8.c} (65%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vorrq_m_n_u16.c => vclzq_x_u16.c} (76%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vorrq_m_n_u32.c => vclzq_x_u32.c} (76%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vclzq_m_u8.c => vclzq_x_u8.c} (65%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vmaxnmaq_m_f16.c => vcmulq_rot18 [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vmaxnmaq_m_f32.c => vcmulq_rot18 [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vmaxnmaq_m_f16.c => vcmulq_rot27 [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vmaxnmaq_m_f32.c => vcmulq_rot27 [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vmaxnmaq_m_f16.c => vcmulq_rot90 [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vmaxnmaq_m_f32.c => vcmulq_rot90 [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vmaxnmaq_m_f16.c => vcmulq_x_f16 [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vmaxnmaq_m_f32.c => vcmulq_x_f32 [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcvtaq_m_s16_f16.c => vcvtaq_x_s [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcvtaq_m_s32_f32.c => vcvtaq_x_s [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcvtaq_m_u16_f16.c => vcvtaq_x_u [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcvtaq_m_u32_f32.c => vcvtaq_x_u [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcvtbq_f32_f16.c => vcvtbq_x_f32 [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcvtmq_m_s16_f16.c => vcvtmq_x_s [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcvtmq_m_s32_f32.c => vcvtmq_x_s [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcvtmq_m_u16_f16.c => vcvtmq_x_u [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcvtmq_m_u32_f32.c => vcvtmq_x_u [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcvtnq_m_s16_f16.c => vcvtnq_x_s [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcvtnq_m_s32_f32.c => vcvtnq_x_s [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcvtnq_m_u16_f16.c => vcvtnq_x_u [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcvtnq_m_u32_f32.c => vcvtnq_x_u [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcvtpq_m_s16_f16.c => vcvtpq_x_s [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcvtpq_m_s32_f32.c => vcvtpq_x_s [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcvtpq_m_u16_f16.c => vcvtpq_x_u [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcvtpq_m_u32_f32.c => vcvtpq_x_u [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcvtq_m_n_f16_s16.c => vcvtq_x_f [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcvtq_m_n_f16_u16.c => vcvtq_x_f [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcvtq_m_n_f32_s32.c => vcvtq_x_f [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcvtq_m_n_f32_u32.c => vcvtq_x_f [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcvtq_m_n_f16_s16.c => vcvtq_x_n [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcvtq_m_n_f16_u16.c => vcvtq_x_n [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcvtq_m_n_f32_s32.c => vcvtq_x_n [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcvtq_m_n_f32_u32.c => vcvtq_x_n [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcvtq_m_s16_f16.c => vcvtq_x_n_s [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcvtq_m_s32_f32.c => vcvtq_x_n_s [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcvtq_m_u16_f16.c => vcvtq_x_n_u [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcvtq_m_u32_f32.c => vcvtq_x_n_u [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcvtq_m_s16_f16.c => vcvtq_x_s16 [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcvtq_m_s32_f32.c => vcvtq_x_s32 [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcvtaq_u16_f16.c => vcvtq_x_u16_ [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcvtaq_u32_f32.c => vcvtq_x_u32_ [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcvtbq_f32_f16.c => vcvttq_x_f32 [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vclzq_m_u16.c => vddupq_m_n_u16. [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vdupq_m_n_u32.c => vddupq_m_n_u3 [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vdupq_m_n_u8.c => vddupq_m_n_u8. [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vclzq_m_u16.c => vddupq_m_wb_u16 [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vclzq_m_u32.c => vddupq_m_wb_u32 [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vdupq_m_n_u8.c => vddupq_m_wb_u8 [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vctp32q.c => vddupq_n_u16.c} (55%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vctp32q.c => vddupq_n_u32.c} (55%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vctp32q.c => vddupq_n_u8.c} (55%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vmovlbq_u8.c => vddupq_wb_u16.c} (51%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vmovlbq_u16.c => vddupq_wb_u32.c} (51%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vqshluq_n_s8.c => vddupq_wb_u8.c} (52%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vctp64q_m.c => vddupq_x_n_u16.c} (63%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vctp64q_m.c => vddupq_x_n_u32.c} (63%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vctp8q_m.c => vddupq_x_n_u8.c} (64%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vminaq_m_s16.c => vddupq_x_wb_u1 [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vbicq_m_n_u32.c => vddupq_x_wb_u [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vmovnbq_m_u16.c => vddupq_x_wb_u [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcvtbq_f16_f32.c => vdupq_x_n_f1 [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcvtbq_f32_f16.c => vdupq_x_n_f3 [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vbicq_n_s16.c => vdupq_x_n_s16.c} (55%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcreateq_s32.c => vdupq_x_n_s32. [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcreateq_s8.c => vdupq_x_n_s8.c} (55%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcreateq_u16.c => vdupq_x_n_u16. [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vctp8q_m.c => vdupq_x_n_u32.c} (55%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcreateq_u8.c => vdupq_x_n_u8.c} (55%) create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_m_n_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_m_n_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_m_n_u8.c copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vqrshlq_m_n_u16.c => vdwdupq_m_w [...] create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_m_wb_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_m_wb_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_n_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_n_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_n_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_wb_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_wb_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_wb_u8.c copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vbicq_m_n_u16.c => vdwdupq_x_n_u [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vbicq_m_n_u32.c => vdwdupq_x_n_u [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vclzq_m_u8.c => vdwdupq_x_n_u8.c} (52%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vclzq_m_u16.c => vdwdupq_x_wb_u1 [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vclzq_m_u32.c => vdwdupq_x_wb_u3 [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vmaxaq_m_s8.c => vdwdupq_x_wb_u8 [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vmaxnmaq_m_f16.c => veorq_x_f16. [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vmaxnmaq_m_f32.c => veorq_x_f32. [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vsriq_m_n_s16.c => veorq_x_s16.c} (71%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vsriq_m_n_s32.c => veorq_x_s32.c} (71%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vsriq_m_n_s8.c => veorq_x_s8.c} (71%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vsriq_m_n_u16.c => veorq_x_u16.c} (72%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vsriq_m_n_u32.c => veorq_x_u32.c} (72%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vsriq_m_n_u8.c => veorq_x_u8.c} (72%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcmpeqq_m_n_s16.c => vhaddq_x_n_ [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vqrshlq_m_n_s32.c => vhaddq_x_n_ [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcmpgeq_m_n_s8.c => vhaddq_x_n_s [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcmphiq_m_n_u16.c => vhaddq_x_n_ [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcmphiq_m_n_u32.c => vhaddq_x_n_ [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcmpneq_m_n_u8.c => vhaddq_x_n_u [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vsriq_m_n_s16.c => vhaddq_x_s16. [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vsriq_m_n_s32.c => vhaddq_x_s32. [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vsriq_m_n_s8.c => vhaddq_x_s8.c} (77%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vsriq_m_n_u16.c => vhaddq_x_u16. [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vsriq_m_n_u32.c => vhaddq_x_u32. [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vsriq_m_n_u8.c => vhaddq_x_u8.c} (77%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vsriq_m_n_s16.c => vhcaddq_rot27 [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vsriq_m_n_s32.c => vhcaddq_rot27 [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vsriq_m_n_s8.c => vhcaddq_rot270 [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vsriq_m_n_s16.c => vhcaddq_rot90 [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vsriq_m_n_s32.c => vhcaddq_rot90 [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vsriq_m_n_s8.c => vhcaddq_rot90_ [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcmpeqq_m_n_s16.c => vhsubq_x_n_ [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vqrshlq_m_n_s32.c => vhsubq_x_n_ [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcmpgeq_m_n_s8.c => vhsubq_x_n_s [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcmphiq_m_n_u16.c => vhsubq_x_n_ [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcmphiq_m_n_u32.c => vhsubq_x_n_ [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcmpneq_m_n_u8.c => vhsubq_x_n_u [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vsriq_m_n_s16.c => vhsubq_x_s16. [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vsriq_m_n_s32.c => vhsubq_x_s32. [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vsriq_m_n_s8.c => vhsubq_x_s8.c} (77%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vsriq_m_n_u16.c => vhsubq_x_u16. [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vsriq_m_n_u32.c => vhsubq_x_u32. [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vsriq_m_n_u8.c => vhsubq_x_u8.c} (77%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vclzq_m_u16.c => vidupq_m_n_u16. [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vdupq_m_n_u32.c => vidupq_m_n_u3 [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vdupq_m_n_u8.c => vidupq_m_n_u8. [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vclzq_m_u16.c => vidupq_m_wb_u16 [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vclzq_m_u32.c => vidupq_m_wb_u32 [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vdupq_m_n_u8.c => vidupq_m_wb_u8 [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vctp32q.c => vidupq_n_u16.c} (55%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vctp32q.c => vidupq_n_u32.c} (55%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vctp32q.c => vidupq_n_u8.c} (55%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vmovlbq_u8.c => vidupq_wb_u16.c} (51%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vmovlbq_u16.c => vidupq_wb_u32.c} (51%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vqshluq_n_s8.c => vidupq_wb_u8.c} (52%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vctp64q_m.c => vidupq_x_n_u16.c} (63%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vctp64q_m.c => vidupq_x_n_u32.c} (63%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vctp8q_m.c => vidupq_x_n_u8.c} (64%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vminaq_m_s16.c => vidupq_x_wb_u1 [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vbicq_m_n_u32.c => vidupq_x_wb_u [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vmovnbq_m_u16.c => vidupq_x_wb_u [...] create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_n_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_n_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_n_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_wb_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_wb_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_wb_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_n_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_n_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_n_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_wb_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_wb_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_wb_u8.c copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vbicq_m_n_u16.c => viwdupq_x_n_u [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vbicq_m_n_u32.c => viwdupq_x_n_u [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vclzq_m_u8.c => viwdupq_x_n_u8.c} (52%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vclzq_m_u16.c => viwdupq_x_wb_u1 [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vclzq_m_u32.c => viwdupq_x_wb_u3 [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vmaxaq_m_s8.c => viwdupq_x_wb_u8 [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vldrhq_z_f16.c => vld1q_z_f16.c} (62%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vldrwq_z_f32.c => vld1q_z_f32.c} (62%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vldrhq_z_s16.c => vld1q_z_s16.c} (62%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vldrwq_z_s32.c => vld1q_z_s32.c} (62%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vldrbq_z_s8.c => vld1q_z_s8.c} (62%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vldrhq_z_u16.c => vld1q_z_u16.c} (62%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vldrwq_z_u32.c => vld1q_z_u32.c} (62%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vldrbq_z_u8.c => vld1q_z_u8.c} (62%) create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vld4q_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vld4q_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vld4q_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vld4q_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vld4q_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vld4q_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vld4q_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vld4q_u8.c copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vldrdq_gather_base_s64.c => vldr [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vldrdq_gather_base_u64.c => vldr [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vldrdq_gather_base_z_s64.c => vl [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vldrdq_gather_base_z_s64.c => vl [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vldrwq_gather_base_f32.c => vldr [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vldrwq_gather_base_s32.c => vldr [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vldrwq_gather_base_u32.c => vldr [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vldrwq_gather_base_z_f32.c => vl [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vldrwq_gather_base_z_s32.c => vl [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vldrwq_gather_base_z_u32.c => vl [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vmaxnmaq_m_f16.c => vmaxnmq_x_f1 [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vmaxnmaq_m_f32.c => vmaxnmq_x_f3 [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vsriq_m_n_s16.c => vmaxq_x_s16.c} (76%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vsriq_m_n_s32.c => vmaxq_x_s32.c} (76%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vsriq_m_n_s8.c => vmaxq_x_s8.c} (77%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vsriq_m_n_u16.c => vmaxq_x_u16.c} (77%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vsriq_m_n_u32.c => vmaxq_x_u32.c} (77%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vsriq_m_n_u8.c => vmaxq_x_u8.c} (77%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vmaxnmaq_m_f16.c => vminnmq_x_f1 [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vmaxnmaq_m_f32.c => vminnmq_x_f3 [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vsriq_m_n_s16.c => vminq_x_s16.c} (76%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vsriq_m_n_s32.c => vminq_x_s32.c} (76%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vsriq_m_n_s8.c => vminq_x_s8.c} (77%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vsriq_m_n_u16.c => vminq_x_u16.c} (77%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vsriq_m_n_u32.c => vminq_x_u32.c} (77%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vsriq_m_n_u8.c => vminq_x_u8.c} (77%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vbicq_m_n_s16.c => vmovlbq_x_s16 [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vmovlbq_m_s8.c => vmovlbq_x_s8.c} (65%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vorrq_m_n_u16.c => vmovlbq_x_u16 [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vmovlbq_m_u8.c => vmovlbq_x_u8.c} (65%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vbicq_m_n_s16.c => vmovltq_x_s16 [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vmovltq_m_s8.c => vmovltq_x_s8.c} (65%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vorrq_m_n_u16.c => vmovltq_x_u16 [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vmovltq_m_u8.c => vmovltq_x_u8.c} (65%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vsriq_m_n_s16.c => vmulhq_x_s16. [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vsriq_m_n_s32.c => vmulhq_x_s32. [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vsriq_m_n_s8.c => vmulhq_x_s8.c} (77%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vsriq_m_n_u16.c => vmulhq_x_u16. [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vsriq_m_n_u32.c => vmulhq_x_u32. [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vsriq_m_n_u8.c => vmulhq_x_u8.c} (77%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcmpeqq_m_s16.c => vmullbq_int_x [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcmpleq_m_s32.c => vmullbq_int_x [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcmpleq_m_s8.c => vmullbq_int_x_ [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcmphiq_m_u16.c => vmullbq_int_x [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcmphiq_m_u32.c => vmullbq_int_x [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcmphiq_m_u8.c => vmullbq_int_x_ [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcmphiq_m_u16.c => vmullbq_poly_ [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcmphiq_m_u8.c => vmullbq_poly_x [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcmpeqq_m_s16.c => vmulltq_int_x [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcmpleq_m_s32.c => vmulltq_int_x [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcmpleq_m_s8.c => vmulltq_int_x_ [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcmphiq_m_u16.c => vmulltq_int_x [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcmphiq_m_u32.c => vmulltq_int_x [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcmphiq_m_u8.c => vmulltq_int_x_ [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcmphiq_m_u16.c => vmulltq_poly_ [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcmphiq_m_u8.c => vmulltq_poly_x [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vmaxnmaq_m_f16.c => vmulq_x_f16. [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vmaxnmaq_m_f32.c => vmulq_x_f32. [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcmpgtq_m_n_f16.c => vmulq_x_n_f [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcmpgtq_m_n_f32.c => vmulq_x_n_f [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcmpeqq_m_n_s16.c => vmulq_x_n_s [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vqrshlq_m_n_s32.c => vmulq_x_n_s [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcmpgeq_m_n_s8.c => vmulq_x_n_s8 [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcmphiq_m_n_u16.c => vmulq_x_n_u [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcmphiq_m_n_u32.c => vmulq_x_n_u [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcmpneq_m_n_u8.c => vmulq_x_n_u8 [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vsriq_m_n_s16.c => vmulq_x_s16.c} (70%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vsriq_m_n_s32.c => vmulq_x_s32.c} (70%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vsriq_m_n_s8.c => vmulq_x_s8.c} (71%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vsriq_m_n_u16.c => vmulq_x_u16.c} (71%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vsriq_m_n_u32.c => vmulq_x_u32.c} (71%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vsriq_m_n_u8.c => vmulq_x_u8.c} (71%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vmvnq_m_n_s16.c => vmvnq_x_n_s16 [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vmvnq_m_n_s32.c => vmvnq_x_n_s32 [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcreateq_u16.c => vmvnq_x_n_u16. [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcreateq_u32.c => vmvnq_x_n_u32. [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vbicq_m_n_s16.c => vmvnq_x_s16.c} (71%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vorrq_m_n_s32.c => vmvnq_x_s32.c} (71%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vmvnq_m_s8.c => vmvnq_x_s8.c} (65%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vbicq_m_n_u16.c => vmvnq_x_u16.c} (71%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vorrq_m_n_u32.c => vmvnq_x_u32.c} (71%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vmvnq_m_u8.c => vmvnq_x_u8.c} (65%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vnegq_m_f16.c => vnegq_x_f16.c} (65%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vnegq_m_f32.c => vnegq_x_f32.c} (65%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vbicq_m_n_s16.c => vnegq_x_s16.c} (75%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vbicq_m_n_s32.c => vnegq_x_s32.c} (76%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vnegq_m_s8.c => vnegq_x_s8.c} (65%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vmaxnmaq_m_f16.c => vornq_x_f16. [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vmaxnmaq_m_f32.c => vornq_x_f32. [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vsriq_m_n_s16.c => vornq_x_s16.c} (76%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vsriq_m_n_s32.c => vornq_x_s32.c} (76%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vsriq_m_n_s8.c => vornq_x_s8.c} (77%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vsriq_m_n_u16.c => vornq_x_u16.c} (77%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vsriq_m_n_u32.c => vornq_x_u32.c} (77%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vsriq_m_n_u8.c => vornq_x_u8.c} (77%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vmaxnmaq_m_f16.c => vorrq_x_f16. [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vmaxnmaq_m_f32.c => vorrq_x_f32. [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vsriq_m_n_s16.c => vorrq_x_s16.c} (76%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vsriq_m_n_s32.c => vorrq_x_s32.c} (76%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vsriq_m_n_s8.c => vorrq_x_s8.c} (77%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vsriq_m_n_u16.c => vorrq_x_u16.c} (77%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vsriq_m_n_u32.c => vorrq_x_u32.c} (77%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vsriq_m_n_u8.c => vorrq_x_u8.c} (77%) create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vreinterpretq_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vreinterpretq_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vreinterpretq_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vreinterpretq_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vreinterpretq_s64.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vreinterpretq_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vreinterpretq_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vreinterpretq_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vreinterpretq_u64.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vreinterpretq_u8.c copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vrev16q_m_s8.c => vrev16q_x_s8.c} (65%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vrev16q_m_u8.c => vrev16q_x_u8.c} (65%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vrev32q_m_f16.c => vrev32q_x_f16 [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vbicq_m_n_s16.c => vrev32q_x_s16 [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vrev32q_m_s8.c => vrev32q_x_s8.c} (65%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vbicq_m_n_u16.c => vrev32q_x_u16 [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vrev32q_m_u8.c => vrev32q_x_u8.c} (65%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vrev64q_m_f16.c => vrev64q_x_f16 [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vrev64q_m_f32.c => vrev64q_x_f32 [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vbicq_m_n_s16.c => vrev64q_x_s16 [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vbicq_m_n_s32.c => vrev64q_x_s32 [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vrev64q_m_s8.c => vrev64q_x_s8.c} (65%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vbicq_m_n_u16.c => vrev64q_x_u16 [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vorrq_m_n_u32.c => vrev64q_x_u32 [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vrev64q_m_u8.c => vrev64q_x_u8.c} (65%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vsriq_m_n_s16.c => vrhaddq_x_s16 [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vsriq_m_n_s32.c => vrhaddq_x_s32 [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vsriq_m_n_s8.c => vrhaddq_x_s8.c} (77%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vsriq_m_n_u16.c => vrhaddq_x_u16 [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vsriq_m_n_u32.c => vrhaddq_x_u32 [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vsriq_m_n_u8.c => vrhaddq_x_u8.c} (77%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vsriq_m_n_s16.c => vrmulhq_x_s16 [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vsriq_m_n_s32.c => vrmulhq_x_s32 [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vsriq_m_n_s8.c => vrmulhq_x_s8.c} (77%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vsriq_m_n_u16.c => vrmulhq_x_u16 [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vsriq_m_n_u32.c => vrmulhq_x_u32 [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vsriq_m_n_u8.c => vrmulhq_x_u8.c} (77%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vrndaq_m_f16.c => vrndaq_x_f16.c} (65%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vrndaq_m_f32.c => vrndaq_x_f32.c} (65%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vrndmq_m_f16.c => vrndmq_x_f16.c} (65%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vrndmq_m_f32.c => vrndmq_x_f32.c} (65%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vrndnq_m_f16.c => vrndnq_x_f16.c} (65%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vrndnq_m_f32.c => vrndnq_x_f32.c} (65%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vrndpq_m_f16.c => vrndpq_x_f16.c} (65%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vrndpq_m_f32.c => vrndpq_x_f32.c} (65%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vrndq_m_f16.c => vrndq_x_f16.c} (65%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vrndq_m_f32.c => vrndq_x_f32.c} (65%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vrndxq_m_f16.c => vrndxq_x_f16.c} (65%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vrndxq_m_f32.c => vrndxq_x_f32.c} (65%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vsriq_m_n_s16.c => vrshlq_x_s16. [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vsriq_m_n_s32.c => vrshlq_x_s32. [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vsriq_m_n_s8.c => vrshlq_x_s8.c} (77%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vminaq_m_s16.c => vrshlq_x_u16.c} (77%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vminaq_m_s32.c => vrshlq_x_u32.c} (77%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vmaxaq_m_s8.c => vrshlq_x_u8.c} (77%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vbicq_m_n_s16.c => vrshrq_x_n_s1 [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vorrq_m_n_s32.c => vrshrq_x_n_s3 [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vrshrq_m_n_s8.c => vrshrq_x_n_s8 [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vbicq_m_n_u16.c => vrshrq_x_n_u1 [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vbicq_m_n_u32.c => vrshrq_x_n_u3 [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vrshrq_m_n_u8.c => vrshrq_x_n_u8 [...] create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbciq_m_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbciq_m_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbciq_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbciq_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbcq_m_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbcq_m_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbcq_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbcq_u32.c copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vbicq_m_n_s16.c => vshllbq_x_n_s [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcreateq_s16.c => vshllbq_x_n_s8 [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vorrq_m_n_u16.c => vshllbq_x_n_u [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcreateq_u16.c => vshllbq_x_n_u8 [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vbicq_m_n_s16.c => vshlltq_x_n_s [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcreateq_s16.c => vshlltq_x_n_s8 [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vorrq_m_n_u16.c => vshlltq_x_n_u [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcreateq_u16.c => vshlltq_x_n_u8 [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vshlq_m_r_s16.c => vshlq_x_n_s16 [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vshlq_m_r_s32.c => vshlq_x_n_s32 [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vshlq_m_r_s8.c => vshlq_x_n_s8.c} (57%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vshlq_m_r_u16.c => vshlq_x_n_u16 [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vshlq_m_r_u32.c => vshlq_x_n_u32 [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vshlq_m_r_u8.c => vshlq_x_n_u8.c} (57%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vshlq_m_r_s16.c => vshlq_x_s16.c} (57%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vshlq_m_r_s32.c => vshlq_x_s32.c} (57%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vshlq_m_r_s8.c => vshlq_x_s8.c} (57%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vshlq_m_r_u16.c => vshlq_x_u16.c} (57%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vshlq_m_r_u32.c => vshlq_x_u32.c} (57%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vshlq_m_r_u8.c => vshlq_x_u8.c} (57%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vbicq_m_n_s16.c => vshrq_x_n_s16 [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vorrq_m_n_s32.c => vshrq_x_n_s32 [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vqshlq_n_s16.c => vshrq_x_n_s8.c} (58%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vorrq_m_n_u16.c => vshrq_x_n_u16 [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcreateq_u8.c => vshrq_x_n_u8.c} (53%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vstrhq_p_f16.c => vst1q_p_f16.c} (87%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vstrwq_p_f32.c => vst1q_p_f32.c} (87%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vstrhq_p_s16.c => vst1q_p_s16.c} (86%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vstrwq_p_s32.c => vst1q_p_s32.c} (86%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vstrbq_p_s8.c => vst1q_p_s8.c} (87%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vstrhq_p_u16.c => vst1q_p_u16.c} (87%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vstrwq_p_u32.c => vst1q_p_u32.c} (87%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vstrbq_p_u8.c => vst1q_p_u8.c} (87%) create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vst2q_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vst2q_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vst2q_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vst2q_s32.c copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vmlaldavaq_s32.c => vst2q_s8.c} (50%) create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vst2q_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vst2q_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vst2q_u8.c copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vstrdq_scatter_base_p_u64.c => v [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vstrdq_scatter_base_p_s64.c => v [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vstrdq_scatter_base_s64.c => vst [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vstrdq_scatter_base_s64.c => vst [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vstrwq_scatter_base_f32.c => vst [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vstrwq_scatter_base_p_f32.c => v [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vstrwq_scatter_base_p_u32.c => v [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vstrwq_scatter_base_p_s32.c => v [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vstrwq_scatter_base_s32.c => vst [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vstrwq_scatter_base_s32.c => vst [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vmaxnmaq_m_f16.c => vsubq_x_f16. [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vmaxnmaq_m_f32.c => vsubq_x_f32. [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcmpgeq_m_n_f16.c => vsubq_x_n_f [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcmpgeq_m_n_f32.c => vsubq_x_n_f [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcmpleq_m_n_s16.c => vsubq_x_n_s [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vshlq_m_r_s32.c => vsubq_x_n_s32 [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcmpltq_m_n_s8.c => vsubq_x_n_s8 [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcmpneq_m_n_u16.c => vsubq_x_n_u [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcmpneq_m_n_u32.c => vsubq_x_n_u [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcmpeqq_m_n_u8.c => vsubq_x_n_u8 [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vsriq_m_n_s16.c => vsubq_x_s16.c} (55%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vsriq_m_n_s32.c => vsubq_x_s32.c} (55%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vsriq_m_n_s8.c => vsubq_x_s8.c} (56%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vsriq_m_n_u16.c => vsubq_x_u16.c} (55%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vsriq_m_n_u32.c => vsubq_x_u32.c} (55%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vsriq_m_n_u8.c => vsubq_x_u8.c} (56%) create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vuninitializedq_float.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vuninitializedq_float1.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vuninitializedq_int.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vuninitializedq_int1.c create mode 100644 gcc/testsuite/gdc.dg/fileimports/pr93038.txt create mode 100644 gcc/testsuite/gdc.dg/pr93038.d create mode 100644 gcc/testsuite/gdc.dg/pr93038b.d create mode 100644 gcc/testsuite/gdc.test/compilable/imports/pr9471a.d create mode 100644 gcc/testsuite/gdc.test/compilable/imports/pr9471b.d create mode 100644 gcc/testsuite/gdc.test/compilable/imports/pr9471c.d create mode 100644 gcc/testsuite/gdc.test/compilable/imports/pr9471d.d create mode 100644 gcc/testsuite/gdc.test/compilable/pr9471.d create mode 100644 libgomp/testsuite/libgomp.c++/pr93931.C copy libstdc++-v3/testsuite/20_util/{monotonic_buffer_resource/93208.cc => is_noth [...] copy libstdc++-v3/testsuite/27_io/filesystem/path/{modifiers/replace_filename.cc = [...]