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from 85d638808ba Creating branches/google/stable and tags/google/stable/2019 [...] adds 7875856acdb Bump the trunk version to 9.0.0svn adds cbb70f3f43e [MSan] Apply the ctor creation scheme of TSan adds afd361d86ab Build LLVM-C.dll by default on windows and enable in releas [...] adds eba4f8a8ec0 Assertion in isAllocaPromotable due to extra bitcast goes i [...] adds 562a9cf4302 Revert r351324 "Build LLVM-C.dll by default on windows and [...] adds ee86cb171b8 [X86][SSE] Add additional PR40318 shuffle test cases adds 5d37f6c7562 [MSP430] Emit a separate section for every interrupt vector adds 0cb1621554a [x86] lower shuffle of extracts to AVX2 vperm instructions adds 93312b1fb7d [llvm-nm] Allow --size-sort to print symbols with only Symbol size adds 43448ef0fe9 [SLP] Fix PR40310: The reduction nodes should stay scalar. adds 73f9f91f2ab AMDGPU: Add llvm.amdgcn.ds.ordered.add & swap adds aef38357514 [X86] Add combineX86ShufflesRecursively helper. NFCI. adds 575b949b8c2 [x86] add tests for extracted scalar casts (PR39974); NFC adds 9afc48e25ad [llvm-readobj] Set correct offset when dumping hex section output. adds 529ab41f202 Remove misleading line about git's lack of revision numbers. adds 5af7a5a89bc [DebugInfo] Allow creation of DBG_VALUEs in blocks where th [...] adds 5b52c80133a [elfabi] Add support for reading DT_SONAME from binaries adds e34f519a820 [X86] Regenerate test adds 30fdda8b5f9 [X86] getFauxShuffleMask - bail for non-byte aligned shuffle types adds 571ca7ccffe [X86][BtVer2] Update latency of horizontal operations. adds 2ee372a88e6 gn build: Add headers to compiler-rt build files. adds b6b3a2915c2 [Hexagon] Do not promote terminator instructions in Hexagon [...] adds 74aa5d81022 [COFF, ARM64] Implement support for SEH extensions __try/__ [...] adds 8a783035881 Fix most of LLVM's tests with LLVM_ENABLE_PIC=OFF adds a0f9b6be64a [X86] Add additional saturating add/sub vector tests; NFC adds 176bda89e4a [X86] Add test case for D56765. NFC adds c500c66b51d [X86] Add a one use check to the setcc inversion code in co [...] adds 17717539b05 AMDGPU: Adjust the chain for loads writing to the HI part o [...] adds 0ab0885de0d [X86] Use X86ISD::BLENDV for blendv intrinsics. Replace vse [...] adds 2346eea6e84 [X86] Add X86ISD::VSHLV and X86ISD::VSRLV nodes for psllv a [...] adds b6f067fd08b [X86] Sink complex MCU CC helper to .cpp file from .h file, NFC adds 0c86984524f [TSan] Fix comment. NFC. adds 0a9f6969d57 [NFC] Factor out + document build requirements adds 7e44db32fcd [WebAssembly] Remove expected failure from known_gcc_test_f [...] adds 97550e879a4 [X86] Remove GCCBuiltin from deprecated gather builtins in [...] adds 22cdd42712f [PGO] Make pgo related options in opt more consistent. adds c657e7f5f25 [AsmPrinter] Collapse .loc 0 0 directives adds 6d544751efe Fix a mistake in rL351392. adds 19ea6650b4c [WebAssembly] Parse llvm.ident into producers section adds 2298dcc0122 [docs] Add more ARM/AArch64 links to CompilerWriterInfo.rst . adds 0981c63e496 [SEH] [ARM64] Retrieve the frame pointer from SEH funclets adds c6f4c7e8bc7 [FunctionComparator] Consider tail call kinds adds c938c3e6047 [docs] Fix formatting. adds ca40007b1fa [X86] Remove GCCBuiltin from deprecated avx512 scatter intr [...] adds 017cb3b47a4 Revert "[WebAssembly] Parse llvm.ident into producers section" adds f782a152e69 [MergeFunc] Prevent silent miscompile of vararg functions adds 6997360500c [WebAssembly] Parse llvm.ident into producers section adds d8d3491b531 [NFC] Factor out some local vars adds 60016bd9706 [llvm-objdump] - Simplify the getRelocationValueString. NFCI. adds 258d6f7e3ef [llvm-objdump] - Fix comment. NFC. adds e18b4e0759b [ARM64][Windows] Share unwind codes between epilogues adds dfa1709666b [RISCV] Add codegen support for RV64A adds fd351e4d508 [ARM GlobalISel] Allow calls to varargs functions adds 19da986b305 Fix capitalization. NFC adds d7549f2d962 [MC] Remove unused variable adds aba210299a2 Allow FP types for atomicrmw xchg adds 329f768b5fc GlobalISel: Add comment to clarify G_BUILD_VECTOR adds a0c858591d6 [X86] Add AVX512 test to insertps adds f22ff9cc936 [X86][SSE] Add PR40340 test case adds 5865df5baae [LoopSimplifyCFG] Fix order of deletion of complex dead subloops adds a3ca8ce0e5f [LoopSimplifyCFG] Form LCSSA when a parent loop becomes a sibling adds 04b5a1406e4 build_llvm_package.bat: Run more tests adds bc34da10fab Move demangling function from llvm-objdump to Demangle library adds 6c942cd54c0 [llvm-readobj][ELF]Add demangling support adds 70c3a1bd4a2 [ThinLTO] Add summary entries for index-based WPD adds 3f4e6894183 Add -dump-input=always to cfi-devirt test to debug flake adds 5b5290a1ba5 Revert "[ThinLTO] Add summary entries for index-based WPD" adds 3587ddcf7b1 Add a missing dependency to fix build. adds 51123841ae5 [WebAssembly] Fixed objdump not parsing function headers. adds f2cd8683e12 [Test] Fix debug-loc-0.mir with EXPENSIVE_CHECKS adds 8a0264ba425 [WebAssembly] Fixing 2 more symbol offset related tests. adds 0b01dc60eaa llvm build: Merge r351448 adds 09a1a75e844 Fix the buildbot failure introduced by r351404 adds cc6eedfcf34 NFC: Make the copies of the demangler byte-for-byte identical adds dbe36707c00 [InstCombine] Don't sink dynamic allocas adds dffaa923026 [SampleFDO] Skip profile reading when flattened profile use [...] adds d67aebfb379 Fix an MSVC bot failure from r351474. adds 6c24b6f7e25 [HotColdSplit] Simplify tests by lowering their splitting t [...] adds 3c32f301480 [demangler] Ignore leading underscores if present adds 07222472314 [demangler] Support for block literals. adds 93f2e218e04 [HotColdSplit] Relax requirement that the cold sink block b [...] adds 3af27b49cf8 [mips] Emit .reloc R_{MICRO}MIPS_JALR along with j(al)r(c) $25 adds 390962bc3eb [HotColdSplit] Consider resume instructions to be cold adds 7064dbae35e [HotColdSplit] Allow outlining with live outputs adds 998c2d724e2 Address Ried's post-commit review comment on r351477. adds 74ebd8a9975 AMDGPU: Convert tests away from llvm.SI.load.const adds bef167b1e3d [WebAssembly] Add languages from debug info to producers section adds 1aa0965c366 mac: Correctly disable tools/lto tests when building with L [...] adds cf5a8981ac5 gn build: Merge r351499 adds 2235e6b1cc4 [DOCS] it it => it adds 4aef446efd9 gn build: unbreak mac (and maybe win) after r351258, r351277 adds ab5ed89478e Re-enable terminator folding in LoopSimplifyCFG: underlying [...] adds f3ebf53f090 [X86] Change avx512-gather-scatter-intrin.ll to use x86_64- [...] adds abe6bc1296a [X86] Add test cases showing failure to fold a global varia [...] adds a3db7ac3457 [AVR] Expand 8/16-bit multiplication to libcalls on MCUs th [...] adds 1f379ad9ee9 [CodeGen] Fix bugs in LiveDebugVariables when debug labels [...] adds c3d9898b085 [AVR] Rewrite the CBRRdK instruction as an alias of ANDIRdK adds cb52932bbf6 [ScheduleDAGRRList] Do not preschedule the node has ADJCALL [...] adds 123f62d954a [llvm-objdump][NFC] Improve readability. adds 70872139d5a Revert r351529 "[llvm-objdump][NFC] Improve readability." adds f55e902740f [SelectionDAG] Add static getMaxNumOperands function to SDNode. adds 469517e5217 [AVR] Fix the inst-cbr test adds 4d0c7758819 [llvm-objdump] - Show aliases in -help. adds 912adb1a84a [AVR] Fix codegen bug in 16-bit loads adds 605942eacd9 [llvm-objdump] - Move getRelocationValueString and dependen [...] adds a99a3c6de15 [llvm-objdump] - Dump the archive headers when -all-headers [...] adds ab7227994db [ADT] Add streaming operators for llvm::Optional adds d1e8486d69a [AMDGPU][MC] Disabled use of 2 different literals with SOP2 [...] adds c020a4b755a Add __[_[_]]Z demangling to new common demangle function adds b4620a49488 [SelectionDAG] Add getTokenFactor, which splits nodes with [...] adds e69eed4580e Reland r351529 "[llvm-objdump][NFC] Improve readability." adds 99534327b9b [TTI] Use ConcreteTTI cast in getIntrinsicInstrCost Type va [...] adds 54d67b5ef51 [AMDGPU][MC][GFX8+][DISASSEMBLER] Corrected 1/2pi value for [...] adds 1498f1dfed3 Revert r351529 "[llvm-objdump][NFC] Improve readability." adds de8551c2cd2 [x86] simplify code for SDValue.getOperand(); NFC adds 33cddcf2040 [SelectionDAGBuilder] Cleanup InlineAsm Output generation. NFCI. adds d255002df00 [LTO] Change test/tools/lto/no-bitcode.s requirement from a [...] adds 3040d973a12 [AMDGPU] Add some missing always-uniform values. adds 2f01b116877 [Support] Implement llvm::Registry::iterator via llvm_itera [...] adds 316e6ae08e2 [LCSSA] Skip blocks in sub-loops when scanning for uses. adds d5978f137d5 [X86] Lower avx2/avx512f gather intrinsics to X86MaskedGath [...] adds 50070e7744f [SelectionDAG] Split very large token factors for chained s [...] adds ecd3de774e8 [adt] Twine(nullptr) derefs the nullptr. Add a deleted Twin [...] adds e05708b081b [GlobalISel] Change to range-based invocation of llvm::sort adds 0b88c7b4a4e Fix the buildbot issue introduced by r351421 adds 8bca9265195 [SelectionDAG] Updates for -dag-dump-verbose adds 61b2398badd [CGP] Check for existing inttotpr before creating new one adds f68617b74f5 [X86] Lower avx512f scatter intrinsics to X86MaskedScatterS [...] adds 04c7d10f65a GlobalISel: Verify g_zextload and g_sextload adds 083f0ffcc0e AMDGPU: Remove llvm.SI.load.const adds 7481855830d Make ThinLTO test run single threaded to try to avoid flakiness adds ffaad0b16e7 [x86] add more movmsk tests; NFC adds 34b76d05a1c GlobalISel: Verify G_ICMP/G_FCMP vector types adds 3ae624385ff [elfabi] Add support for reading DT_NEEDED from binaries adds 5570b070223 GlobalISel: Verify G_BITCAST adds a2c7f93de8b AMDGPU/GlobalISel: Legalize illegal g_constant adds 2149e3fb047 Revert "[CGP] Check for existing inttotpr before creating new one" adds 1d214ca0d89 AMDGPU/GlobalISel: Legalize more types for select adds 99d88bdad7d Remove F_modify flag from FileOutputBuffer. adds 524e25855ce Use llvm_canonicalize_cmake_booleans for LLVM_LIBXML2_ENABL [...] adds 301fa505b4d [X86] Deduplicate static calling convention helpers for cod [...] adds b3cf54ea958 Revert r351584: "GlobalISel: Verify g_zextload and g_sextload" adds f10dba2c63b Reapply "[CGP] Check for existing inttotpr before creating [...] adds b63d21f4508 Revert "Reapply "[CGP] Check for existing inttotpr before c [...] adds 8175d01f188 [CodeExtractor] Emit lifetime markers around reloads of outputs adds 1054bdf3556 [HotColdSplit] Remove a set which tracked split functions (NFC) adds 3dfba4afc6d [HotColdSplit] Mark inherently cold functions as such adds 341781f38dd [MergeFunc] Allow merging identical vararg functions using aliases adds 23188a224d8 Reapply "[CGP] Check for existing inttotpr before creating [...] adds 972a348402d AbstractCallSite -- A unified interface for (in)direct and [...] adds 3afa6984040 Enable IPConstantPropagation to work with abstract call sites adds 8d2b514a334 Cleanup non-UTF8 characters and some types I found in these files. adds e49000a8021 Install new LLVM license structure and new developer policy. adds e92422ed0f2 Convert two more files that were using Windows line endings [...] adds 6b547686c54 Update the file headers across all of the LLVM projects in [...] adds b668edfa292 Remove a period from CREDITS.TXT (testing email change). NFC adds 01cc5fc86cb [NFC] Fix unused variable warnings in Release builds adds 05a9855584f [NFX] Fix language reference title declaration adds c333f36cb34 [InstCombine] Simplify cttz/ctlz + icmp ugt/ult adds 438784aaf33 Update more file headers across all of the LLVM projects in [...] adds 4cfe1aca692 Update structured references to the license to the new license. adds 052562edff1 Update the coding standards with the new file header. adds db7d6cefe9f [llvm-objcopy] [COFF] Rename a test from .yaml to .test. NFC. adds a495c9ae6fb [llvm-objcopy] [COFF] Remove a superfluous namespace qualif [...] adds 65866eb3aa6 [llvm-objcopy] [COFF] Add a testcase for patching the debug [...] adds 2ccafacb7dd [llvm-objcopy] [COFF] Add support for removing sections adds 2b6e1b7585d [llvm-objcopy] [COFF] Implement --strip-debug adds 526aa2e9435 [llvm-objcopy] [COFF] Implement --only-keep-debug adds 17dcf25b3ad [llvm-objcopy] [COFF] Implement --only-section adds b51430264b3 [X86] Add masked MCVTSI2P/MCVTUI2P ISD opcodes to model the [...] adds bda64db50ed make XFAIL, REQUIRES, and UNSUPPORTED support multi-line ex [...] adds 4a94358e030 [ConstantMerge] Factor out check for un-mergeable globals, NFC adds cacb637670e Revert "[AVR] Fix codegen bug in 16-bit loads" adds 31dcac01859 [AVR] Fix codegen bug in 16-bit loads adds 15b1c3ce676 [AVR] Replace two references to ARM's 't2_so_imm' type comments adds 953bf32315a [AVR] Allow AVR to be explicitly set as the default target triple adds 3dde3226a21 [AVR] Remove unneeded XFAILs from the Generic CodeGen tests adds eafe03ff2a7 [CostModel][X86] Add non-constant vselect cost tests adds 104aad5d596 [CostModel][X86] Add masked load/store/gather/scatter tests [...] adds 64110d8bee2 [CostModel][X86] Split icmp/fcmp costs tests and test all c [...] adds c33a4fdc9c2 [TTI][X86] Reordered getCmpSelInstrCost cost tables in desc [...] adds 38ece52d643 [CostModel][X86] Add explicit fcmp costs for pre-SSE42 targets adds 21d100aff8a [CostModel][X86] Add explicit vector select costs adds dab40ce6097 [X86] Replace VPCOM/VPCOMU with generic integer comparisons (llvm) adds e051fbaeb30 [X86] Auto upgrade old style VPCOM/VPCOMU intrinsics to gen [...] adds 5feb56f4ba4 AMDGPU/GlobalISel: Cleanup legality for extensions adds 407fd3466ef AMDGPU/GlobalISel: Regbank select for fpext adds 815e4b2d064 AMDGPU/GlobalISel: Fix some crashs in g_unmerge_values/g_me [...] adds 54f09d1f47d AMDGPU/GlobalISel: Legalize f32->f16 fptrunc adds e8d1d04c890 GlobalISel: Implement widenScalar for basic FP ops adds cd9e59a140a [X86] Auto upgrade VPCOM/VPCOMU intrinsics to generic integ [...] adds 76182202214 AMDGPU/GlobalISel: Really legalize exts from i1 adds 83a5392e6d6 GlobalISel: Add isPointer legality predicates adds c1ef295d680 AMDGPU: Legalize more bitcasts adds cb39a85070d Replace llvm::isPodLike<...> by llvm::is_trivially_copyable<...> adds 9e2bbe5433a Add missing test file adds 4cb18de51a4 Tentative fix for r351701 and gcc 6.2 build on ubuntu adds 0016550d55c [AVR] Insert unconditional branch when inserting MBBs betwe [...] adds 08d4d2befa8 Revert "[AVR] Insert unconditional branch when inserting MB [...] adds 8d803db0977 [AVR] Enable emission of debug information adds d3d04773fe8 [AVR] Insert unconditional branch when inserting MBBs betwe [...] adds 76cfdd455cb [RISCV] Add R_RISCV_RELAX relocation to all possible relax [...] adds 59d421111a3 [SCEV][NFC] Introduces expression sizes estimation adds 75bc577425d [NFC] Fix warnings in unit test of r351725 adds aac33c8bc53 [NFC] Make getExpressionSize unsigned short adds 39878526e7c [X86] Remove and autoupgrade vpmovqd/vpmovwb intrinsics usi [...] adds 2fea5b324e3 Fix typos throughout the license files that somehow I and m [...] adds e2ef489ac24 [llvm-symbolizer] Add -no-demangle as alias for -demangle=false adds ecff368e5cf [CostModel][X86] Add XOP icmp cost tests (PR40376) adds acc48926320 [X86][BtVer2] Update the WriteLoad latency. adds b9d3157bde9 [DAGCombiner] fix crash when converting build vector to shuffle adds 60cbd5c64cc [AArch64] add more tests for buildvec to shuffle transform; NFC adds 66b83ff99db [X86][BtVer2] Update latency of mmx horizontal operations adds c0e594470af Fix compilation error with gcc 4.8 adds 3885eb1e98a gn build: Merge r351627, r351548, r351701 adds 8455cfedfa7 gn build: Stop passing -DLLVM_LIBXML2_ENABLED to some targets adds e2069ebfee1 [AMDGPU] Fixed hazard recognizer to walk predecessors adds a1691098293 [X86] Change avx512 COMPRESS and EXPAND lowering to use a s [...] adds 1e95d74db43 [X86] Use X86ISD::VFPROUND instead of ISD::FP_ROUND for 256 [...] adds 794f0f24922 [x86] add tests for vector ops with undef lanes; NFC adds 4b96e4b486d [x86] add another test for xor with undefs; NFC adds d1086040f5c Document toolchain update policy adds 0a0f8765711 AMDGPU/GlobalISel: Legalize more fp<->int conversions adds 8d1f5d432d7 [AArch64] Add patterns for zext/sext of shift amount. adds b771a49ffaf GlobalISel: Fix out of bounds crashes in verifier adds 5cba8a26a42 [LangRef] Clarify semantics of volatile operations. adds 27ae9060d2d [CVP] Use LVI to constant fold deopt operands adds 6788e26abe0 [ARM] Combine ands+lsls to lsls+lsrs for Thumb1. adds 020dc8d94b7 IR: Add fp operations to atomicrmw adds e8bd282da5b [RISCV] Fix build after r351778 adds f488df39d96 Remove static_assert(value == std::is_trivially_copyable<T> [...] adds 1043c0372b4 [RISCV][NFC] Add break to case statement in RISCVDAGToDAGIS [...] adds fe69bd52801 Revert "Remove static_assert(value == std::is_trivially_cop [...] adds 698f734f718 [llvm-readelf]Revert --dyn-symbols behaviour to make it GNU [...] adds 6c515426c38 [NFC] Add detector for guards expressed as branch by widena [...] adds 99ddd77ed3f [NFC] Factor out some reusable logic adds 24470819e87 [llvm-symbolizer] Add support for --basenames/-s adds 73f9a1d6171 Revert r351778: IR: Add fp operations to atomicrmw adds 1f80c1a449b [X86] HADDPS/HADDPD scalar lowering was added at rL350421 adds 1da2ee9ad72 [NFC][llvm-readobj]Normalise --/- inconsistency in test options adds d3b89a1637c [llvm-objcopy] Consistently use createStringError instead o [...] adds d37f67c7311 [llvm-objcopy] [COFF] Update symbol indices in weak externals adds 9ae4b86b04b [llvm-objcopy] [COFF] Implement --add-gnu-debuglink adds b92e756f41e [NFC] Add function to parse widenable conditional branches adds 3cab73d71e6 [X86] Add test for matchAddressRecursively's MUL handling adds 5b032bb140c [LoopPredication] Support guards expressed as branches by w [...] adds cba5eef126f [RISCV] Quick fix for PR40333 adds 49551c19d2d [X86][SSE] Add selective commutation support for insertps ( [...] adds 598d00ecd6b [CostModel][X86] Add ICMP Predicate specific costs adds e0a63eb032d Revert "[llvm-objcopy] [COFF] Implement --add-gnu-debuglink" adds 928b0fdf96b [X86][BtVer2] X86ISD::VPERMILPV has local forwarding disabled adds d378e71fcfe Fix "comparison of unsigned expression >= 0 is always true" [...] adds cf74016e108 [X86][BtVer2] SSE2 vector shifts has local forwarding disabled adds 703b8276a24 [X86][SSE] Canonicalize OR(AND(X,C),AND(Y,~C)) -> OR(AND(X, [...] adds 9e64837cfea Fix llvm::is_trivially_copyable portability issues adds be3450cee77 Slight fix for r351820 adds 39a720432a1 [MCA] Add tests for int-to-fpu transfer delays. NFC adds f315bf0876f [RISCV][NFC] Change naming scheme for RISC-V specific DAG nodes adds 5d73c0daaf1 [llvm-objdump] - Introduce getRelocsMap() helper. NFCI. adds e5439d54578 [DAGCombiner] narrow vector binop with 2 insert subvector operands adds 6db2a26cbd2 [llvm-mca][X86] Add missing tzcntw tests adds fddfd5d303a [llvm-mca][X86] Add missing vperm2i128 tests adds 86aa3d98ae8 [llvm-mca][X86] Add missing monitor/mwait tests adds 79674b60d76 [llvm-mca][X86] Add missing mfence/pinsrw tests adds 2432e368c81 Use response file when generating LLVM-C.dll adds 02f4bb54c2d [x86] add another partial undef vector binop test; NFC adds 1175177aa68 [llvm-mca][X86] Add missing enter/leave, invlpg/invlpga, rd [...] adds f26bb9e4e3d [llvm-mca][X86] Add missing CLWB/CLZERO/FSGSBASE/LWP/MWAITX [...] adds d536428cc7d Add DIGlobalVariableExpression to LangRef adds 25c5702a9ee [docs] Scudo: document error messages & their potential cause adds 09dbf88cfbe [x86] add partial undef 'and' test; NFC adds 880b045a7c7 [llvm-mca][X86] Add VPOPCNTDQ tests adds d3046a26188 [DEBUG_INFO, NVPTX] Fix relocation info. adds 27047c8f820 Revert r351520, "Re-enable terminator folding in LoopSimplifyCFG" adds d77902a49a0 [DEBUGINFO, NVPTX] Enable support for the debug info on NVP [...] adds 0579a5a2a97 [llvm-mca][X86] Tidyup avx512 placeholder tests adds 52f6127659c Reapply "IR: Add fp operations to atomicrmw" adds 1f5f9eca964 Codegen support for atomicrmw fadd/fsub adds 1fee5f9e648 FileOutputBuffer: Handle "-" as stdout. adds 730b10c319a GlobalISel: Disallow vectors for G_CONSTANT/G_FCONSTANT adds 465d30e524b [SelectionDAGBuilder] Defer C_Register Assignments to be in [...] adds 02ecc9210ca GlobalISel: Support narrowing zextload/sextload adds 63e24f6ebd8 AMDGPU/GlobalISel: Remove vectors from legal constant types adds 8f914744dcf Add missing include (cstdlib) to Demangle.h adds 7e8e8115382 GlobalISel: Implement fewerElementsVector for basic FP ops adds 2981a335d68 GlobalISel: Implement widen for extract_vector_elt elt type adds 93ff1a51237 [X86][AVX512F_SCALAR]: Adding full coverage of MC encoding [...] adds 6633705a455 GlobalISel: Make buildConstant handle vectors adds 8e95f26b197 [FileCheck] Suppress old -v/-vv diags if dumping input adds 5f7a8a499f5 GlobalISel: Allow shift amount to be a different type adds a64600d7af8 FileOutputBuffer: handle mmap(2) failure adds 12007de420e AMDGPU/GlobalISel: Handle legality/regbanks for 32/64-bit shifts adds a29236b80f7 [Docs] Add a note clarifying how to get good test performances. adds 371ab38437b AMDGPU/GlobalISel: Start selectively legalizing 16-bit operations adds 01e2e6a19f8 [LegalizeTypes] Add debug prints to the top of PromoteFloat [...] adds 1fe39d931bf [ADT] Move away from __attribute__((always_inline)). adds 4631696c982 [HotColdSplit] Calculate domtrees lazily to reduce compile- [...] adds 18729a48b8a [Chrono] Remove ATTRIBUTE_ALWAYS inline from Chrono.h. adds 4c9ad6d8f1f [HotColdSplit] Calculate BFI lazily to reduce compile-time, NFC adds f7b340e581a Fixed isReMaterializable setting for LUI instruction. adds 8cf7aa39d7c [llvm-objcopy] Return Error from Buffer::allocate(), [ELF]W [...] adds c06abb6d5d9 [llvm-objcopy] Fix error message for msvc tests adds 699f5cd3333 [CodeView] Allow empty types in member functions adds c210acd94bc [llvm-objcopy] Remove os-dependent message from test adds 5cc293e8327 MemoryBlock: Do not automatically extend a given size to a [...] adds bf2e79e9479 gn build: Merge r351880 adds 69a77351642 gn build: Merge r351820. adds 2975457f80b hwasan: Move memory access checks into small outlined funct [...] adds b7195a6d8d9 [Pipeliner] Add two pragmas to control software pipelining [...] adds 83265e9e743 [IRCE] Support narrow latch condition for wide range checks adds 842b69bf631 [SystemZ] Handle DBG_VALUE instructions in two places in backend. adds 07b8cb38658 [SLH] AArch64: correctly pick temporary register to mask SP adds 840d70f854a Reapply: [llvm-objcopy] [COFF] Implement --add-gnu-debuglink adds e149599f734 [SLH][AArch64] Remove accidentally retained -debug-only lin [...] adds 798bb559878 [DAGCombine] Enable more pre-indexed stores adds 1284ee3c47b [llvm-objcopy] [COFF] Clear the unwritten tail of coff_sect [...] adds 1bba626c445 [ARM][CGP] Check trunc type before replacing adds 8384cd81267 [llvm-symbolizer] Allow single letter command flags grouping. adds a812fe91d64 [ARM] Alter the register allocation order for minsize on Thumb2 adds a61ffd3b7e1 [SystemZ] Fix test case for buildbot. adds 7ace113659e [llvm-objdump] - Split disassembleObject() into two methods. NFCI. adds 482634dcda5 [llvm-objdump] - Move variable. NFC. adds f0600501054 [HotColdSplitting] Remove unused SSAUpdater.h include (NFC). adds d05fef13e36 [llvm-objcopy] [COFF] Remove testcase debugging lines. NFC. adds 74c7d422cba [llvm-objcopy] [COFF] Fix handling of aux symbols for big objects adds abacd83232a [llvm-objcopy] [COFF] Error out on use of unhandled options adds 8126e2bf860 [AMDGPU] With XNACK, cannot clause a load with result coale [...] adds c01927928c7 [llvm-objdump] - Move common code to a new printRelocation( [...] adds 1c7239a4b6d Move saturated arithmetic intrinsics to other integer intri [...] adds 12b839523c6 Re-land rL322538 "Add a value_type to ArrayRef." adds aa39b014ee4 [AArch64] Fix out of bounds strlen adds 70b94e12d40 [Hexagon] Remove incorrect bit negation adds 7ce2f7c0770 [IR] Match intrinsic parameter by scalar/vectorwidth adds 1b37325104d Fix indentation. NFCI. adds c2ed95b9be9 [llvm-readelf] Don't suppress static symbol table with --dy [...] adds 6b6a90fb851 [MC][X86] Correctly model additional operand latency caused [...] adds ef7a8ec9b9b Revert "[DEBUGINFO, NVPTX] Enable support for the debug inf [...] adds 0c8614fd4d2 [llvm-symbolizer] Improve compatibility of --functions with [...] adds abb93af09d0 [X86] Autogenerate complete checks. NFC adds 9481b3e014c [DEBUGINFO, NVPTX] Enable support for the debug info on NVP [...] adds 7877655b571 Revert "[DEBUGINFO, NVPTX] Enable support for the debug inf [...] adds 48aefa88777 [DEBUGINFO, NVPTX] Enable support for the debug info on NVP [...] adds c7b61ab2382 Revert r351938 "[ARM] Alter the register allocation order f [...] adds 0046ceba447 [mips] Handle MipsMCExpr sub-expression for the MEK_DTPREL tag adds 54374f63ac1 hwasan: Read shadow address from ifunc if we don't need a f [...] adds 6866f6ea0e3 [LV][VPlan] Change to implement VPlan based predication for [...] adds 0bd2b610127 [ADT] Notify ilist traits about in-list transfers adds 06831ab511b [llvm] Clarify responsiblity of some of DILocation discrimi [...] adds 3b0dcea5b3a Revert "[mips] Handle MipsMCExpr sub-expression for the MEK [...] adds 4597c04e0ac [llvm-symbolizer] Add support for -i and -inlines as aliase [...] adds 26d8013491a Update entry count for cold calls adds 576ee7341ba gn build: Merge r351320 (the 9.0.0 version bump) adds 2e1beed2709 [Sanitizers] UBSan unreachable incompatible with ASan in th [...] adds 94bf3149a21 llvm-symbolizer: Extract individual test cases now that it' [...] adds 616f6327b0c [docs] Remove extra character from git URL in Getting Start [...] adds afd226c7299 [RISCV] Set isReMaterializable for ORI, XORI adds 8b4a1504546 [RISCV] Set isAsCheapAsAMove for ADDI, ORI, XORI, LUI adds a049e686b52 Revert "[RISCV] Set isAsCheapAsAMove for ADDI, ORI, XORI, LUI" adds 76453833c97 DebugInfo: Use assembly label arithmetic for address pool s [...] adds 78cd7056719 [NFC] Add a failing test on live block markup in term folding adds 7a481519880 [LoopSimplifyCFG] Fix inconsistency in live blocks markup adds c7b9bea4d56 [NFC] Add another failing test on LoopSimplifyCFG adds 5abeafccea5 [X86] Add test cases for opportunities to fold a truncate a [...] adds 18cdc34be85 [X86] Update SelectionDAGDumper to print the extension type [...] adds 1ca3aae4063 [SystemZ] Remember to reset the NoPHIs property on MF in c [...] adds cc563b6c997 Reapply: [mips] Handle MipsMCExpr sub-expression for the ME [...] adds 442573a8e66 [HotColdSplitting] Get DT and PDT from the pass manager. adds b404df708c2 [MIPS GlobalISel] Combine extending loads adds 8993a7805dc [MIPS GlobalISel] Select zero extending and sign extending load adds 603b29b882d Revert "[HotColdSplitting] Get DT and PDT from the pass manager." adds 37114573a1f [TTI] Add generic UADDO/USUBO costs adds 2e5edf4b8d6 [TTI] Add generic UADDSAT/USUBSAT costs adds a6db2ced998 [TTI] Add generic SADDO/SSUBO costs adds c3e869e3cf8 [CostModel][X86] Add SMUL fixed point cost tests adds 9204acdbd3f [x86] add tests for unpack shuffle lowering; NFC adds 845e81db063 [X86] Add missing isReg() guards in FixupSetCCs pass. adds 7d852d19494 [Docs] Add information about unit tests to the testing guide adds 6f0bf08b560 [SelectionDAGBuilder] Fuse inline asm input operand loops p [...] adds 827ebc9db7c [TargetLowering] Rename getExpandedFixedPointMultiplication [...] adds 7d4d59cf8a7 [RS4GC] Avoid crashing on gep scalar_base, vector_idx adds 0332ddd4496 [RS4GC] Be slightly less conservative for gep vector_base, [...] adds 92e62a99ee3 [RS4GC] Expand/standardize tests introduced in rL352059 adds 7fb1d1739f5 [x86] add low/high undef half shuffle mask helpers; NFC adds 0cc297d24c0 [InlineAsm] Don't calculate registers for inline asm memory [...] adds a8d481282a7 [SelectionDAGBuilder] Simplify HasSideEffect calculation. NFC. adds a1e328df4aa Revert "[Sanitizers] UBSan unreachable incompatible with AS [...] adds f2ee78d5032 [X86] Add PR25858 test cases adds 4922a5538ee Fix emission of _fltused for MSVC. adds fc3b217ecc8 [x86] rename VectorShuffle -> Shuffle; NFC adds 6d1f753c092 [HotColdSplit] Move splitting earlier in the pipeline adds e7f2f45073f [X86] Regenerate SBB test to fix buildbots. adds dea0eae9a50 [IRBuilder] Remove positivity check from CreateAlignmentAss [...] adds ed5c317d76a Test cases for demanded elements on vector GEPs adds 1895810dff5 [MemorySSA +LICM CFHoist] Solve PR40317. adds c3650b8e354 [LICM] Cleanup duplicated code. [NFCI] adds 3541af5b081 gn build: Merge r351990 adds ab0c2c9a0be Fix a compiler error introduced in r352093. adds 6fda2e68f2a Limit dyld image suffixes guessed by guessLibraryShortName() adds ce8f6d38a5f [Analysis] Fix isSafeToLoadUnconditionally handling of volatile. adds 1ffa1238c30 allow COFF .def directive in module assembly when using ThinLTO adds 1e05d5e4463 [GlobalISel][AArch64] Add isel support for FP16 vector @llvm.ceil adds 24fa3683a5f [PDB] Increase TPI hash bucket count. adds 904cc193935 [elfabi] Add support for reading dynamic symbols from binaries adds 2684700e17b RegBankSelect: Support some more complex part mappings adds 647c8a7cfbd Suppress unused capture warning in CheckCopy adds 47a2c804dd7 [GISel]: Change how CSE is enabled by default for each pass adds 6f3da3621b7 [x86] move half-size shuffle mask creation to helper; NFC adds 414356bfc42 pdbutil: Remove unused variables adds 29bfdee4082 [GlobalISel][AArch64] Avoid unused function warnings in Rel [...] adds e6b5e1fb345 RegBankSelect: Fix use after free in r352123 adds 81af257ae42 [PowerPC] Exploit store instructions that store a single ve [...] adds 6042831b761 [GlobalISel][AArch64] Avoid unused variable warning for var [...] adds 2de1a201069 GlobalISel: Add helper to LLT to get a scalar or vector adds de0f5855d5c Try to address Windows bot failure after r352080 adds 1206b71c5a8 gn build: Build clang with -fno-strict-aliasing, make build [...] adds b0fa2c8bb45 simplify COFF module assembly test and move it to Object adds edd25eb22ba GlobalISel: Add convenience mutatations to scalarize adds 10c54d526d6 gn build: Set is_clang to true in stage2 toolchains. adds b0c2704ffa0 hwasan: If we split the entry block, move static allocas ba [...] adds f60859bbf92 GlobalISel: Implement fewerElementsVector for extensions adds 2ae6343009e GlobalISel: Support fewerElementsVector for icmp/fcmp adds 7216dfe791b [HotColdSplit] Split more aggressively before/after cold invokes adds 03b0e5dcc51 [HotColdSplit] Describe the pass in more detail, NFC adds 5a3235419cd AMDGPU/GlobalISel: Legalize smulh/umulh and scalarize mul adds da46a0ebaee GlobalISel: fewerElementsVector for a few more trivial ops adds efa677ca149 GlobalISel: fewerElementsVector for more cast types adds edf38e43a96 AMDGPU/GlobalISel: Scalarize add/sub adds 5e4ebdaab1f AMDGPU/GlobalISel: Remove leftover setAction adds 925039b5ed2 [RISCV] Custom-legalise 32-bit variable shifts on RV64 adds 0e564796841 [LoopSimplifyCFG] Fix inconsistency in blocks in loop markup adds 63ca249912d [RISCV] Custom-legalise i32 SDIV/UDIV/UREM on RV64M adds da6d468d3aa [X86] Add non-masked versions of vpconflict intrinsics so w [...] adds be71419bf02 [PowerPC] Enhance the fast selection of cmp instruction and [...] adds 4792786c43c [NFC] Add test with multiple loops adds 647ece596da [MSP430] Fix absolute addressing mode printing in AsmPrinter adds ec3165a24ab [llvm-mca][X86] Add missing shuffle tests adds 3cc97351341 [llvm-objcopy] Add support for -g as an alias for --strip-debug adds c4ce20752bf [TblGen] Extend !if semantics through new feature !cond adds f474d69280a [ARM GlobalISel] Remove rebase artifact from r351882. NFC adds 3db7baf629b [ARM GlobalISel] Support shifts for Thumb2 adds 2f0b27b1ba1 [NFC] Add failing test on LCSSA forming adds 4c27afeb9e6 Fix gcc -Wparentheses warning. NFCI. adds 850499971e0 Fix gcc -Wparentheses warning. NFCI. adds 1e87413d956 [NFC] One more crashing test on LoopSimplifyCFG adds 0dc3042203f [llvm-symbolizer] Add switch to adjust addresses by fixed offset adds d7aa155bb18 [X86] Add addcarry/subborrow combine tests adds c9582af12f7 gitignore: ignore clangd index files. adds 80e7c6a6b2d Fix line endings and trim trailing whitespace. NFCI. adds 2edf253eb80 [RISCV] Add tests to demonstrate bitcasted fneg/fabs dagcombines adds 38508e0d2cb gn build: Merge r352148 adds a324b2baf02 gn build: Revert r352200, commit message was wrong adds 4e0a5a568f4 gn build: Merge r352149 adds 2ff930ae429 [JSON] Work around excess-precision issue when comparing T_ [...] adds 1d2c044466d Revert r351954 "Add a value_type to ArrayRef." adds 5293022fbe0 [x86] narrow a shuffle that doesn't use or set any high elements adds 223ba3d3aec [X86] Simplify X86ISD::ADD/SUB if we don't use the result flag adds a451bb4769b [RISCV][NFC] s/f32/f64 in double-arith.ll adds ea4c4307d53 [TblGen][NFC] Fix documentation formatting adds 5e3dcd4888f [TEST][COMMIT] - fix comment typo in AsmPrinter/DwarfDebug. [...] adds 69cb1ba26b9 [DiagnosticInfo] Add support for preserving newlines in rem [...] adds 1c43876583d [x86] simplify logic in lowerShuffleWithUndefHalf(); NFCI adds 687f752b9d2 [opt-viewer] Add javascript to expand/hide full message for [...] adds 6e7d0c8d17f [MC] Teach the MachO object writer about N_FUNC_COLD adds 083b7c74a13 [HotColdSplit] Introduce a cost model to control splitting [...] adds 2c51d60895e [X86] Combine masked store and truncate into masked truncat [...] adds aeff6e76bef [MBP] Don't move bottom block before header if it can't red [...] adds e88f13ed4d4 Reapply: [RISCV] Set isAsCheapAsAMove for ADDI, ORI, XORI, LUI adds fc0acb9eb76 [WarnMissedTransforms] Set default to 1. adds 22d8eff14e2 [RISCV] Add another potential combine to {double,float}-bit [...] adds ed5015213c5 Revert rL352238. adds 374bc7af2c0 [GlobalISel][AArch64][NFC] Fix incorrect comment in selectU [...] adds 68fd69b7468 [llvm] Opt-in flag for X86DiscriminateMemOps adds f21e608771b [RISCV] Add target DAG combine for bitcast fabs/fneg on RV32FD adds 6a77dc8b8e6 [NFC] Test commit : fix typo. adds 88118fe48c6 Build LLVM-C.dll by default on windows and enable in releas [...] adds eb63de6e3d3 [SelectionDAG][X86] Don't use SEXTLOAD for promoting masked [...] adds 09680ebbcf7 [NVPTX] Some nvvm.read.ptx.sreg intrinsics should have Intr [...] adds 020a696694d [llvm-nm] Print out N_COLD_FUNC as "cold func" adds 62dd6f64a05 [X86] Add DAG combine to merge vzext_movl with the various [...] adds 8c69b6f74f0 [PowerPC] Update Vector Costs for P9 adds 7221fef06a7 [WebAssembly][NFC] Group SIMD-related ISel configuration adds 6033f8c97ab GlobalISel: Fix address space limit in LLT adds 9c5eb835c18 [X86] Remove GCCBuiltins from 512-bit cvt(u)qqtops, cvt(u)q [...] adds 3b13e88f273 Revert r352255 "[SelectionDAG][X86] Don't use SEXTLOAD for [...] adds a0486c61339 [X86] Remove and autoupgrade vpconflict intrinsics that tak [...] adds 7c9e9a8bad8 [X86] Autoupgrade some of the intrinsics used by stack fold [...] adds dc43c7511d2 [X86] Add 'less_than_ideal' followup test case from PR24545 adds 977e5f4110e [llvm-mca][X86] Add some missing DQI tests adds 3372c78b68f [X86] Add test case from PR34292 adds 987756cc808 [x86] add helper for creating a half-width shuffle; NFC adds 12d2fa11fad [X86] Add nonsplat increment/decrement constant vector with [...] adds ca423f3242c [X86][SSE] Generalized unsigned compares to support nonspla [...] adds 03c3e57bc20 Generate test results for combine-fcopysign.ll using update [...] adds 3aa994cf81d [X86] Fold X86ISD::SBB(ISD::SUB(X,Y),0) -> X86ISD::SBB(X,Y) [...] adds 80e5f43847c [X86] combineCarryThroughADD - add support for X86::COND_A [...] adds 901b4d6ba1d [X86] combineAddOrSubToADCOrSBB/combineCarryThroughADD - us [...] adds 9e7dd29d66e [ValueTracking] Look through casts when determining non-nullness adds 3c7fa48d5ca AMDGPU/GlobalISel: Widen small uaddo/usubo adds d50257b91f3 AMDGPU/GlobalISel: Legalize more bit ops adds cf686738052 [GlobalISel][IRTranslator] Fix crash on translation of fneg. adds bc22426f2c0 AMDGPU/GlobalISel: Use scalarize instead of clampMaxNumElements adds 696da757ffd GlobalISel: fewerElementsVector for intrinsic_trunc/intrins [...] adds 230bc3fabf9 GlobalISel: Implement narrowScalar for mul adds b1650507d25 GlobalISel: Fix typo in assert messages adds e7c0c5071f9 [X86] Add a pattern for (i64 (and (anyext def32:), 0x000000 [...] adds d08c126ca5a [NFC][X86] Add a few more blsr test cases adds 86d268afeee [X86] Add some missing blsr patterns adds 6cabec4fe44 Revert "Fix defines.txt" adds 57b09c2d6be Revert "Detect incorrect FileCheck variable CLI definition" adds a1b5de1ff8a Revert "Add support for prefix-only CLI options" adds ea45c4dff88 [AArch64][GlobalISel] Fix the G_EXTLOAD combiner creating n [...] adds 171d7285967 Re-apply "r351584: "GlobalISel: Verify g_zextload and g_sextload"" adds 3bedfc935b1 [X86] Regenerate test to explicitly show branching and cond [...] adds c90af59bb37 [X86] Regenerate reverse branch test to explicitly show bra [...] adds 06a647df6d1 [TTI] Add generic SADDSAT/SSUBSAT costs adds 86e74fb2ea5 [X86] Add CGP tests for PR40486 adds d19b1ba1beb [NFC][MCA][X86][BdVer2] Cherry-pick int-to-ivec forwarding [...] adds 85b60d3fc5d [X86][NFC] Replace "<%s" with "< %s" in run-lines. adds 50de4990f06 GlobalISel: Verify load/store has a pointer input adds c15e28b0af5 [x86] refactor logic in lowerShuffleWithUndefHalf adds 5da330584ab [X86] Add test cases for PR36721 (unnecessary andl for %cl [...] adds 74d260d262a Fix some warnings on MSVC adds f8801e9ae4e [COFF] Add new relocation types. adds 307887ef068 [X86][SSE] Add PSUBUS undef element test case (PR40083) adds d907e63559a [x86] add more tests for lowerShuffleWithUndefHalf; NFC adds 55c5b5810c5 [X86][SSE] Permit UNDEFs in combineAddToSUBUS matching (PR40083) adds b1af2037a13 [X86][SSE] Add UNDEF test case for combineSelect ISD::USUBS [...] adds 7f9c221c840 [X86][SSE] Add UNDEF handling to combineSelect ISD::USUBSAT [...] adds 54b2f9d9e2f [x86] add tests for extract/extract/unpack; NFC adds 5b66f011e74 GlobalISel: Factor fewerElementVectors into separate functions adds 06340db3fce [x86] add restriction for lowering to vpermps adds d0b56c0be64 GlobalISel: Don't reduce elements for atomic load/store adds 430f35df2af [AArch64][GlobalISel] Add some vector support for fp <-> in [...] adds fbb2c2cea0c [AArch64][GlobalISel] Add some missing vector support for F [...] adds 547f7ff0708 [AArch64][GlobalISel] Teach RBS about G_FNEG default mapping. adds 246ebb9029f [CMake] Use __libc_start_main rather than fopen when checki [...] adds 7ee4b57ab0e [X86] Add vbmi2 compressstore and expandload tests that are [...] adds 66b8f683ab6 [X86] Add new variadic avx512 compress/expand intrinsics th [...] adds a48d0005963 [ARM GlobalISel] Support integer division for Thumb2 adds 747cd649532 [llvm-objdump] - Implement the --adjust-vma option. adds aa66d2b539c [llvm-objdump] - Fix comment. NFC. adds 13d322459ab [DebugInfo][DAG] Avoid re-ordering of DBG_VALUEs adds 2ac1bfd3661 [MIPS GlobalISel] Select sub adds d9e7f2b23c2 [opaque pointer types] Remove GraphTraits specialization for Type. adds b77f4df06f2 [AMDGPU] Add intrinsics for 16 bit interpolation adds 4771873908c [llvm-objdump] - Print LMAs when dumping section headers. adds 9d102ebca5a [mips] Support for +abs2008 attribute adds 7762c30a52a [llvm-objcopy] Fix crash when writing empty binary output adds d01d94f4c37 [obj2yaml] - Dump the sh_entsize section field. adds 33a23da87fe [cmake] Fix get_llvm_lit_path() to respect LLVM_EXTERNAL_LI [...] adds 12537b58ffa Remove no longer needed Arm specific LICENSE.TXT file. adds 676ed08ecbd VERSION_GREATER_EQUAL not supported in llvm cmake. adds b82ad43d420 [llvm-objdump] - Update test after r352366. NFC. adds 8dc93a81b4f [x86] allow more shuffle splitting to avoid vpermps (PR40434) adds 24fe26b1a5f [llvm-objdump] - Restore a piece of code removed by mistake [...] adds 80afa098b7d [LangRef] Mention vector support for bitreverse/bswap intri [...] adds 32ec2646130 [X86][AVX] Remove lowerShuffleByMerging128BitLanes 2-lane r [...] adds f473f0d9c28 [SimpleLoopUnswitch] Early check exit for trivial unswitch [...] adds df80dbdabc3 [NFC] TLI query with default(on) behavior wrt DAG combines [...] adds 85bf7d97e78 [AliasSetTracker] Update signature to aliasesPointer [NFCI]. adds 316534c43c3 [GlobalISel] Add G_FSIN and G_FCOS generic instructions adds c02744dfa26 [GlobalISel][AArch64] Add IRTranslator support for G_FCOS a [...] adds 11b94ff4098 [GlobalISel][AArch64] Add instruction selection support for [...] adds 97bddddad25 [AliasSetTracker] Cleanup comments. [NFCI] adds acc14ca88d5 [CodeExtractor] Add support for the `swifterror` attribute adds 98d9d8b1f18 [CodeGen][X86] Expand UADDSAT to NOT+UMIN+ADD adds 728ff6c67cc [GlobalISel] Add ISel support for @llvm.lifetime.start and [...] adds d0f8c40a1e5 Revert "[CMake] Use __libc_start_main rather than fopen whe [...] adds 1f0db1fa534 [AArch64] Add 'apple-latest' CPU alias adds 029e638b793 [MC] Do not consider .ifdef/.ifndef as a use adds 47ed425f274 gn build: Fix `lld-link: unknown flag: -fuse-ld=lld` warnin [...] adds 8c8136c7e23 [AliasSetTracker] Cleanup more comments. [NFCI] adds 8a75387dbfb [GlobalISel][AArch64] Add instruction selection support for [...] adds 7e27b512800 gn build: Make cmake sync script work on Windows if git is [...] adds ccc713e3df3 gn build: Add get.py script to download prebuilt gn, make g [...] adds 6b89186f0ec AMDGPU: Add DS append/consume intrinsics adds 14e1194bf88 [InstCombine] add tests for saturating uadd with constant; NFC adds fd7f41d9e91 [InstCombine] add another saturating uadd test (no undefs); NFC adds 42bf149c658 [GlobalISel][AArch64] Add legalization for G_FLOG adds 7a1865822df [AArch64] Include AArch64GenCallingConv.inc once adds 2f8d69acb03 [ARM] Deduplicate table generated CC analysis code adds b16d167fd32 [RuntimeDyld] load all sections with ProcessAllSections adds c59b01a133d Recommit r352255 "[SelectionDAG][X86] Don't use SEXTLOAD fo [...] adds 16315ca6540 [CGP] auto-generate complete checks for add overflow tests; NFC adds e5aed2f2a43 [ThinLTO] Refine reachability check to fix compile time increase adds 9276ecc42a8 [docs] Fix a couple spelling errors. adds 4a40330dd79 Demanded elements support for vector GEPs adds 4d14b7ba6e3 [ThinLTO] Add option to dump per-module summary dot graph adds 03dc0681a4b [WebAssembly] Expand BUILD_PAIR nodes adds 732eb589851 [PPC] Include tablegenerated PPCGenCallingConv.inc once adds 3b68b45b637 [WebAssembly] Handle more types of uses in WebAssemblyAddMi [...] adds d9c4d764b43 Try to make new test more resilient to different orderings adds c09d05a4762 [NFC] Merge failing test from PR40420 adds 13e8ee2a418 [SCEV] Take correct loop in AddRec simplification. PR40420 adds 20fec492cb4 [Test] Add tests for gather/maked.load demanded elements, a [...] adds 4b1ab6d46bf [Tests] Regen to remove future test diffs adds 32ef2b8c9a0 Correct contents for r352453 adds 798fb4e4918 Fix compiler warning when using clang 3.6.0 adds 4f20053b1ce Fix an incorrectly configured test. adds 1bf1b6f36e7 [CodeGenPrepare] Handle all debug calls in dupRetToEnableT [...] adds e7fd3335dd1 [COFF, ARM64] Don't put jump table into a separate COFF sec [...] adds c563f47a39d [NFC] Use ArrayRef instead of SmallVectorImpl where possible adds af14e77aab1 [DebugInfo][DAG] Process FrameIndex dbg.values unconditionally adds d0b3c5133df [IPCP] Don't crash due to arg count/type mismatch between c [...] adds 934c07f2512 Remove 'XFAIL: powerpc64' from a debuginfo test adds a6ad3aa1fd8 [ARM] Add extra testcases for D57121. NFC adds 6d2ed00e0f3 [X86] Regenerate abi-isel.ll test adds 551492d8a44 [ARM] Use sub for negative offset load/store in thumb1 adds 27ad1c1fe43 [X86] Fix linux32 pic tests to use correct relocation model [...] adds f581c654b60 [llvm-symbolizer][doc] Tweak wording of --adjust-vma switch [...] adds 4002e040502 [WebAssembly] Re-enable main-function signature rewriting adds 7a199454c4a [X86] Add PR40483 test case adds 13f0266efbb [CodeGen] Omit range checks from jump tables when lowering [...] adds 48be38f94bb Revert r351833 and r352250. adds 7acb4bb4a6b [AMDGPU] Fix a weird WWM intrinsic issue. adds 67a2922523a gn build: Merge r352444, r352431, r352430 adds db95f488001 Reversing the checkin for version 352484 as tests are failing. adds d99c98b3dd5 [llvm-objcopy] Implement --set-section-flags. adds c00cde6ade5 [SelectionDAGBuilder] Remove redundant variable. NFCI. adds b21d80e08f3 Adjust documentation for git migration. adds c84c48686ce [InstCombine] add tests for ext-of-bool + add/sub; NFC adds 6887626c42c [InstCombine] regenerate test checks; NFC adds 8f2bb54a228 [X86][Btver2] Improved latency/throughput model for scalar [...] adds 62f89358b14 [AArch64] add tests for vector bool math; NFC adds 0131ce28740 [x86] add tests for vector bool math; NFC adds ae17beb3c17 GlobalISel: Fix narrowScalar for load/store with different [...] adds 732a5dfdbc8 [VFS] Fix warning and use better check. adds 935be04820e [DAGCombiner] fold extract_subvector of extract_subvector adds 6fa77014f0b [InstCombine] canonicalize cmp/select form of uadd saturate [...] adds 27ff0c65b44 [DWARF] Emit reasonable debug info for empty .s files. adds 90aa0dc6e7b [AArch64][GlobalISel] Unmerge into scalars from a vector sh [...] adds 728963ac49c [docs] Prevent O0 optnone for opt input adds 0bd89c0d565 [WebAssembly] Ensure BasicSymbolRef.getRawDataRefImpl().p i [...] adds db7033fef7f Check bool attribute value in getOptionalBoolLoopAttribute. adds 9fb9172b439 GlobalISel: Partially implement widenScalar for MERGE_VALUES adds 79e1cb59f53 GlobalISel: Verify pointer casts adds 97e76a628ab [IR] Use CallBase to reduce code duplication. NFC adds 8859c398f22 GlobalISel: Fix unused variable warning in release builds adds 694a127c000 [WebAssembly] Lower SCALAR_TO_VECTOR to splats adds 7f6b76ef91e [WebAssembly] Add missing SymbolRef update from rL352551 adds ebacc9e58a3 Remove a redundant space from an error message; NFC adds cb7fe9bbb3d GlobalISel: Verify memory size for load/store adds de0ded95bae Add 8.0 release bug to merge request script adds 16cbc63cb07 [PowerPC] more opportunity for converting reg+reg to reg+im [...] adds c2b6aeb1f47 GlobalISel: Handle more cases for widenScalar for G_STORE adds 4e2b23d011a Add enum values to CodeGenOpt::Level adds 553368f2f86 GlobalISel: Handle some odd splits in fewerElementsVector adds 20c54d96c73 [WebAssembly] Optimize BUILD_VECTOR lowering for size adds 00f3241eeb2 GlobalISel: Support narrowScalar for uneven loads adds 70cdf88e575 [PowerPC] [NFC] Create a helper function to copy register t [...] adds a20ea208103 GlobalISel: Use appropriate extension for legalizing select [...] adds cceb4ae4eac [WebAssembly] Exception handling: Switch to the new proposal adds b59155ea9ac AMDGPU/GlobalISel: Fix clamping shifts with 16-bit insts adds 1e8d4d3b2ff [IR] Use CallBase to simplify some code adds e405a3bd224 GlobalISel: Implement fewerElementsVector for select adds 4c0da8a5c42 [NFC] fix trivial typos in comments adds d4347343de9 [X86] Add FPSW as a Def on some FP instructions that were m [...] adds f12a02a64d6 [X86] Remove a couple places where we unnecessarily pass 0 [...] adds c35ddbd43e5 [X86] Remove unnecessary code from the top of handleCompare [...] adds a2cd55579f0 Commit tests for changes in revision D41342 adds 65f350b538a Add lit config file to skip tests if WebAssembly target is [...] adds bd0011ce9cb [NativePDB] Fix access to both old & new fpo data entries f [...] adds 71f99915f3c [RISCV] Insert R_RISCV_ALIGN relocation type and Nops for c [...] adds 431f5d79d89 Enable IRCE for narrow latch by defailt adds 511f143e385 Properly use DT.verify in LoopSimplifyCFG adds dc78263c749 [llvm-readobj] - Simplify the code. adds 00ffc652328 [llvm-objcopy][NFC] More error propagation adds a6189f19726 [llvm-objcopy] Support -X|--discard-locals. adds 8f97b230d84 [InstCombine][x86] add tests for addcarry intrinsic; NFC adds a47be0e7cdc [CMake] Accept ENTITLEMENTS in llvm_add_library() adds f067deca740 [llvm-readobj] - Few minor cleanups. NFC. adds 91921e0980d [llvm-exegesis] Add throughput mode. adds b739c0c2b78 [utils] Fix update scripts output when run on python3. adds 52a44943a55 [X86][AVX] Prefer to combine shuffle to broadcasts whenever [...] adds edbf6b77812 AMDGPU: Stop generating unused intrinsic .inc files adds f3ab9fd4fb3 GlobalISel: Add assert that legalize mutation makes sense adds 873d47dbf54 GlobalISel: Add simpler way of always specifying custom lowering adds 2a9164966ee gn build: Add BPF target. adds f3ae9589caa [llvm-objcopy][NFC] More error propagation (linkToBuildIdDir) adds bc99383d67b [DEBUGINFO] Handle restore instructions in LiveDebugValues adds b1e647426f7 Revert "gn build: Add BPF target." adds e53778de214 The test comitted with r348896 needed -march=x86=64 on the [...] adds b132d1b1cb0 SimplifyDemandedVectorElts for all intrinsics adds a7fb287a319 gn build: Set executable bit on get.py adds 8ec862fc858 [X86] Mark EMMS and FEMMS as clobbering MM0-7 and ST0-7. adds 72fb4835994 [Tests] Add tests for propagation of undef elements in vector GEPs adds 99ef84fa6f8 Add a 'dynamic' parameter to the objectsize intrinsic adds 03d9f9c87e0 Reverting r352642 - Handle restore instructions in LiveDebu [...] adds 20ee395d3bf [GlobalISel] Introduce a G_FSQRT generic instruction adds efb2e2a3e06 [GlobalISel] Add IRTranslator support for @llvm.sqrt -> G_FSQRT adds d2bce7d4ae7 [GlobalISel][AArch64] Add instruction selection support for [...] adds 5d6324274bb [GlobalISel][AArch64] Add instruction selection support for [...] adds 323b0c562d3 [AArch64][x86] add tests for add/sub signbits fold; NFC adds b880916519c [DAGCombiner] sub X, 0/1 --> add X, 0/-1 adds dd854ba81b0 [WebAssembly] Restore stack pointer right after catch instruction adds 60349432348 [WebAssembly] MC: Use WritePatchableLEB helper function. NFC. adds bab42cfa02b [GlobalISel][AArch64] Select G_FABS adds 714cc866c2c MIR: Reject non-power-of-4 alignments in MMO parsing adds 7ecd40e2fe2 [PowerPC] delete no more needed workaround for readsRegiste [...] adds 8b38d7e5717 [GlobalISel][LegalizerHelper] Add some missing MI change ob [...] adds e2abb7ac81d [GlobalISel][AArch64] Select G_FEXP adds e8589dfc4d3 [RuntimeDyld] Don't try to allocate sections with align 0. adds 0527d9ef052 [WebAssembly] Remove TODO on wasm.extract.exception intrins [...] adds bc1e5b7bfc1 [X86] Add test case for pr40539. NFC adds a8f4133a65c [X86] Remove handling of ISD::INTRINSIC_WO_CHAIN in Replace [...] adds 55d46c53d07 [LegalizeTypes] Use report_fatal_error instead of llvm_unre [...] adds 6b2f7bde7be [LegalizeVectorTypes] Allow illegal indices when splitting [...] adds a53d6c2052d lit: Let lit.util.which() return a normcase()ed path adds 73306c23201 Reland "gn build: Add BPF target." adds fb767a4d48b [InstCombine] Simplify check clauses in test (NFC) adds a679da115c2 [X86] Add a 32-bit command line to avx512-intrinsics.ll. Mo [...] adds 31a756d96b6 GlobalISel: Fix creating MMOs with align 0 adds 0d8191b84fd [InstCombine] Expand testing for Windows (NFC) adds e424cc64f5a [libFuzzer] update docs adds b2d28d4c345 GlobalISel: Use helper function for MMO splitting adds d08f66450d9 GlobalISel: Allow bitcount ops to have different result type adds bda0adb3834 GlobalISel: Don't call changingInstruction before giving up adds 8927be488e3 GlobalISel: Implement narrowScalar for bswap adds 2a852a1e74e GlobalISel: Handle odd splits in fewerElementsVector for lo [...] adds 3ced1548880 Revert "Reapply "[CGP] Check for existing inttotpr before c [...] adds 2d6a4070cb3 Fix missing C++ mode comment in header adds 18fe2c5936a Add namespace to some types. adds 19f02ae8c16 [SCEV] Prohibit SCEV transformations for huge SCEVs adds 963f6097b67 [CMake] Unify scripts for generating VCS headers adds 0027120a34d [InstCombine] Missed optimization in math expression: simpl [...] adds ef0c5f5d9af Revert "[CMake] Unify scripts for generating VCS headers" adds 066452779dd Commit tests for changes in revision D41940 adds 8829dedd761 Fixup test after r352704 since it changes how paths may be [...] adds e690485141b [SelectionDAG] Codesize: don't expand SHIFT to SHIFT_PARTS adds e964d52e2d5 [ARM] Thumb2: ConstantMaterializationCost adds c043c190fc5 Test commit. NFCI. adds 3dc93751854 Default lowering for experimental.widenable.condition adds 611e5e46319 [X86][AVX] Fold vt1 concat_vectors(vt2 undef, vt2 broadcast [...] adds bb8b9b58f28 [X86][AVX] Enable AVX1 broadcasts in shuffle combining adds 0540ba21085 [X86] combineExtractWithShuffle - more aggressively peek th [...] adds b23da425d45 [llvm-strip] Add --strip-symbol adds 9dd06c1d78f [X86][AVX] Add PR34394 subvector broadcast test cases adds 0213867bef6 [CommandLine] Improve help text for cl::values style options adds d568dc2c8f2 [X86][AVX] Fold broadcast(bitcast(src)) -> bitcast(broadcast(src)) adds f71abe7fa19 [llvm-symbolizer][test] Simplify test input reading adds ae8741935ec [llvm-symbolizer][test] Extract tests from llvm-symbolizer. [...] adds 13be7644cc1 [llvm-symbolizer][test] Extract tests from llvm-symbolizer. [...] adds 9ad14952dfe [llvm-symbolizer][test] Extract tests from llvm-symbolizer. [...] adds e802900f511 gn build: Merge r352681, r352739 adds ab97eba99a0 gn build: Merge r352483 adds 922a3b1b325 [CGP] add more tests for uaddo; NFC adds b51e8c39aea [ThinLTO] Rename COMDATs for COFF when promoting/renaming C [...] adds 2540582e98a [PatternMatch] add special-case uaddo matching for incremen [...] adds 4c8e4dc9fda [llvm-objcopy] Skip --localize-symbol for undefined symbols adds a200bf8c0eb Revert "[ThinLTO] Rename COMDATs for COFF when promoting/re [...] adds c5a629476df revert r352766: [PatternMatch] add special-case uaddo match [...] adds 8c98210bcfc Recommit "[ThinLTO] Rename COMDATs for COFF when promoting/ [...] adds 05f65683d04 [CallSite removal] Remove CallSite uses from InstCombine. adds f4b5e068af8 [X86][AVX] insert_subvector(bitcast(v), bitcast(s), c1) -> [...] adds 7e2bbade378 [X86][AVX] Fold concat(broadcast(x),broadcast(x)) -> broadcast(x) adds 38a6ed08214 Trim trailing whitespace. NFCI. adds 765d138324a [ADT] Fix a typo in isOSVersionLT that breaks the Micro ver [...] adds 1efa4deccde GlobalISel: Fix handling of vectors of pointers in clamp{Mi [...] adds 3396a8da4a7 Lower widenable_conditions in CGP adds 02272e2d7bf Revert "[X86] Mark EMMS and FEMMS as clobbering MM0-7 and ST0-7." adds d68d001a2cb [Intrinsic] Expand SMULFIX to MUL, MULH[US], or [US]MUL_LOH [...] adds 6980a884f19 [DAG] Aggressively cleanup dangling node in CombineZExtLogi [...] adds 7fac036c204 [ELF] Return the section name when calling getSymbolName on [...] adds f3a785f249c [DAG][SystemZ] Define unwrapAddress for PCREL_WRAPPER. adds 4ec5fda1f44 [MemorySSA] Extend removeMemoryAccess API to optimize MemoryPhis. adds fafbf5786f0 [cmake] Note future cleanup in comment. NFC adds 8e4d96d7af5 [opaque pointer types] Add a FunctionCallee wrapper type, a [...] adds 7d44f474796 [DAGCombine] Avoid CombineZExtLogicopShiftLoad if there is [...] adds f4760046cd2 [WebAssembly] Add bulk memory target feature adds b480414e1d0 [EarlyCSE & MSSA] Cleanup special handling for removing Mem [...] adds e0c702bbe85 Fix compilation error with GCC after r352791. adds 5be828a9494 Revert "[opaque pointer types] Add a FunctionCallee wrapper [...] adds e8c9121b5a8 [Hexagon] Rename textually included file from .h to .inc adds eb62b615b95 [x86] add test for missed opportunity to use 'inc'; NFC adds 9edb74e0f28 [WebAssembly] MC: Fix for outputing wasm object to /dev/null adds 5816be49d6d [RISCV] Add RV64F codegen support adds 2824dc95b98 Fixed hasLinkerPrivateGlobalPrefix treating StringRef as C String. adds ba55936f145 Bump minimum toolchain version adds 1bf70014cf4 DeveloperPolicy: update toolchain with sample RFC / patch adds 68d1052dc35 [WebAssembly] Fix a regression selecting negative build_vec [...] adds d217469872d Revert "Bump minimum toolchain version" adds dbe3ece2e56 GlobalISel: Fix MMO creation with non-power-of-2 mem size adds 2172148613f [sanitizer-coverage] prune trace-cmp instrumentation for CM [...] adds ba2f0c0ea2a [x86] add test for missed opportunity to use 'inc'; NFC adds 53522656675 [x86] adjust test to show both add/inc options; NFC adds 9ec60d7d8fa [opaque pointer types] Add a FunctionCallee wrapper type, a [...] adds ff5877ff783 Fix compilation of examples after 13680223b9d8 / r352827 adds b70fae7bdc7 [SelectionDAG] Support promotion of the FPOWI integer operand adds 94f81107690 [RISCV] Implement RV64D codegen adds 67afd3256ef Bump minimum toolchain version adds 75542197bc8 Revert "Bump minimum toolchain version" adds 1454b08a47a [SLPVectorizer] Get rid of IndexQueue array from vectorizeS [...] adds cc26d4e0c30 [obj2yaml] - Merge dumpRelSection and dumpRelaSection. NFC. adds 11e1f0b5096 [CodeGen] Don't scavenge non-saved regs in exception throwi [...] adds baec68f9611 [doc]Update String Error documentation in Programmer Manual adds e8ba93465fd [llvm-symbolizer][test] Rename and tweak tests using llvm-s [...] adds 31d91447d88 Revert r352750. adds a53c9ac0aaf Provide reason messages for unviable inlining adds 58de8603ab0 [X86][BdVer2] Transfer delays from the integer to the float [...] adds ba3936b0ea8 Disable tidy checks with too many hits adds 5896b2e9c8d [AArch64] Optimize floating point materialization adds 4ce5f86eddc [CMake] Add install targets for utilities to LLVM exports i [...] adds f2a76848e9c [InstCombine] try to reduce x86 addcarry to generic uaddo i [...] adds 8b76cd197e5 [InstCombine] Fix -Wunused-variable when -DLLVM_ENABLE_ASSE [...] adds fbac5508ba2 [InstCombine] reduce duplicate code; NFC adds 11549f9b9dc [llvm-objcopy][NFC] Propagate errors in removeSymbols/remov [...] adds 9075f54623d [llvm-strip] Implement --keep-file-symbols adds e9ea0510652 [X86][AVX] Combine INSERT_SUBVECTOR(SRC0, BITCAST(SHUFFLE(E [...] adds e9dc79169d5 [TargetLowering] try harder to determine undef elements of [...] adds 488b40bd2e1 [X86][SSE] Use PSLLDQ/PSRLDQ to mask out zeroable ends of a [...] adds 3ebe457432b [SDAG] improve variable names; NFC adds 3e0069dcb62 [AMDGPU] Fix for vector element insertion adds 6eb7cafc7a9 [InstCombine] Refactor test checks (NFC) adds 6e6c007aec1 Fix some sphinx doc errors. adds 3459ba2fe8a [llvm-objcopy][NFC] More error propagation (executeObjcopyO [...] adds a4f757e1c58 [DWARF v5] Fix DWARF emitter and consumer to produce/expect [...] adds 76a53521ccd [llvm-nm] Report '.comment' ELF sections as 'n' instead of '?' adds 8459474f0c0 [InstCombine] Expand Windows test (NFC) adds 96992cbce30 gn build: Add a missing dependency from llvm/test to llvm-lit adds 184cd38de99 [InstCombine] Refactor test checks (NFC) adds 1677420dc3d [llvm-readobj] Add a flag to dump just the section-to-segme [...] adds 37b280914ad test commit (add blank line) NFC adds cbc358acc70 Fix a bug in the definition of isUnordered on MachineMemOperand adds 45db4e8ea95 [llvm-objdump] - llvm-objdump can skip bytes at the end of [...] adds 3c864f6dc2a Hopefully fix a couple more sphinx doc errors. adds 37ec5c2e398 [InstCombine] Extra null-checking on TFE/LWE support adds 57674f92880 gn build: Create regular archives for the sanitizer runtimes. adds d0f4e649366 [InstCombine] Expand Windows test (NFC) adds 6029aa8149b [opaque pointer types] Pass function types to CallInst creation. adds e84538e8164 [opaque pointer types] Pass function types to InvokeInst creation. adds 6c00b3f35fc [opaque pointer types] Pass value type to LoadInst creation. adds 3bab951f0f5 [opaque pointer types] Pass value type to GetElementPtr creation. adds 3641e513697 [opaque pointer types] Pass function type for CallBase::set [...] adds 4bca96d66ce [DebugInfo] Don't use realpath when looking up debug binary [...] adds ce6e15330e2 [InstCombine] Expand Windows test (NFC) adds bae032027b3 [DebugInfo] Fix mkdir use in test adds 7159cf41014 [AMDGPU] Mark test functions with hidden visibility adds ee92f68b88d [X86][AVX] Add VMOVDDUP-VPBROADCASTQ execution domain mapping adds 37655864826 [COFF, ARM64] Fix localaddress to handle stack realignment [...] adds 890a12e7ad9 [WebAssembly] Add codegen support for the import_field attribute adds 0af0a10c7c8 [Test] Update file w/update_test_checks.py to make a follow [...] adds 49e76263f74 [InstCombine] Refactor test checks (NFC) adds edce282ba0b [CodeGen] Be as conservative about atomic accesses as for volatile adds f016536bac5 [BPF] [BTF] Process FileName with absolute path correctly adds 5121e44428a [AArch64] Fix unused variable [NFC] adds 97dc7fa3189 Revert "[BPF] [BTF] Process FileName with absolute path correctly" adds 49db1b92350 [llvm-objcopy] Add ability to copy MachO object files adds 61ff41aa3b4 [AutoUpgrade] Fix AutoUpgrade for x86.seh.recoverfp adds 588aa709611 [llvm-objcopy] Fix triples in macho tests. adds cb8d1d7cc8c [ASan] Do not instrument other runtime functions with `__as [...] adds 05e68246c09 [llvm-objcopy] Temporarily limit one test to darwin adds d9a8f328e91 Bump minimum toolchain version adds 2e3ef196ba3 [BPF] [BTF] Process FileName with absolute path correctly adds 7ab3c4f0854 Revert "Bump minimum toolchain version" adds 5cbc524c258 [X86][SSE]: Adding full coverage of MC encoding tests for t [...] adds df8b0228421 [LCSSA] Add expensive verification of LCSSA form for sub-loops. adds 959d06a65c3 [LCSSA] Handle case with single new PHI faster. adds 5893e44c14b [SDAG] Add SDNode/SDValue getConstantOperandAPInt helper. NFCI. adds 38d80518304 [X86][AVX] Enable INSERT_SUBVECTOR(SRC0, SHUFFLE(SRC1)) shu [...] adds 0b62e55ec2d [X86] Add another test case for PR40539. NFC adds 87de283c8b2 GlobalISel: Legalization for inttoptr/ptrtoint adds b9ef526a07d AMDGPU/GlobalISel: Legalize select for pointer types adds f9e63ee8f38 AMDGPU/GlobalISel: Legalize constant for pointer types adds ab06ef3e9ba AMDGPU/GlobalISel: Legalize icmp for pointer types adds ed82b5f2748 AMDGPU/GlobalISel: Avoid reporting illegal extloads as legal adds 757bd101c78 GlobalISel: Implement widenScalar for G_EXTRACT vector sources adds c1923fc6c2f GlobalISel: Implement widenScalar for G_UNMERGE_VALUES adds 505cfd572ae [InstSimplify] Missed optimization in math expression: log1 [...] adds 31b117619fe [AMDGPU] Fix -Wunused-variable after rL352978 adds 240f5828090 [X86] Lower ISD::UADDO to use the Z flag instead of C flag [...] adds 09007689382 [X86] Print %st(0) as %st to match what gcc inline asm uses [...] adds d4795197268 [DA][NewPM] Handle transitive dependencies in the new-pm ve [...] adds bff7bbeefc1 [PowerPC] add tests for saturating add; NFC adds 5c0c1bee3ad [CGP] refactor optimizeCmpExpression (NFCI) adds dc695c68e34 [CGP] move test file to prevent bot failures adds ffad2712554 [x86] add CGP uaddo test with weird type; NFC adds 99ec8979503 [X86][AVX] More aggressively simplify BROADCAST source operand adds 34c29daf07c [X86][AVX] Support shuffle combining for VPMOVZX with small [...] adds cf5cc9f6fab [PatternMatch] add special-case uaddo matching for incremen [...] adds 39a2370f4eb [X86][AVX] Support shuffle combining for VBROADCAST with sm [...] adds 25df0ed1c50 [CGP] adjust target constraints for forming uaddo adds 39da3a3c7c4 [PowerPC] adjust test for uaddo change in rL353001 adds bea7d714eca [NFC] Make vector types legal in UREM test adds f38570d9071 [LoopIdiomRecognize] @llvm.dbg values shouldn't affect the [...] adds 213d7e98670 [docs] Recommend assertions when testing. adds 916e581bdec Compute the correct symbol size in llvm-nm even without --p [...] adds 21233a7d673 tests: loosen restriction adds b9225559092 Revert r352985 "[X86] Print %st(0) as %st to match what gcc [...] adds 7b41f567a7c [X86] Regenerate test to drop 'End function' comments some [...] adds 7425230ea1d [X86] Print %st(0) as %st when its implicit to the instruct [...] adds c09d70eb391 Recommit r352660 "[X86] Mark EMMS and FEMMS as clobbering M [...] adds feeb3cebe7a [SCEV] Do not bother creating separate SCEVUnknown for unre [...] adds 7bbe219e0a3 [llvm-exegesis] Don't default to running&dumping all analys [...] adds 6483d8a574c [llvm-exegesis] deserializeMCInst(): bump SmallVector small [...] adds 4ce34f14342 [llvm-exegesis] Throughput support in analysis mode adds 71f2f61a73c [llvm-exegesis] Cut run time of analysis mode by -84% (*sic [...] adds e77d577c452 [llvm-exegesis] Cut run time of analysis mode by another -3 [...] adds cc98a273f06 [SelectionDAG] Add a BaseIndexOffset::print() method for de [...] adds 4a2be07b4eb [NFC] Replace equivalent condition for better readability adds 52687cf9e19 [NFC] Remove redundant parameters for better readability adds 621be551639 [llvm-objcopy][NFC] Fix trailing semicolon warning. adds c491ec2df4d [NFC] Rename variables to reflect the actual status of Guar [...] adds 9575cfc77fa Commit tests for changes in revision D41608 adds 74291297a22 [NFC] Make a check in GuardWidening more obvious adds 0c7508306c6 [ARM] Add testcases for D57671. NFC adds d9061bcf04e [ARM] Mark 255 and 65535 as cheap for Thumb1 "And" adds 091c5c25236 Use auto for dyn_cast case to save a line. NFCI. adds 911c696716f [X86] Add a couple of missed ADD combine tests adds ab6a7293259 [AsmPrinter] Remove hidden flag -print-schedule. adds cd297b5b93d [DAGCombine] Add ADD(SUB,SUB) combines adds cd93dd44c70 AMDGPU/GlobalISel: Legalize select for v4s16 adds 94f90ed34fd GlobalISel: Fix formatting of debug output adds 781412c9556 [CommandLine] Don't print empty sentinel values from EnumVa [...] adds 5e786f3ff1f Revert r353048. adds 152f9e6296a [X86][SSE] SimplifyDemandedBitsForTargetNode - PCMPGT(0,X) [...] adds 6277ca3b6d9 [CommandLine] Don't print empty sentinel values from EnumVa [...] adds 16d0c7bf1b9 [CGP] use IRBuilder to simplify code adds 3da96d6f13e [GlobalISel] Introduce a generic floating point floor opcod [...] adds 511056753e6 [GlobalISel] Add IRTranslator support for G_FFLOOR adds 18c82e623e0 [Intrinsic] Unsigned Fixed Point Multiplication Intrinsic adds 20d8d429313 [WebAssembly] Remove redundant namespaces qualifiers. NFC. adds b5d50917cab [X86] Print all register forms of x87 fadd/fsub/fdiv/fmul a [...] adds 96488ce2b07 [WebAssembly] Rename relocations from R_WEBASSEMBLY_ to R_WASM_ adds ff063adb868 gn build: Merge r352944 adds 71fa5e9a5da Revert "[GlobalISel] Add IRTranslator support for G_FFLOOR" adds 93cc33fa0ff Revert "[GlobalISel] Introduce a generic floating point flo [...] adds 17ad2024889 [WebAssembly] Make segment/size/type directives optional in asm adds aab380fa40c [llvm-objcopy][NFC] Use StringSaver for --keep-global-symbols adds 7188558b790 GlobalISel: Fix moreElementsToNextPow2 adds 95da4b86ed1 [X86] Add ST0 as an implicit def/use of x87 load/store inst [...] adds 6d1fd8955ec Adjust cardinality of internal inliner thresholds adds 9f1831dae26 GlobalISel: Improve gtest usage adds 2835b332d22 [X86] X86DAGToDAGISel::matchBitExtract(): prepare 'control' [...] adds 53171e3cf8f [llvm-objcopy][NFC] simplify an error return adds 9ac1c045584 [WebAssembly] clang-tidy (NFC) adds 74695311606 GlobalISel: Fix CSE handling of buildConstant adds 9eeb421361b GlobalISel: Fix parameter name in documentation adds a435513a7c9 GlobalISel: Allow constructing SrcOp/DstOp from MachineOperand adds b1458604949 GlobalISel: Fix CheckMachineFunction passing if ReadCheckFi [...] adds 2ea14e2ca87 [WarnMissedTransforms] Do not warn about already vectorized loops. adds 6186e8e51b1 [AMDGPU] Support emitting GOT relocations for function calls adds 2260299d7e2 [DEBUGINFO] Reposting r352642: Handle restore instructions [...] adds 71834a7d69e [NewPM][MSan] Add Options Handling adds bbf9e4b7e7c [Tablegen][DAG]: Fix build breakage when LLVM_ENABLE_DAGISEL_COV=1 adds 3e10d473a5e gn build: Windows: write PDBs when is_debug adds 5f5a1c92acd gn build: Windows: use a more standard format for PDB filenames adds 7ef4c67822b [CodeGen][ARC][SystemZ][WebAssembly] Use MachineInstr::isIn [...] adds 823117bf13d [X86] Add test case for report_fatal_error added in r352699. adds cf033b0e812 [InstCombine] Cleanup the TFE/LWE check in AMDGPU SimplifyDemanded adds a6f05aceefd gn build: Revert r353094 (bad merge) adds a43daae17e0 gn build: Windows: use a more standard format for PDB filenames adds 11ecb01af07 [SanitizerCoverage] Clang crashes if user declares `__sanco [...] adds 5d2f3ca3d68 AMDGPU: Don't rematerialize mov with implicit operands adds 733c08b6b3b GlobalISel: Fix not calling observer when legalizing bitcount ops adds 370040444e1 [CGP] add tests for usubo; NFC adds 247a6bc9d0e [llvm-readobj] Report more WebAssembly symbol info adds 02e3a277803 [CGP] fix bogus test names/comments; NFC adds ab8dc6c3bd7 MIR: Validate LLT types when parsing adds dec46528529 [WebAssembly] MC: Mark more function aliases as functions adds be7b21ece25 MachineVerifier: Move verification of G_* instructions to function adds 3bcad46609f GlobalISel: Verify g_select adds 7c4ac52d75c GlobalISel: Enforce operand types for constants adds 44e34019ea8 [PATCH] [TargetLibraryInfo] Update run time support for Windows adds c4446b84146 [ADT] Refactor the Windows query functions (NFC) adds c828f0931ef Revert "[PATCH] [TargetLibraryInfo] Update run time support [...] adds 429b74e0e67 [llvm-readobj] Fix readobj test expectation broken in rL353 [...] adds e16cbae234b [Sanitizers] UBSan unreachable incompatible with Kernel ASan adds 757bf95c735 GlobalISel: Combine g_extract with g_merge_values adds e3333a3a480 GlobalISel: Implement narrowScalar for select adds fbd4142bd83 [SamplePGO] Minor efficiency improvement in samplePGO ICP adds c4130de5479 [DAGCombiner] Discard pointer info when combining extract_v [...] adds 4966488eeef GlobalISel: Consolidate load/store legalization adds c85eac3a24e [WebAssembly] memory.copy adds 05338a60a7d GlobalISel: Fix verifier crashing on non-register operands adds 19b99c3cc48 [SamplePGO][NFC] Minor improvement to replace a temporary v [...] adds 46eec714bbe [WebAssembly] Make disassembler always emit most canonical name. adds eb8d65ecb44 [WebAssembly] Fix indentation after adding IsCanonical prop [...] adds f9a06f69268 Fix narrowing issue from r353129 adds 2ba6898176e [SamplePGO] More pipeline changes when flattened profile us [...] adds 2e5e5e656a1 [LSR] Check SCEV on isZero() after extend. PR40514 adds be4bcea6642 [X86] Add test case from PR40529. NFC adds a0df8c82235 gn build: Upgrade to NDK r19. adds a0e049148f8 [X86] Connect the default fpsr and dirflag clobbers in inli [...] adds c605438958a [DAG] BaseIndexOffset: FrameIndexSDNodes with the same Fram [...] adds ebd39a74451 [DAG][NFC] Add unit tests. adds f7b5bd42e51 [NFC] fix trivial typos in comments adds 99290a64cc2 Previously if the user configured their build but then chan [...] adds 6f4bd04ecc5 [ARM GlobalISel] Support G_GEP for Thumb2 adds 24094aacfd2 [CGP] Add support for sinking operands to their users, if t [...] adds e2b5a7a337f [CostModel][X86] Add UMUL fixed point cost tests adds ed8fc5bdf47 [X86][AVX] Attempt to share broadcasts of different widths [...] adds 8deefe229d6 Fix format string in bindings/go/llvm/ir_test.go (PR40561) adds 22ecef58b53 [DebugInfo][NFCI] Split salvageDebugInfo into helper functions adds 42312852a6c [MCA] Simplify the logic in method WriteState::addUser. NFCI adds 9103f36ae16 [X86][SSE] Add tests showing missing SimplifyDemandedVector [...] adds a601b5946c4 [X86][SSE] Add SimplifyDemandedVectorElts support for X86IS [...] adds da8c6171835 gn build: Fix Python 3 write_vcsrevision script compatibility adds 8bd15f83d03 [MCA] Moved the logic that updates register dependencies fr [...] adds 345ef3537bd [X86][SSE] Rename SimplifyDemandedVectorElts BLENDV tests adds 046c81ea493 Recommit: Add support for prefix-only CLI options adds 2c6406031ee Recommit: Detect incorrect FileCheck variable CLI definition adds b48531106dc gn build: Merge r353072 adds 383143dbcc8 Fix typo in comment, NFCI adds 6984e5d0f61 gn build: BUILD.gn files for clang-tidy and clang-apply-rep [...] adds e7ec86a9c3d [AArch64][x86] add tests for unsigned subtract with overflow; NFC adds 66802c59207 [CGP] add test for unsigned subtract of 1 with overflow; NFC adds c62ab1c8947 [X86][AVX] Add PR34041 subvector broadcast test cases adds 4eedfe55c69 [WebAssembly] Object: Remove redundant method. NFC. adds efc1d18a9b0 AArch64/GlobalISel: Don't clamp from 2 to 2 adds eb26afba071 [X86][AVX] Attempt to combine shuffles to subvector broadcast load adds 393a8f4376e [AArch64][Outliner] Don't outline BTI instructions adds abae4d34872 Enable integrated assembler on MSP430 by default. adds 005e630f24e [LLVM-C] Add Bindings to GlobalIFunc adds 747f42fa4c7 [PGO] Fix the type of the formated variable adds 58b0c984e4f [X86][SSE] Disable ZERO_EXTEND shuffle combining adds f9c9936f9f1 AMDGPU: Fix assert on trunc from bitcast of build_vector adds 61d7d108c8a [DEBUG_INFO][NVPTX] Generate DW_AT_address_class to get the [...] adds 2221866e2e9 [AMDGPU] Consider XOR in waterfall loop as a terminator adds 5677af7c59d GlobalISel: Verify G_GEP adds 216022a44ea Move some llvm-mc tests where they belong adds ed4942cb209 [TargetLibraryInfo] Regroup run time functions for Windows (NFC) adds 3a517c5b25e [WebAssembly] Lower memmove to memory.copy adds 9d070e11f0f [llvm-readobj] Display sections that do not belong to a seg [...] adds b879ff8230f [MC] Don't error on numberless .file directives on MachO adds 9b24317c894 [X86] Regenerate tests missed in r353061. NFC adds 1c10dc8b9c6 [NFC][GlobalISel]: Add a convenience method to MachineInstr [...] adds 4876a5d039e [elfabi] Fix the type of the variable formated for error output adds 55504e9d0dd [PGO] Use a function for creating variable for profile file [...] adds 028b57c02df [InstCombine] split shuffle test to show extra use constraint; NFC adds 7ea159f7bad [WebAssembly] Disable a v128.const test line temporarily adds 0811b200e61 [InstCombine] limit extracting shuffle transform based on uses adds d7838d0a331 [WebAssembly] Add a comment about why v128.const test was d [...] adds 1fada3c69e5 [ADT] Add a fallible_iterator wrapper. adds 86faf4cf8f9 Fixup test on Windows with a case-insensitive filesystem du [...] adds eae2f5e5e0c Orc: Simplify RPC naming system by using function-local statics adds a74459cebda [HotColdSplit] Do not split out `resume` instructions adds b6644eccc0a gn build: Fix clang-tidy build adds 8eb5349a5c0 [BasicAA] Cache nonEscapingLocalObjects for alias() calls. adds b2953f57484 [WebAssembly] Tidy up `let` statements in .td files (NFC) adds 92c26f64392 [x86] add tests for extract+sitofp; NFC adds 1c34480b501 Move DomTreeUpdater from IR to Analysis adds 9bdd6874905 [Test] Add codegen tests for unordered and monotonic intege [...] adds fed7f5c9146 [AliasSetTracker] Minor style tweak to avoid a variable w/t [...] adds b9adaa5e040 [CMake] Unify scripts for generating VCS headers adds 760d33e77de [HotColdSplit] Move splitting after instrumented PGO use adds 8efee35e341 [NFC] Replace readonly SmallVectorImpl with ArrayRef adds aad19fd92e8 [NFC] Extend API of DeleteDeadBlock(s) to collect updates w [...] adds ea18a93b26b [NFC] Revert rL353274 adds acbe716cd7b [LoopSimplifyCFG] Do not count dead exit blocks twice, make [...] adds 41e1dffcf00 [NFC] Factor out detatchment of dead blocks from their erasing adds 7c4561ecd78 Fix misspelled filenames in file headers of llvm/{MC,Object [...] adds 02080367d85 [yaml::BinaryRef] Slight perf tuning (for llvm-exegesis ana [...] adds d4180786f3d [DebugInfo][llvm-symbolizer]Add some tests for edge cases w [...] adds ca1e713fdd4 [DebugInfo]Print correct value for special opcode address i [...] adds e9f465a6a80 [llvm-objcopy] Allow regular expressions in name comparison adds 0e12e35d6c4 [NFC] Simplify check in guard widening adds 5c9002a0e52 [DAGCombine][NFC] GatherAllAliases should take a LSBaseSDNode. adds f71a3445ef6 Attempt to fix buildbot after r353289 adds df1d156afc3 gn build: Merge r353265, r353237 adds 8dee531a480 [MCA] Speedup ResourceManager queries. NFCI adds 00beffb9d08 [x86] vectorize cast ops in lowering to avoid register file [...] adds fad01c3782c AArch64: annotate atomics with dropped acquire semantics wh [...] adds 44f220f910f [SystemZ] Do not return INT_MIN from strcmp/memcmp adds 32ec1f88370 [SelectionDAGBuilder] Refactor Inline Asm output check. NFCI. adds ae502dc0ce0 [InlineAsm][X86] Add backend support for X86 flag output pa [...] adds 4e9d732b58d AArch64: enforce even/odd register pairs for CASP instructions. adds 1dd69f9eb93 [InstCombine] add tests for PR40611 and regenerate checks; NFC adds 9cecbbb1baa [InstCombine] X | C == C --> (X & ~C) == 0 adds 28edf7804c5 [yaml2obj]Allow number for ELF symbol type adds 12181fa9b8b [GlobalISel][NFC] Gardening: Factor out code for simple una [...] adds 939f04bb50c [SelectionDAG] Cleanup some code comments. NFC adds 59f81b1e8f3 [opt-viewer] Add --filter option to select remarks for displaying. adds 954d6be705c [SystemZ] Wait with VGBM selection until after DAGCombine2. adds 7cc46527c24 build: Remove the cmake check for malloc.h. adds 0e5a5025819 [SystemZ] Improved handling of the @llvm.ctlz intrinsic. adds 04d4034ee6d [x86] add tests for horizontal ops (PR38971, PR33758); NFC adds 4e3495949de [X86][DAG] Avoid creating dangling bitcast. adds 85dc9a80b71 [X86] Change the CPU on the test case for pr40529.ll to rea [...] adds 6822ef365af [AliasSetTracker] Pass MustAlias to addPointer more often. adds a4073f45f60 Move IR flag handling directly into builder calls for cases [...] adds 13327941bd9 [DAG] Immediately cleanup unused nodes from extend-based combines. adds aa5113ceaad [LICM/MSSA] Add promotion to scalars by building an AliasSe [...] adds 35331909151 [libObject][NFC] Include filename in error message adds da6b3573b19 [cmake] Add openmp to LLVM_ALL_PROJECTS adds e50fd44ed0c [PowerPC] Add vector truncate test to prep for D56507 NFC adds 050dcb45830 [cmake] Add all subprojects to LLVM_ALL_PROJECTS adds 360b8e580f3 [llvm-ar] Remove leading slash when printing thin archive members adds 903a5691e02 Remove reference to non-existent function. NFC. adds f9dba099ef2 [cmake] Drop clang-tools-extra from LLVM_ALL_PROJECTS adds 2195dd2c4ba [WebAssembly] Expand symbol flags shown by llvm-objdump --symbols adds a69ff48e6e0 Fix a minor grammar thinko. adds c44c3275301 [WebAssembly] Add symbol flag to the binary format llvm.used adds e7e9055ee44 Add OpenBSD support to be able to get the thread name adds 472ba07d192 [WebAssembly] Update test output after rL353357. NFC. adds bae751c35d9 gn build: Merge the test part of r353237. adds 86ab198b4f4 Move the SMT API to LLVM adds 33c30c0b096 Bump minimum toolchain version adds 2504d32a6fd [BranchFolding] Remove dead code for handling EHPad blocks adds a5defd33eab AArch64: implement copy for paired GPR registers. adds 90ccb6a749e [BPF] add code-gen support for JMP32 instructions adds ce31a948757 [ARM] Reformat isRedundantFlagInstr for D57833. NFC adds f118c99457a [ARM GlobalISel] Support G_ICMP for Thumb2 adds d0c143de762 [LSR] Generate cross iteration indexes adds aae528ec39e Fix misspelled filenames in file headers adds 29400a2fb2b [CodeView] Fix cycles in debug info when merging Types with [...] adds 72d855dd8b4 [DAG] Cleanup unused nodes on failed store-to-load forward [...] adds 0bfb8d30864 [X86] Simplify casing. NFC. adds 8f777ee6364 [llvm-ar][libObject] Fix relative paths when nesting thin a [...] adds 9aa1395994d [DAG] Cleanup unused node on failed SELECT Combine. adds ef041718116 [x86] split more 256/512-bit shuffles in lowering adds 24658daa730 [DAG] Cleanup of unused node in SimplifySelectCC. adds 75521639735 GlobalISel: Try to make legalize rules more useful for vectors adds f2e3c262157 GlobalISel: Implement fewerElementsVector for shifts adds df01cb5e337 [DAGCombiner] fold add/sub with bool operand based on targe [...] adds d850ba3107c [HotColdSplit] With PGO add profile entry metadata to split [...] adds 1faffeed219 AMDGPU/GlobalISel: Legalize some f16 operations adds 4bafedb149f AMDGPU/GlobalISel: Legalize fsqrt adds e1e72411f55 [InstrProf] Avoid reconstructing Triple, NFC adds a0c48c8f7d0 Revert "[DAG] Cleanup of unused node in SimplifySelectCC." adds 7c32994026e AMDGPU/GlobalISel: Don't use g_implicit_def in a few tests adds c9e555791db GlobalISel: Fix artifact combiner constant legality checks [...] adds cceef2f7367 AMDGPU/GlobalISel: Restrict g_implicit_def legality adds c0f816e09cd GlobalISel: Implement narrowScalar for shift main type adds 33d83dacf67 [DAGCombiner] (add (umax X, C), -C) --> (usubsat X, C) (PR40111) adds ef001e8e8a7 GlobalISel: Try to fix bot failures adds 6bed14d8a45 [LV] Prevent interleaving if computeMaxVF returned None. adds fdf00f35cb5 [InstCombine] refactor folds for (icmp (bitcast X), Y); NFCI adds e035747475d [cmake] Pass LLVM_TEMPORARILY_ALLOW_OLD_TOOLCHAIN to NATIVE [...] adds 37e240c2fef [CodeGen] Handle vector UADDO, SADDO, USUBO, SSUBO adds 6e3888c2a45 Move SMTSolver dump() methods out-of-line. adds bcd8ea0e2d4 [InstCombine] Fix crashing from (icmp (bitcast ([su]itofp X)), Y) adds 04a78b6099a [LV] Remove unnecessary assignment to UserIC. adds ea1e928e56b gn build: Make check-{clang,lld,llvm} pass on FreeBSD. adds bf48dea5862 [InstCombine] Optimize `atomicrmw <op>, 0` into `load atomi [...] adds 08612dec1d5 [WebAssembly] Fix imported function symbol names that diffe [...] adds 7ce9ffa82ac [WebAssembly] Update test output after rL353474. NFC. adds 7678b444454 [x86] fix formatting; NFC adds 4245638a617 [mips][micromips] Fix how values in .gcc_except_table are c [...] adds 218a20ac21c [AArch64] Fix condition for "high-vector" DUP optimizations. adds 5e75b645f6e [X86] Add FPCW as a register and start using it as an impli [...] adds 14911bb4976 lvm-dwarfdump: Stop counting out-of-line subprogram in the [...] adds 515714f23e8 Fix the lowering issue of intrinsics llvm.localaddress on X86 adds fd7d6a86694 [WebAssembly] Fixed Disassembler ignoring endian swap on bi [...] adds e6576d59f13 AMDGPU/GlobalISel: Legalize addrspacecast adds c8b5bafa375 [GISel]: While constructing the GISelWorklist make sure we [...] adds bbd1e17a339 [WebAssembly] Fix parseImmediate's memory alignment requirement adds 9a22bfd50bf [CodeExtractor] Update function's assumption cache after ex [...] adds fcb98b7928e [ARM] Add OptMinSize to ARMSubtarget adds 2c57c1ebcc3 [LoopSimplifyCFG] Use DTU.applyUpdates instead of insert/de [...] adds 5cf50dec64c [MIPS GlobalISel] Select mul adds ce7f3f7548d Revert r353424 "[llvm-ar][libObject] Fix relative paths whe [...] adds 5f86a063375 [llvm-objcopy] Add --redefine-syms adds 9737365327c Attempt to fix build bot after r353509 adds 2e390e6fde4 [DWARF] LLVM ERROR: Broken function found, while removing D [...] adds 3a178e01c44 [AMDGPU] Fix DPP combiner adds 06d4d4cd593 [AMDGPU][MC][CODEOBJECT] Added predefined symbols to access [...] adds 4473e730491 AMDGPU/GlobalISel: Don't use a copy in addrspacecast lowering adds 2fdf6f97fff gn build: Merge r353471, r353373. adds 005af434d1d [MIPS GlobalISel] Select any extending load and truncating store adds e436b1687ac [llvm-objcopy] Add few file processing directives adds b997233527e AMDGPU/GlobalISel: Fix non-power-of-2 implicit_def adds 83873fbb06b [AMDGPU][MC] Added support of lds_direct operand adds 77724072725 AMDGPU/GlobalISel: Fix shift legalization for non-power-of-2 adds 9274280d4a8 Revert r353416 "[DAG] Cleanup unused nodes on failed store- [...] adds 46ba6856284 [AMDGPU] Fix CS scratch setup on pre-GCN3 ASICs adds 3f56710c999 [x86] fix formatting; NFC adds 02fc2083cc5 [X86] Add basic funnel shift demanded bits tests adds 88d276dbda3 [X86] Remove isReMaterializable from X87 floating point con [...] adds a54c8af4c3f ArgumentPromotion should copy all metadata to new Function adds de0c5e9f256 [TargetLowering] Add SimplifyDemandedBits funnel shift support adds 2108af55511 [test] Run the verifier for dsymutil module tests adds d5cf0c957e9 [TargetLowering] Use ISD::FSHR in expandFixedPointMul adds 1f260f70907 [InstrProf] Implement static profdata registration adds 163f2c349f4 AMDGPU: Remove GCN features and predicates adds 52585b5d4c2 [Cmake] Add an option to build LLVM using the experimental [...] adds a54a8111c1c Document libFuzzer on Windows. adds 05a2d7fcc15 [GISel][NFC]: Add missing call to record CSE hits in the CS [...] adds 5f3121a8b0e [DAGCombine] Optimize pow(X, 0.75) to sqrt(X) * sqrt(sqrt(X)) adds 2d5a72336b4 AMDGPU: Eliminate GPU specific SubtargetFeatures adds 4390f003b33 AMDGPU/GlobalISel: Fix broken tests adds 9025db3ce7c [CodeExtractor] Restore outputs after creating exit stubs adds e3696113b63 Implementation of asm-goto support in LLVM adds f38b0f184c9 [X86] Add FPCW as an implicit use on floating point load in [...] adds 5511feb5dbe [Docs] Use code-block:: text for part of the callbr documen [...] adds 63e0869f559 Revert r353553 "[GISel][NFC]: Add missing call to record CS [...] adds 7301443e1ca Re-apply r353553 "[GISel][NFC]: Add missing call to record [...] adds 73b772da46c [x86] add test for miscompiling setcc transform (PR40657); NFC adds 2c7198dbe41 [NFC] Avoid passing blocks vector to the OutlineRegionInfo [...] adds f2a579a53c2 gn build: Merge r353566 adds 46a164384e4 [GlobalISel] Skip patterns that define complex suboperands [...] adds 3071c1157ba [AMDGPU] Split dot-insts feature adds 0855745b7b0 Recommit "[GlobalISel] Introduce a generic floating point f [...] adds 838fcc69d62 This reverts commit 1440a848a635849b97f7a5cfa0ecc40d37451f5 [...] adds 469309ae52b [AMDGPU] Split idot4/8 signed and unsigned tests. NFC. adds e49cc6fb252 Extra processing for BitCast + PHI in InstCombine adds e128b3821e8 [MC] Clean up unused inline function and non-anchor default [...] adds b9a8dc62465 [CMake] Don't set <PROJECT>_STANDALONE_BUILD adds a7866b10305 [GlobalOpt] Simplify __cxa_atexit elimination adds 0993cc83b86 [yaml2obj][obj2yaml] - Add support for dumping/parsing .dyn [...] adds 8104d2b652f [lib/ObjectYAML] - Fix BB after r353607. NFC. adds d9e1a107e0d [lib/ObjectYAML] - Fix BB after r353607 [2]. NFC. adds 62f9ba9fc99 [X86][SSE] Generalize X86ISD::BLENDI support to more value types adds fe7822a4a25 [SelectionDAG] Extract [US]MULO expansion into TL method; NFC adds b58596f8637 Revert "[SelectionDAG] Extract [US]MULO expansion into TL m [...] adds 8fdf39ac8b7 [yaml2elf] - An attemp to fix s390x BB after r353607. adds 348c9aad78c [yaml2elf.cpp] - Fix compilation under linux. adds af9730abe56 [TargetLowering] avoid miscompile in setcc transform (PR40657) adds 9345d41c33f [X86] Regenerate test. adds 04e18cd6ef2 [x86] add test for setcc sub->shift transform; NFC adds 70a10441b95 [TargetLowering] add tests to show effect of setcc sub->shift; NFC adds 6293d244b9b llvm-lib: Implement /list flag adds 8c2a52db8a1 gn build: Merge r353590 adds 1dffdb8af4e [x86] add another test for setcc miscompile (PR40657); NFC adds 95bd49524cc [X86] CombineOr - fold to generic funnel shifts adds fe93663ba15 [X86] Add tests for funnel undef argument combines adds d91c9122d3f [InstCombine] Fix an unused variable warning. adds fbb9298f75d [X86] Move some vector InstAliases out from under unnecessa [...] adds 7966ea26104 [yaml2obj] - Fix .dynamic section entries writing for 32bit [...] adds 2f51464f160 [Local] Delete a redundant check. NFC adds ea4b5cb48f9 [X86][SSE] Add SimplifyDemandedBits test for BLENDVPD adds 0c9f4335a38 [TargetLowering] refactor setcc folds to fix another miscom [...] adds 5cb368b9cef [X86] Add additional tests for funnel undef/zero argument combines adds 314ef3e2560 [x86] narrow 256-bit horizontal ops via demanded elements adds 618693a06bf [X86] Add masked variable tests for funnel undef/zero argum [...] adds bdd96a725f7 [DAGCombine] Simplify funnel shifts with undef/zero args to [...] adds 86334b318cf [DAG] Add optional AllowUndefs to isNullOrNullSplat adds d3ebbe9464b [X86] Add basic bitreverse/bswap combine tests adds 6be76dee8ab [AArch64] Regenerate bswap tests adds fdfe10a58fd [CodeGen][X86] Don't scalarize vector saturating add/sub adds 14c225ae4b3 [GlobalISel] Regex the opcodes in unit test to fix non-dete [...] adds 9021cc9551e [X86] EltsFromConsecutiveLoads - replace SmallBitVector wit [...] adds f513877fcb4 gn build: Fix clang-tidy dep on ClangSACheckers. adds be7e2cd3d0e [X86] Removed unused SDTypeProfile. NFC adds 8677a197637 [CallSite removal] Migrate the statepoint GC infrastructure [...] adds 7fe8f82f542 [CallSite removal] Migrate ConstantFolding APIs and impleme [...] adds 89e74d724de [CallSite removal] Port InstSimplify over to use `CallBase` [...] adds de6bbaa238f Update files that were mistakenly added with the old file header. adds 557521175cb Update files that were mistakenly added with the old file h [...] adds 68e4016eed2 Update new files added to llvm-objcopy to use the new file header. adds 19fb84fa59a Update more files added with the old header to the new one. adds 9b0aea7bcdf [ARM] LoadStoreOptimizer: just a clean-up. NFC. adds 53ff4867dba Remove a declaration that is dead, and not even implemented [...] adds 035c5fe3c92 Remove `CallSite` from the CodeMetrics analysis, moving it [...] adds b041a3628d2 [llvm] [cmake] Use current directory in GenerateVersionFromVCS adds 65f398e4677 Move CFLGraph and the AA summary code over to the new `Call [...] adds 56e1e614d14 [ARM] LoadStoreOptimizer: reoder limit adds aed0779715d Small refactoring of FileError. NFC. adds f5e90e6d5ab Attempt to fix buildbot after r353679 adds ab1f00a1a5e [DWARF] LLVM ERROR: Broken function found, while removing D [...] adds f9937e7a4e1 Attempt to fix buildbot after r353679 #2 adds 2ff2d32b961 test-release.sh: Add option to use ninja adds 67498690ed0 [TEST] Add failing test from PR40454 adds 77aaa84281c [NFC][ARM] Simplify loop-indexing codegen test adds a0ecdf4bba1 [AMDGPU] Enable DPP combiner pass by default. adds 946a92e5fad [ARM] Add v8m.base pattern for add negative imm adds c8a48c59f47 [TEST] Add missing opportunity test for PR39673 adds 45caba411d2 Revert "[X86][SSE] Generalize X86ISD::BLENDI support to mor [...] adds 4fee3cff4d9 [AMDGPU] Fix DPP sequence in atomic optimizer. adds b9408bae201 [AMDGPU] Remove unused variable adds 00bde103cd4 [MCA] Return a mask of busy resources from method ResourceM [...] adds e258a803933 Move some classes into anonymous namespaces. NFC. adds 2edc14dd19b Add recipes for migrating downstream branches of git mirrors adds e2953b930b5 [X86] Regenerate insertelement tests adds 14478b44a81 [AMDGPU] fix atomic_optimizations_buffer.ll test after DPP [...] adds c0665d4bcd8 GlobalISel: Add G_FCANONICALIZE instruction adds f344f53426c Recommit "[GlobalISel] Add IRTranslator support for G_FFLOOR" adds baeeed43cc2 [GlobalISel][AArch64] Select G_FFLOOR adds 0783d48feda [PowerPC] Avoid scalarization of vector truncate adds b2b9806fed6 [MCA][Scheduler] Track resources that were found busy when [...] adds d3d623b47b6 [DebugInfo] Fix /usr/lib/debug llvm-symbolizer lookup with [...] adds ca332cb943a [GlobalISel][AArch64] NFC: Remove unnecessary IR from selec [...] adds 5dfbd9a2388 [AArch64][GlobalISel] Add isel support for a couple vector [...] adds 1fb641f9e6a [TargetLibraryInfo] Update run time support for Windows adds e5935fd52f3 [LICM&MSSA] Limit store hoisting. adds 30806aba1e3 [SelectionDAGBuilder] Add restrictions to EmitFuncArgumentDbgValue adds a054687ab14 [InstCombine] Fix matchRotate bug when one operand is a Con [...] adds 0bb9e7af427 Refactor setAlreadyUnrolled() and setAlreadyVectorized(). adds e15e0ec30e1 [MemorySSA] Remove verifyClobberSanity. adds bae4b672087 [globalisel] Restore comment explaining the nits of GISelCh [...] adds 1369773f897 [llvm-cxxfilt] Split and demangle stdin input adds 55a63572d1d [X86] Correct the memory operand for the FLD emitted in FP_ [...] adds 588dc9bffeb [globalisel] Correct string emitted by GISelChangeObserver: [...] adds 30388115533 GlobalISel: Fix not calling the observer when legalizing G_EXTRACT adds f3f46916050 GlobalISel: Implement moreElementsVector for implicit_def adds 377fba3b5c7 [IRReader] Expose getLazyIRModule adds bc24c432c21 [LegalizeTypes] Expand FNEG to bitwise op for IEEE FP types adds 12946fbd9db [TargetLibraryInfo] Update run time support for Windows adds 45f5ca3e2d4 GlobalISel: Verify G_EXTRACT adds 01b9856485b [tblgen] Add a timer covering the time spent reading the In [...] adds 5021270f7bd Be conservative about unordered accesses for the moment adds fa1c1f7304a [Test] Autogenerate a statepoint test and actual show the reload adds 49124bf7453 DebugInfo: Split DWARF + gmlt + no-split-dwarf-inlining sho [...] adds c888abcfc11 [Tests] Fill out a few tests around gc relocation uniquing adds 6f6c9d03984 [Test] Use autogenerated checks for more statepoint tests adds 7dd25617402 [LoopReroll] Fix reroll root legality checking. adds d4b7ab5a377 Fix r353771 to target linux only (split-dwarf isn't support [...] adds b6428b8bf9c [PowerPC] add tests for logic of setcc (PR40611); NFC adds 57909365e7d [x86] add tests for logic of setcc (PR40611); NFC adds 0f056ecd63f [CMake] Don't override required compiler flags in the runti [...] adds a0e03553f97 [build] Remove a stray comment. NFC adds 6fe96f2c964 [X86] Remove the value type operand from the floating point [...] adds ea98e2107dc [X86] Collapse FP_TO_INT16_IN_MEM/FP_TO_INT32_IN_MEM/FP_TO_ [...] adds d268c90aa57 [NFC] Add parameter for keeping one-input Phis in DeleteDea [...] adds 0307be3cc16 [Statepoint Lowering] Update misleading comments about chains adds 056e9a4188c [NFC] Rename DontDeleteUselessPHIs --> KeepOneInputPHIs adds ce2d739dc13 [LoopSimplifyCFG] Pay respect to LCSSA when removing dead blocks adds 2841bd0ff50 Delete blocks from DTU to avoid dangling pointers adds a43cecd3b42 LibFuzzer.rst: double backticks adds 1ee69f0dfea [yaml2obj/obj2yaml] - Move `Info` field out from `Section` class. adds cfa6c5f00aa [LoopSimplifyCFG] Change logic of dead loops removal to avo [...] adds 16007333e98 [llvm-readobj] - Simplify .gnu.version_r dumping a bit. adds 610cf8006d6 [llvm-readobj] Only allow 4-byte pr_data adds 9d1a27061cc [IndVars] Fix corner case with unreachable Phi inputs. PR40454 adds bbe8122a3ca [DebugInfo] Keep parameter DBG_VALUEs before prologue code adds 814924db549 [DebugInfo] Don't salvage load operations (PR40628). adds 185dbb6e1b1 [NFC] Simplify code & reduce nest slightly adds aaee83c287d [LoopSimplifyCFG] Fix test broken in release mode in r353813 adds 31cd6654ed7 GlobalISel: Move some more legalize cases into functions adds bfe35f840da GlobalISel: Use default rounding mode when extending fconstant adds bb8d9165a41 AMDGPU/GlobalISel: Only make f16 constants legal on f16 targets adds 19350f7dddc [llvm-dwp] Abort when dwo_id is unset adds 48fad281443 [Codegen] Make sure kill flags are not incorrect from remov [...] adds d135f2406f9 AMDGPU/GlobalISel: Add more insert/extract testcases adds 02b7d8fb42d [PowerPC] Regenerate test adds bcc80f35660 [MCA] Improved debug prints. NFC adds 040509be6c2 [SelectionDAG] Fix return calling convention in expansion of ?MULO adds 9d61e28a96c [x86] add negative tests for setcc folds; NFC adds 51dad635ada [DAGCombiner] convert logic-of-setcc into bit magic (PR40611) adds 1fcc05880eb [X86][AVX] Enable shuffle combining support for zero_extend adds d1ae68f0324 [GlobalISel][AArch64] Select llvm.bswap* for non-vector types adds d5af09c2145 [tablegen] Add locations to many PrintFatalError() calls adds 96db5f238eb [GlobalISel][NFC] Gardening: Make translateSimpleUnaryIntri [...] adds bdb2519a0cc [PowerPC] Fix printing of negative offsets in call instruct [...] adds 3044368de25 [SystemZ] Use VGM whenever possible to load FP immediates. adds 9becf5911e8 [InlineSpiller] Fix a crash due to lack of forward progress [...] adds 80d4df92c75 [AArch64] Expand v8i8 cttz (PR39729) adds 02f8fc49ff4 [llvm-dwp] Avoid writing the output dwp file when there is [...] adds 638090e32fa Fix undefined behaviour in PPCInstPrinter::printBranchOperand. adds 5833ba562fc [llvm-dwp] Use color-formatted error reporting adds 5466d0bac4d [ConstProp] add test for miscompile from bitcast transform; NFC adds 2d0b1b5542d Fix auto-upgrade for the new parameter to llvm.objectsize adds 4499765b6a9 [SelectionDAG] Clean up comments in SelectionDAGBuilder.h. NFC adds e126f1baea2 [gn build] Separate debug and optimization settings adds 029ba20623d AMDGPU: Remove duplicate processor (gfx900) adds 9cf30e4f292 AMDGPU/NFC: Remove SubtargetFeatureISAVersion since it is n [...] adds 56bc56e2454 [Tests] A few more live-in deopt lowering tests adds bb0402417fc [LICM] Cap the clobbering calls in LICM. adds 17f2e5bd11f [SystemZ] Remember to cast value to void to disable warning. adds b232056f5e9 AMDGPU: Ignore CodeObjectV3 when inlining adds 389e0664f8e AMDGPU: Try to use function specific ST adds 7c0006da851 [MemorySSA & LoopPassManager] Add remaining book keeping [NFCI]. adds 629efa3c8d6 [dsymutil] Don't clone empty CUs adds a1881f222dd [dsymutil] Improve readability of cloneAllCompileUnits (NFC) adds c987e861dd1 [MC] Make symbol version errors non-fatal adds 45dd4f2fbc1 [llvm-readobj] Dump GNU_PROPERTY_X86_FEATURE_2_{NEEDED,USED [...] adds 9b058197420 [LoopSimplifyCFG] Re-enable const branch folding by default adds cb9edfda6ca [llvm-objcopy] Add --strip-unneeded-symbol(s) adds 0e7879be673 [X86] Refactor the FP_TO_INTHelper interface. NFCI adds 7cbba352613 [X86] Use default expansion for (i64 fp_to_uint f80) when a [...] adds 74c86f74996 [X86][SLP] Enable SLP vectorization for 128-bit horizontal [...] adds 95decc39b55 [llvm] [cmake] Provide split include paths in LLVMConfig adds 42f63a9ef4a Make llvm::Optional<T> trivially copyable when T is trivial [...] adds ac705e8410a [DebugInfo] Stop changing labels for register-described par [...] adds 9f583675584 [GuardWidening] Support widening of explicitly expressed guards adds f37f383fd3d Missing header adds b902ab171c3 [DebugInfo][InstCombine] Prefer to salvage debuginfo over s [...] adds fcf88f08a21 [MCA][Scheduler] Use latency information to further classif [...] adds 8810171ee89 [ARM GlobalISel] Support G_SELECT for Thumb2 adds e1944146735 Revert r353927 adds 259523f75aa [NFC] Add const qualifiers where possible adds e52eea9dbbe [DebugInfo][DAG] Limit special-casing of dbg.values for Arguments adds e9cd1e556a8 [MCA] Store a bitmask of used groups in the instruction des [...] adds 7d7f9355cd8 [DebugInfo][DAG] Refactor dbg.value lowering into its own method adds 95d339f46f1 [llvm-readobj] Rename pr_data to PrData adds 64ea45e4889 [X86][AVX] Add shuffle_v8i32_0dcd3f14 shuffle test case adds 826e231bb6f [DebugInfo][DAG] Either salvage dangling debug info or emit [...] adds 5414d2957fa [Tests] Rename some test files for consistency adds a876ea7b727 [AArch64] Support reserving arbitrary general purpose registers adds 3a73f3f781b [Tests] Auto update a test adds 9483ee997b9 [Tests] First batch of cornercase tests for unordered atomics adds 3637405f125 Re-commit rL353927, patch included adds acb7bf3cf98 [X86] Add 'fxsr' to the getHostCPUFeatures detection code. adds 011c044ce0a [Tests] Add a bunch of tests for load folding w/unordered atomics adds 70b3852f944 [Tests] RMW folding tests w/unordered atomic operations adds 4477a571f31 [Tests] More unordered atomic lowering tests adds 18afa443d99 [CodeExtractor] Only lift lifetime markers present in the e [...] adds 21b311090c4 [X86] Add 'mpx' to getHostCPUFeatures. adds 5a03a071de7 [SelectionDAG] Kill last uses of getAtomic w/o a MMO operand [NFC] adds ff64ebce035 gn build: Merge r353957. adds 2d7289e2fa5 Revert r353962 adds 5077597e0d5 [WebAssembly] Bulk memory intrinsics and builtins adds c6bc69a5730 [NewPM] Second attempt at porting ASan adds d0db64f72f4 [WebAssembly] memory.fill adds 4db7091f7d4 [AVR] Fix a typo - 's/analisys/analysis' adds 11a96c97970 [RegAllocGreedy] Take last chance recoloring into account i [...] adds 359683ab14e [SelectionDAG] Inline a single use helper function, and rem [...] adds 98cd2e90ef7 [llvm-readobj] Dump GNU_PROPERTY_X86_ISA_1_{NEEDED,USED} no [...] adds 8fb384d7eeb [ConstProp] add IR tests to show miscompiles; NFC adds 090fa34a285 [PowerPC][NFC] Added tests for prologue and epilogue code gen. adds 0978a16efb3 [llvm-ar][libObject] Fix relative paths when nesting thin a [...] adds 6cbfeaa33c3 [globalisel][combine] Split existing rules into a match and [...] adds dce0292ccbd [llvm-objdump] Allow short options without arguments to be grouped adds 1854768f0ff Revert "[llvm-objdump] Allow short options without argument [...] adds afc36095627 [X86] Make (f80 (sint_to_fp (i16))) use fistps/fisttps inst [...] adds 038feda6457 Relax test to check for a valid number instead of a specifi [...] adds 5479bcfc84a [llvm-readobj][test] Add all GNU_PROPERTY_X86_FEATURE_2_{NE [...] adds f3757f24632 [NFC] Refactor LICM code for better readability adds 8bfdad6a76d [Support] Fix TempFile::discard to not leave behind tempora [...] adds 0c8bcbe336b [ARM] Ensure we update the correct flags in the peephole optimiser adds a8b2424477d Fix an accidentally flipped pair of arguments, NFCI adds e3e0d21b701 Teach isGuaranteedToTransferExecutionToSuccessor about wide [...] adds d9bd97c1321 Make widenable condition transparent for MemoryWriteTracking adds e817e7373ad [MIPS GlobalISel] Select branch instructions adds dae3d59a6b8 [Instrumentation][NFC] Fix warning. adds 3cb9895a5c9 [MIPS GlobalISel] Select phi instruction for integers adds c5767506b55 Reapply [VFS] Allow multiple RealFileSystem instances with [...] adds a568d027b02 [RISCV][NFC] Add RV64I CHECK lines to inline-asm.ll test adds b57f41fcaa7 [LoopUnrollPeel] Add case where we should forget the peeled [...] adds 978f4b006b0 Refine ArgPromotion metadata handling adds 4b5fc6f0269 [X86][AVX] Add PR40730 test case adds 8281381f1f6 [Tests] Add tests for all idemptotent atomicrmws adds 05fc6965d5d [SystemZ] Do not emit VEXTEND or VROUND nodes without vecto [...] adds 08804a7b369 [X86] cleanup inline asm register generation. NFCI. adds 2c8ca87c565 [llvm-ar] Implement the P modifier. adds d6a3b5786ad Support: use internal `call_once` on PPC64le adds d7d8ee8a869 Teach instcombine about remaining "idempotent" atomicrmw types adds fd015e4488f Recommit Optional specialization for trivially copyable types adds 3cf7619a099 Optional specialization for trivially copyable types, part2 adds 3e53c14be52 Stop enabling clang-tools-extra automatically when clang is [...] adds fae0ff6ec8d Canonicalize all integer "idempotent" atomicrmw ops adds 2ecdf36fb14 [InstCombine] Add todos for possible atomicrmw transforms adds a7225a2f1ef [CMake] Fix ability to use LLVM_ENABLE_PROJECTS with LLVM_E [...] adds c4152371776 [ThinLTO] Detect partially split modules during the thin link adds 9b6003fe19d AMDGPU/GlobalISel: Handle split for 64-bit VALU select adds 2f5fd7e3bda [AMDGPU] Ressociate 'add (add x, y), z' to use SALU adds 217f03f322c AMDGPU/GlobalISel: Fix RegBankSelect for GEP. adds 75b1901bac1 [lit] Set --single-process for single tests and --threads=1 adds 81e2f59c840 Replace gcroot verifier tests adds 6f55bb14e6a GlobalISel: Add alignment to LegalityQuery MMOs adds 6f8664e9c64 MC/ELF: Allow targets to set ABI version adds d8ffa5fe1b9 [lit] Remove --single-process option (use -j1 instead) adds aea63d5e2dc [x86] add tests for extractelement of FP; NFC adds f85aaf19177 [INLINER] allow inlining of address taken blocks adds d4e78b06a14 Revert "[INLINER] allow inlining of address taken blocks" adds 925de09633b [symbolizer] Avoid collecting symbols belonging to invalid [...] adds 1d02248c5fe AMDGPU: Set ABI version to 1 for code object v3 adds 84018efd3fc [GISel][NFC]: Add methods to speed up insertion into GISelWorklist adds 198108c8a84 [llvm-cxxfilt] Fix a comment typo. NFC. adds 747940fe8d9 [lit][NFC] Cleanup copy&paste naming mistake adds 5716349e30d Revert "[SystemZ] Do not emit VEXTEND or VROUND nodes witho [...] adds 55bbc70d127 X86: Replace isSafeToClobberEFLAGS implementation adds 5b6bbc8515c [TEST] Update test comments, refactor checks with update_te [...] adds ffaed663600 [NFC] Tweak SplitBlockAndInsertIfThen to use existing ThenBlock adds 52cd80dbc1f [ARM CGP] Fix ConvertTruncs adds 6ea38efaaa1 [RISCV] Support assembling %got_pcrel_hi operator adds 384f64397f6 [RISCV] Add assembler support for LA pseudo-instruction adds 3cbeb27e3bd [ARM GlobalISel] Support branches for Thumb2 adds 697f2a80e9c [ARM GlobalISel] Style fix. NFCI adds 7e13a67ffc2 [X86][AVX] lowerShuffleAsLanePermuteAndPermute - fully popu [...] adds e45a4d28558 [NFC] Promote DFS to field for further use adds 1b41b25fc11 [BPI] Look through bitcasts in calcZeroHeuristic adds 97cf8fa3e72 Fix "field 'DFS' will be initialized after field 'DTU'" war [...] adds 45cd157a1e7 [NFCI] Factor out block removal from stack of nested loops adds 83639a0d9c2 Speculatively revert r354051 "Recommit Optional specializat [...] adds 9b96000bd6a [MergeICmps][NFC] Improve doc. adds a79e97e495b [MergeICmps] Make base ordering really deterministic. adds f6aa45dfcea OptionalStorage implementation for trivial type, take III adds 57078b6e3a1 Try to organize MachineVerifier tests adds c86376b8970 GlobalISel: Fix inadequate verification of g_build_vector adds 91ecc30daa8 Revert r354137 - OptionalStorage implementation for trivial [...] adds d8794196af3 [InstCombine] fix crash while trying to narrow a binop of s [...] adds f9f8ba4f3b1 [Tests] Demonstrate more missing atomicrmw transforms adds 8dbb7788550 [MCA][LSUnit] Return the ID of the dependent memory operati [...] adds dadc89d53f3 Fix 80-column limit in SimplifyDemandedBits/SimplifyDemande [...] adds 91735b45699 [MCA] Improved code comment. NFC adds 45c9fb93759 [HotColdSplit] Schedule splitting late to fix perf regression adds c26f76b367a [CodeExtractor] Do not lift lifetime.end markers for region inputs adds 9129f92efa6 Recommit "[SystemZ] Do not emit VEXTEND or VROUND nodes wit [...] adds cb22b0f62e8 [X86] Move all the SSE legality checks out of FP_TO_INTHelp [...] adds 45ef910a264 [X86] Fix LowerAsmOutputForConstraint. adds 92fd2811692 [docs] Document LLVM_ENABLE_IDE adds 5c802fd2ca4 [InstCombine] Convert atomicrmws to xchg or store where legal adds ba66e8fd763 [InstCombine] Address a couple stylistic issues pointed out [...] adds a9c85cb3b82 [X86] Don't set exception mask bits when modifying FPCW to [...] adds 2b63446e67f [EarlyCSE & MSSA] Cap the clobbering calls in EarlyCSE. adds 0631be28f65 [lit][NFC] Cleanup lit worker process handling adds 2cb3057fcbf [lit] Remove LitTestCase adds df61a5888f8 [X86] Don't prevent load folding for cvtsi2ss/cvtsi2sd base [...] adds 33b741c2ea9 [CMake] Use variables rather than ":" delimiters adds d26e1d9d953 llvm-nm: Observe -no-llvm-bc for archive members adds 42724d04c45 [X86] When type legalizing the result of a i64 fp_to_uint o [...] adds af60db9bfba Make Optional<T> Trivially Copyable when T is trivially copyable adds a99830ce5ab Revert r354199: Make Optional<T> Trivially Copyable when T [...] adds dbfa740631d Fix typo in docs adds d218316be04 Fixed code snippet in Kaleidoscope tutorial to reflect fina [...] adds 7405c60df8d [bindings/go] Fix building on 32-bit systems (ARM etc.) adds 14b61d32b7c [LLVMSupport]: Remove a severely outdated README. adds b9c370e66c4 [NFC] Better encapsulation of llvm::Optional Storage adds 76b3bc528c5 Revert [NFC] Better encapsulation of llvm::Optional Storage adds 47fab601dff [NFC] Factor out a function for future reuse adds 58ac5f316a1 [InstCombine] add tests for unsigned saturated add; NFC adds 281eb93196b [NFC] Fix name and clarifying comment for factored-out function adds 47d34935368 [InstCombine] reduce unsigned saturated add with 'not' op adds 5c63b2cd251 [InstCombine] add more tests for unsigned saturated add; NFC adds 6de5879eecb [InstCombine] reduce more unsigned saturated add with 'not' op adds c6134a921b7 [SelectionDAG] Extract [US]MULO expansion into TL method; NFC adds 8924ea3d57d [NFC] Teach getInnermostLoopFor walk up the loop trees adds f6e5376a873 [TEST] Remove 2>&1 from tests adds 8201c54c002 [X86] In FP_TO_INTHelper, when moving data from SSE registe [...] adds 043364a6810 [InstCombine] add even more tests for unsigned saturated add; NFC adds c94e63d5576 [LLVM-C] Add bindings to create enumerators adds 4ba84a04fd3 [NFC] Better encapsulation of llvm::Optional Storage adds 29e32d384f9 [NFC] Better encapsulation of llvm::Optional Storage, part II adds 83d23097a6d Revert [NFC] Better encapsulation of llvm::Optional Storage adds 031c241a742 gn build: Merge r354156 adds e598074374d [MC] Make SubtargetFeatureKV only store one FeatureBitset a [...] adds 89d8d904735 [DAGCombiner] Eliminate dead stores to stack. adds 3cfd39d61c9 Revert r354244 "[DAGCombiner] Eliminate dead stores to stack." adds e9cf0239fe5 Recommit [NFC] Better encapsulation of llvm::Optional Storage adds 3a72049da51 [llvm-exegesis] [NFC] Fixing typo. adds 846a9882992 [MCA] Slightly refactor method writeStartEvent in WriteStat [...] adds b6d8f1d9229 [NFC] Make Optional<T> trivially copyable when T is trivial [...] adds 3d4666cd74d [llvm-readobj] - Simplify .gnu.version_d dumping. adds 628018073d7 [MCA] Correctly update register definitions in the PRF afte [...] adds 7e06b426b60 [InstCombine] reduce even more unsigned saturated add with [...] adds 5f8e90cc7e0 Revert "[InstCombine] reduce even more unsigned saturated a [...] adds 74ea62225d7 [x86] split more v8f32/v8i32 shuffles in lowering adds 57d9165df08 GlobalISel: Fix double count of offset for irregular vector [...] adds 0ed7f50918a GlobalISel: Make buildExtract use DstOp/SrcOp adds b1b624d08a3 GlobalISel: Implement widenScalar for g_extract scalar results adds 1e3c4790abc AMDGPU: Use MachineInstr::mayAlias to replace areMemAccesse [...] adds 09f3b5ecb16 [CGP] form usub with overflow from sub+icmp adds 1d3cbd73312 [GlobalISel][AArch64] Legalize + select some llvm.ctlz.* in [...] adds 84a16eb1cb6 [X86] Remove command line strings from the ProcIntel* features. adds 03a15eec9ef [Dominators] Fix and optimize edge insertion of depth-based search adds f2e80bf41c5 [ARM GlobalISel] Support G_PHI for Thumb2 adds 394aa566582 [NFC] Store loop header in a local to keep it available aft [...] adds 58b987211a0 [NFC] API for signaling that the current loop is being deleted adds 090851ba33b Fix obsolete comment. NFC adds ec70b5d16b0 [yaml2obj] - Do not ignore explicit addresses for .dynsym a [...] adds 1cb4de41ab3 [yaml2obj] - Do not skip zeroes blocks if there are relocat [...] adds 67f1133492c Fix BB after r354319 "[yaml2obj] - Do not skip zeroes block [...] adds 6121ddcb93a [RISCV] Re-organise calling convention tests adds ca483bfba2a [obj2yaml][yaml2obj] - Add support of parsing/dumping of th [...] adds 6e445415784 Fix BB after r354328. adds 06073912d51 Revert r354328, r354329 "[obj2yaml][yaml2obj] - Add support [...] adds 43690c27c6f [RISCV][NFC] Move some std::string to StringRef adds b9c345bb3bc Recommit r354328, r354329 "[obj2yaml][yaml2obj] - Add suppo [...] adds 0f417c50db8 [yaml2obj][obj2yaml] - Support SHT_GNU_versym (.gnu.version [...] adds cd7aa81b8b2 [X86][AVX] EltsFromConsecutiveLoads - Add BROADCAST lowerin [...] adds 00d07572968 GlobalISel: Verify g_insert adds ee8e40b4f15 Cast from SDValue directly instead of superfluous getNode(). NFCI. adds 87f5caf3557 [yaml2obj][obj2yaml] Remove section type range markers from [...] adds 47f8b7cd251 GlobalISel: Implement moreElementsVector for bit ops adds f8fa4080b9d [X86][AVX] Update VBROADCAST folds to always use v2i64 X86vzload adds 406dc2a0d5d GlobalISel: Implement moreElementsVector for G_EXTRACT source adds a92e26ffc6b index.rst: Remove Dragonegg link adds 6583403fc33 index.rst: Remove bb-chapuni from list of IRC bots adds 379689ce0c5 GlobalISel: Implement moreElementsVector for select adds 7300bbb8141 [X86] Filter out tuning feature flags and a few ISA feature [...] adds 15752e18776 X86AsmParser AVX-512: Return error instead of hitting assert adds be849ca61f0 [X86] Bugfix for nullptr check by klocwork adds 3e38505d061 [X86][AVX2] Hide VPBLENDD instructions behind AVX2 predicate adds cd6566ea72c [SDAG] Use shift amount type in MULO promotion; NFC adds a593998fc79 [X86][SSE] Add pblendw commuted load test case adds ed9ed6effdb Fix stupid assembly comment typo adds 9ac39671ccf [NFC] Remove unused headers in Optional.h adds 049e568f3c8 [X86][SSE] Generalize X86ISD::BLENDI support to more value types adds 463cb21190d [libObject][NFC] Use sys::path::convert_to_slash. adds 20cf903d60d Annotate timeline in Instruments with passes and other time [...] adds 660bc13d97e Fix builds for older macOS deployment targets after r354365 adds 26dfbddae18 Revert "Revert "[llvm-objdump] Allow short options without [...] adds 82fbd87152f [X86] Don't consider functions ABI compatible for ArgumentP [...] adds 6e8fe0619d7 Testing commit access adds 0503e22ae30 [llvm-cov] Add support for gcov --hash-filenames option adds d356001c098 [ConstantFold] Fix misfolding of icmp with a bitcast FP sec [...] adds 1b1172ad905 [ConstantFold] Fix misfolding fcmp of a ConstantExpr NaN wi [...] adds 23a894cc9ed PowerPC: Fix typos in comments adds 788a673f2da Testing git-llvm-push script adds 783c1f039fb [InstCombine] rearrange saturated add folds; NFC adds a110ea57e3b [ArgumentPromotion] Add a lit.local.cfg to disable X86 spec [...] adds d544d0c5855 Fix builds with llvm/runtimes/compiler-rt after r354365 adds ab2da69ff13 second test on git-llvm-push adds 52e3fe6bcda [libFuzzer] docs: add a FAQ entry about dlclose adds 92e8ea88cd3 [InstCombine] reduce even more unsigned saturated add with [...] adds ffd798c75cd [LangRef] add to description of alloca instruction adds 315dff0404a [X86] Mark FP32_TO_INT16_IN_MEM/FP32_TO_INT32_IN_MEM/FP32_T [...] adds fa82617e417 [WebAssembly] Update MC for bulk memory adds 06157535f43 [Test] Autogenerate existing tests before adding more adds af5e339c6b3 [GVN] Fix a crash bug around non-integral pointers adds 7dee0ff0e5e [GVN] Fix a non-integral pointer bug w/vector types adds 3eb92b56d66 [GVN] Fix a crash bug w/non-integral pointers and memtransfers adds 7db184f31ec [InstSimplify] add vector tests for fcmp+fabs; NFC adds 4408ff5e00b [InstSimplify] use any-zero matcher for fcmp folds adds a42abce2256 [GVN] Fix last crasher w/non-integral pointers adds 81e598fa8a3 Revert "[InstSimplify] use any-zero matcher for fcmp folds" adds bcf1836a443 [BPF] make test case reloc-btf.ll tolerable for old compilers adds 5b8739fec64 [lld-link] preserve @llvm.used symbols in LTO adds a2bba1eb1e6 gn build: Merge r354365 adds eb07f6b63ca [GVN] Small tweaks to comments, style, and missed vector handling adds 760f1dae386 gn build: Merge r354365 more adds 76db3f47cc4 [WebAssembly] Fixed disassembler not knowing about OPERAND_EVENT adds 7112182b13d CMake: Fix stand-alone clang builds since r353268 adds 04189955b50 [WebAssembly] Fix load/store name detection for atomic inst [...] adds 13d54bc642f [InstCombine] regenerate test checks; NFC adds cd5266d548b [WebAssembly] Refactor atomic operation definitions (NFC) adds fd5a6ee2b6f [WebAssembly] Generalize section ordering constraints adds 7be6d48a758 [PowerPC] exploit P9 instruction maddld. Differential Revis [...] adds f3778debe66 [Dominators] Delete UpdateLevelsAfterInsertion in edge inse [...] adds 9c6fe66c587 [RISCV] Implement pseudo instructions for load/store from a [...] adds 796e6423ba1 [Dominators] Simplify and optimize path compression used in [...] adds 46f8c8ccf19 Temporarily Revert "[X86][SLP] Enable SLP vectorization for [...] adds 721cba861a5 [X86] Remove FeatureSlowIncDec from Sandy Bridge and later [...] adds c506c7f7aad [DTU] Refine the document of mutation APIs [NFC] (PR40528) adds c67948988f4 [NFC] add/modify wrapper function for findRegisterDefOperand(). adds 3e6388c561e [RegAllocGreedy] Take last chance recoloring into account i [...] adds a41ebf8db9d [llvm-exegesis] Opcode stabilization / reclusterization (PR40715) adds 7970a1f6be6 [Codegen] Remove dead flags on Physical Defs in machine cse adds 51ab92cb99e [SLPVectorizer][X86] Add add/sub/mul overflow tests adds f7f662eb990 [MIPS MSA] Add test for vector shift combines adds 6d2316158f5 [MIPS MSA] Avoid some DAG combines for vector shifts adds 2ff622e6f1b [yaml2obj] - Simplify implementation. NFCI. adds a2ecb2a90f8 [yaml2elf] - Rename a variable. NFC. adds df5eac31e91 [InstSimplify] use any-zero matcher for fcmp folds adds 6538c025564 Fix the build with gcc/libstdc++ 4.8.2 after r354441 adds a03cc695e73 [MCA][ResourceManager] Add a table that maps processor reso [...] adds 45dfd1ce86a Speculative buildfix for Mac adds cc9eda48b86 [Hexagon] Split vector pairs for ISD::SIGN_EXTEND and ISD:: [...] adds 6ef5a154036 [obj2yaml][yaml2obj]Locate all .yaml and .test tests adds 9d24991253b [CGP][x86] add tests for usubo special-case; NFC adds 1da2d4699dd Re-land the refactoring part of r354244 "[DAGCombiner] Elim [...] adds 7e1a65dad5a GlobalISel: Implement moreElementsVector for g_insert results adds 1b59f4c3806 GlobalISel: Fix fewerElementsVector for ctlz with different [...] adds c5a9fd42692 [llvm-readelf]Test a couple of corner-cases for --section-mapping adds c8eeeb6fc0b [X86][SSE] combineX86ShufflesRecursively - begin generalizi [...] adds 68782b8c5a3 [MCA][Scheduler] Collect resource pressure and memory depen [...] adds e8f99139bba Add partial implementation of std::to_address() as llvm::to [...] adds 4da600182d0 [MCA][Scheduler] Correctly initialize field NumDispatchedTo [...] adds 4a2d4c6d6cd Fixing NDEBUG typo in include/llvm/Support/raw_ostream.h adds 55fee71f49f AArch64/test: Add check for function name to machine-outlin [...] adds 350bc2910b0 [X86] Add test case to show missed opportunity to remove an [...] adds 9bba64895e8 Revert r354498 "[X86] Add test case to show missed opportun [...] adds 0d757236edb [X86] Add test case to show missed opportunity to remove an [...] adds 729e7fd2887 Add test case. adds 6f64f1bafe2 [clangd] Store index in '.clangd/index' instead of '.clangd-index' adds aa2513371d6 Fix testcase. adds eb773d9b315 Add support for pointer types in patterns adds b5e360f0fbb [X86] Add more load folding patterns for blend instructions [...] adds 87814624959 [SDAG] Support vector UMULO/SMULO adds febe1abd953 [SelectionDAG] Teach GetDemandedBits to look at the known z [...] adds 21d7b5a1d61 AMDGPU/GlobalISel: Move SMRD selection logic to TableGen adds 30f0c1109c0 [DAGCombine] Generalize Dead Store to overlapping stores. adds 1f63d705ea4 [CGP] match a special-case of unsigned subtract overflow adds 1f08b282ae1 [X86] Add test cases to show missed opportunities to remove [...] adds e890ea0ea24 [AArch64][GlobalISel] Implement partial support for G_SHUFF [...] adds 6b17ef5b05a [WebAssembly] Don't error on conflicting uses of prototype- [...] adds e72a9e9b208 [CMake][runtimes] Set clang-header dependency for builtins adds 27dce219091 [GlobalISel] Add -O0 to some tests to see if it fixes them. [...] adds 01852d91f65 Revert "[AArch64][GlobalISel] Implement partial support for [...] adds 87939260429 [libFuzzer] document -fork=N adds f2cd363b4b9 [libFuzzer] fix the docs adds 063afa58709 Add skipFunction to PostRA machine sinking pass. adds 818f20e3daf [Inliner] Pass nullptr for the ORE param of getInlineCost i [...] adds 37bcd272bb7 [AMDGPU] fix commuted case of sub combine adds 29c4aae301b [WebAssembly] Default to something reasonable in WebAssembl [...] adds 98a9c14860a [LoopSimplifyCFG] Add missing MSSA edge deletion adds 2fd5ae5ba06 Fix some include order and file headers issues. NFC adds 9600cecdd0f Fix file header issues in fuzzers. NFC adds 1d647e5d602 [DebugInfo] Prep llvm-dwarfdump for typed DW5 ops. adds c78c8e252f1 [ARM] Negative constants mishandled in ARM CGP adds efeeb5b637a [TEST] Add failing test that shows problems with MSSA updat [...] adds a9a1ce52375 [NFC] Replace EOL in test file adds ba9b4e186aa [ObjectYAML] Support SHT_MIPS_DWARF section type flag adds e58c1e6d7f0 [ARM] Add some missing thumb1 opcodes to enable peephole op [...] adds 1ccbb08e460 [AArch64] Print instruction before atomic semantic annotations adds bf5066713ac [yaml2obj]Allow symbol Index field to take values lower tha [...] adds 546ecb4f657 [llvm-readobj]Test basic command-line handling adds 8abd7ab3bb3 Revert 354564: [ARM] Add some missing thumb1 opcodes to ena [...] adds fb3ba6686f4 [llvm-readobj] Change "SHT_MIPS_DWARF" to "MIPS_DWARF" adds 5db978e66f9 [yaml2obj][obj2yaml] - Support SHT_GNU_verdef (.gnu.version [...] adds 011c90c0e4e [X86][SSE] combineX86ShufflesRecursively - moved to generic [...] adds 1730d3775cf [InferAddressSpaces] Fix crash on select of non-ptr operands adds 75980a4cd5d [llvm-readobj]Add testing for ELF symbol and section table [...] adds 1fe90de4614 Re-land part of r354244 "[DAGCombiner] Eliminate dead store [...] adds 063c3128bcc [ARM GlobalISel] Support G_FRAME_INDEX for Thumb2 adds 94a41692b42 [InferAddressSpaces] Fix fallthrough error adds a486973c72c [RISCV] Add implied zero offset load/store alias patterns adds 3256ab6c207 [RISCV][NFC] IsEligibleForTailCallOptimization -> isEligibl [...] adds e403fe6abec [llvm-readobj] Weaken a check in the test added by r354567 adds 4c14549b42d AMDGPU/GlobalISel: Fix bit count ops for non-power-of-2 types adds c08de5fe639 [X86] Fix copy-paste error in @ccz flag. adds 82b334b7fdf [x86] regenerate checks; NFC adds 8adde36d0a2 Fix missing C++ mode comments adds ca533da4d61 RegBankSelect: Allow targets to introduce control flow for mapping adds f237196b1b4 AMDGPU/GlobalISel: Make phis legal adds 13419c122c8 [DAGCombiner] prevent infinite looping by truncating 'and' [...] adds 30d1d86e1de [PPC] Add store merging testcase. adds 1ef2f4ce532 [llvm-objcopy] Make removeSectionReferences batched adds ede8818b21c [Kaleidoscope] Fix symbol resolver to search in reverse order. adds 285da41e220 [WebAssembly] Don't create MSSymbolWasm object for non-symbols adds 794244932b1 [llvm-objcopy][NFC] More error cleanup adds 7f352a421ab [llvm-objcopy][NFC] Add std::move() to fix older BB adds e866500e38b [AMDGPU] remove unused AssemblerPredicates adds a989976cd89 [Hexagon] Use misaligned load instead of trap0(#0) for __bu [...] adds 0c4bd3fae82 Revert r354606, it breaks asan tests adds e94607188b8 [Hexagon] Use misaligned load instead of trap0(#0) for __bu [...] adds 924e7815a54 [EarlyCSE] Cleanup deadcode. [NFCI] adds eacfb8541a4 [LoopSimplifyCFG] Update MemorySSA after r353911. adds cc4adc5b1a5 [llvm] Fix typo: 's/ ot / to /' [NFC] adds af4da1f4091 Re-land "[AArch64][GlobalISel] Implement partial support fo [...] adds 90719497bc5 [gn] Add target flags to asmflags. adds 515d342a88b [x86] vectorize more cast ops in lowering to avoid register [...] adds cff23398f9b AMDGPU/NFC: Cleanup subtarget predicates adds a653fee83b1 [MemorySSA & LoopPassManager] Update MemorySSA in formDedic [...] adds a6ed7180331 [hwasan,asan] Intercept vfork. adds 7a1fe3a9c77 [X86] Remove hasSideEffects=1 from the X87 pseudos with fol [...] adds a58cbb23de9 Revert "[asan] Fix vfork handling.", +1 adds 7672c2d7d53 [Kaleidoscope] Re-enable Kaleidoscope tests. adds 0410b9ebccb AMDGPU: Remove debugger related subtarget features adds 29ba0a84bac [gn] Add LLVM_BUILD_EXAMPLES. adds 23e580ff125 [X86] Fix some copy/paste mistakes that caused a VR128 to b [...] adds 1ed2209f6e0 Disable Kaleidoscope tests on Win32 -- looks like they're s [...] adds 611058ce019 Add 'Windows' to the disabled platforms list for the Kaleid [...] adds 696f3bcb586 [LegalizeTypes] When promoting the result of EXTRACT_SUBVEC [...] adds c12778d0141 [X86] Add a DAG combine for (aext_vector_inreg (aext_vector [...] adds 90d12ee005e DAG: Add helper for creating shifts with correct type adds c399c85e709 Fix a think-o in the disable-kaleidoscope-tests-on-windows [...] adds e9b2f29faf4 [DTU] Deprecate insertEdge*/deleteEdge* adds a58877806a9 [X86] Add test cases to cover the path in VectorLegalizer:: [...] adds bc57cccf29e [LegalizeVectorOps] Simplify the non-byte sized load handli [...] adds 1622e8f7490 [LegalizeVectorOps] Improve the placement of ANDs in the Ex [...] adds d96108c682e [MemorySSA & LoopPassManager] Resolve PR40038. adds 5a3e5b91edc [WebAssembly] Remove getBottom function from CFGStackify (NFC) adds cd69a7dff88 [MemorySSA] Update test with minimized one. NFCI adds 36dd3d39360 [obj2yaml] - Do not miss section index for special symbols. adds 47f8c8ba921 Fix BB after r354661 adds 1d53cf7ef33 [ARM GlobalISel] Support floating point for Thumb2 adds 81d4da9bf0d [ARM] Add some missing thumb1 opcodes to enable peephole op [...] adds 0ac04b4ce62 [DTU] Refine the interface and logic of applyUpdates adds 5157eeb1c10 [LowerSwitch][AMDGPU] Do not handle impossible values adds 73763b4d354 [mips][micromips] fix filling delay slots for PseudoIndirec [...] adds d8cf28956fb BreakCriticalEdges: Update PostDominatorTree adds bddcf9f3b6e [x86] simplify code in combineExtractSubvector; NFC adds 8ed2d5e3799 [x86] allow narrowing of vector UINT_TO_FP adds 4eee65a5d35 [DAGCombine] Fold overlapping constant stores adds 4741b755fcf Disable big-endian constant store merges from rL354676. adds e469ef7495a [MBP] Factor out function hasViableTopFallthrough and enhancement adds 1b1b3906cff [GN] Updated build file to allow GN builds to succeed at ToT. adds f3fd6e23a11 [WebAssembly] Remove debug statement submitted in rL354657 adds fa8a50ce70e LiveIntervals: Add removeAllRegUnitsForPhysReg adds e6effacc17d AMDGPU: Use removeAllRegUnitsForPhysReg adds 664a45f97ed CodeGen: Make RegAllocRegistry a template class adds 47564d428ee MIR: Preserve incoming frame index numbers adds dc14d72264e [CGP] move overflow intrinsic insertion to common location; NFCI adds d57d5e8d9c7 Restore ability for C++ API users to Enable IPRA. adds 3ebbebd666d [CMake] Honor LLVM_EXTERNAL_<proj>_SOURCE_DIR adds 26b697c4fe8 [WebAssembly] MC: Handle aliases of aliases adds da1eaa62413 [WebAssembly] Remove unneeded MCSymbolRefExpr variants adds 54963e6ab56 [CGP] add tests for uaddo increment/decrement; NFC adds 7ca17bd5104 Revert "AMDGPU/NFC: Cleanup subtarget predicates" adds 2ca79fdeeec [WebAssembly] Update CodeGen test expectations after rL354697. NFC adds 483b6a88f82 [X86] Add a few test cases for a v8i64 sext/zext from an il [...] adds 4c3f72beaa9 [X86] Enable custom splitting of v8i64/v16i32 sext/zext for [...] adds d51db1a7227 [LegalizeTypes] Use PromoteTargetBoolean in PromoteIntOp_AD [...] adds bfc9e713263 Fix memory leak in r354692 adds ed8b13a0b8c Revert r354363 & co "[X86][SSE] Generalize X86ISD::BLENDI s [...] adds 19a56211e13 [NFC] Fix typos: preceeding -> preceding adds 3e4774ebc0b Try again to fix memory leak in r354692 adds a56275251b7 objdump fails to parse Mach-O binaries with n_desc bearing stabs adds 802f8d0f4f8 [X86] Sign extend the 8-bit immediate when commuting blend [...] adds 713bb48902d [MIPS] Fix a incorrect test. (NFC) adds 6f1a63bcdf5 [X86][AVX] Shuffle->Permute+Blend if we have one v4f64/v4i6 [...] adds 3aea930791e [X86][AVX] concat_vectors(scalar_to_vector(x),scalar_to_vec [...] adds 00b2ae441b6 Fix MSVC constant truncation warnings. NFCI. adds 44ab792c47e [X86][AVX] combineInsertSubvector - remove concat_vectors(l [...] adds e676ef9d0fd [WebAssembly] Fix select of and (PR40805) adds b53ed3cf81b Recommit r354647 and r354648 "[LegalizeTypes] When promotin [...] adds 53cf21eb9d9 Recommit r354363 "[X86][SSE] Generalize X86ISD::BLENDI supp [...] adds 9ed230bd09d [TwoAddressInstructionPass] After commuting an instruction [...] adds 66a4d5eb181 VFS: Avoid some unnecessary std::string copies adds 89625a62f21 [Hexagon, SystemZ] Be super conservative about atomics adds 3cf7a4b78a7 [WebAssembly] Merge two identical switch case routines into [...] adds 4136c365f04 [WebAssembly] Rename a variable in CFGStackify (NFC) adds 524310b8b56 Fix "enumeral and non-enumeral type in conditional expressi [...] adds 5478a36577c [CGP] add special-cases to form unsigned add with overflow [...] adds 11ddd3760d5 [InstCombine] regenerate checks; NFC adds aaaa56c4e7a [InstCombine] canonicalize add/sub with bool adds b7fa704d730 [X86][AVX] Rename lowerShuffleByMerging128BitLanes to lower [...] adds 260be88da27 [InstCombine] add test for icmp+add fold; NFC adds b3fc281e555 [LegalizeTypes][AArch64][X86] Make type legalization of vec [...] adds 17e406a7e11 [X86] Correct some ADC/SBB with immediate scheduler data fo [...] adds 75aa1cd75bb [X86][SSE] Use pblendw for v4i32/v2i64 during isel. adds 638ee4f4fc9 [X86] Fix tls variable lowering issue with large code model adds beec1204cee [X86] Combine zext(packus(x),packus(y)) -> concat(x,y) (PR39637) adds a7577559c49 [X86] Add PR40483 test cases adds 29d59d0a036 [InstCombine] Move with.overflow tests to separate file; NFC adds 7c9a366492f [InstCombine] Add tests for PR40846; NFC adds 7cb6f240317 [PowerPC] [PowerPC] Enhance the fast selection of fptoi & f [...] adds 82bff05bd60 [SelectionDAG] Add a OPC_CheckChild2CondCode to SelectionDA [...] adds 975c87172ac [XRay][tools] Revert "Use Support/JSON.h in llvm-xray convert" adds 5e1169bafb3 [llvm-exegesis] Split Epsilon param into two (PR40787) adds 0f4e225b812 [ARM] Make fullfp16 instructions not conditionalisable. adds 3fa93397069 [yaml2obj]Re-allow dynamic sections to have raw content adds fe80c4ec879 [X86] Merge ISD::ADD/SUB nodes into X86ISD::ADD/SUB equival [...] adds 717b89980a4 [TTI] Add generic cost model for fixed point smul/umul adds bbc02a9015c Test commit (remove a blank space) adds 0f14f01b2e8 Fixed typos in tests: s/CEHCK/CHECK/ adds 472d362ffc4 [llvm-objdump] Add `Version References` dumper adds de8628ec6b5 [SLPVectorizer][X86] Add fixed smul/umul tests adds 696daedea35 [TTI] Add generic cost model for smul/umul overflow intrinsics adds 6be226648fd Fixed typos in tests: s/CHEKC/CHECK/ adds b5395dc0fc8 [llvm-objcopy] Add --add-symbol adds a61848693cb [AArch64] Add support for Cortex-A76 and Cortex-A76AE adds 563ff5441e1 [Vectorizer] Add vectorization support for fixed smul/umul [...] adds 78f7736cbd3 [ARM] Add some more missing T1 opcodes for the peephole optimisier adds 4bda5af37c7 [DAGCombine] Add undef shuffle elt support to partitionShuf [...] adds 13703d57e90 [SelectionDAG] Add demanded elts variants to isConstOrConst [...] adds 82029753c11 [Lanai] Be super conservative about atomics adds d423c0fe772 [AArch64][GlobalISel] Refactor selectBuildVector to use Mac [...] adds ecd4bf3b88e [Mips] Fix missing masking in fast-isel of br (PR40325) adds 0ddb4123306 AMDGPU: Correct definitions for bitset instructions adds 87679118731 Fix a sign compare warning breaking the -Werror build. adds 9cfe2330be3 [X86] Improve detection of unneeded shift amount masking to [...] adds 8b22d53aad4 GlobalISel: Make legalizer/regbankselect clear NoPHIs property adds f25266101e3 AMDGPU: Remove IntrReadMem from memtime/memrealtime intrinsics adds 5b73c52a7ed RegisterScavenger: Allow fail without spill adds da91f4c26ac AMDGPU/GlobalISel: Clamp max implicit_def elements adds 56011906fbe [Support] Make raw_string_ostream unbuffered adds e5a2b43b652 [LangRef] *.overflow intrinsics now support vectors adds 91054a2604d Revert "[Support] Make raw_string_ostream unbuffered" adds 453c7ee1c9c AMDGPU/GlobalISel: Fix bit ops for non-power-of-2 sizes adds 0ceeb164224 RegBankSelect: Handle slightly more complex value mappings adds c677f945b9a [AMDGPU] Added target to mir test. NFC. adds b34b0bf0472 Improve "llvm-nm -f sysv" output for Elf files adds 36a88f9e099 [X86] Fix bug in x86_intrcc with arg copy elision adds 4ae0bf7852e [llvm-cov] Fix llvm-cov on Windows and un-XFAIL test adds 5748e50b3ea [CodeView] Emit HasConstructorOrDestructor class option for [...] adds 16142a36122 [WebAssembly] Improve readability of EH tests adds 330395ea4fc [WebAssembly] Fix a bug deleting instruction in a ranged for loop adds 99adff5b55e [ARM] Be super conservative about atomics adds 6ad42d1fab4 [WebAssembly] Properly align fp128 arguments in outgoing va [...] adds fea6c6a8e48 [NFC] Add to contributor list. adds 728bc80a2e4 Revert "Improve "llvm-nm -f sysv" output for Elf files" adds 6656fc5a789 [ThinLTO] Use defined node and edge order when dumping DOT file adds 1f205834bb9 [llvm-objcopy] Add --set-start, --change-start and --adjust-start adds 7c5ba998fca [llvm-exegesis] Teach llvm-exegesis to handle instructions [...] adds cbe9dfdbe8c [AMDGPU] Regenerate bswap/bitreverse tests. adds 51498fab1ef [LegalizeDAG] Expand SADDO/SSUBO using SADDSAT/SSUBSAT (PR37763) adds fdecb3ea4f4 [LegalizeDAG] Use APInt::getSplat helper to create bitrever [...] adds cac3880ab0c [ARM] Add Cortex-M35P adds 5f8f5b4d3ab [AArch64] Add 'free' zext bswap tests. adds b7fb794e266 [llvm-objdump] Implement -Mreg-names-raw/-std options. adds 1a972fc4f9b [llvm-objdump] Add `Version Definitions` dumper adds 3b4b967bc12 [AArch64] Add arithmetic zext bswap tests. adds f1e9dcbaed7 [yaml2obj][obj2yaml] - Add support for the architecture spe [...] adds ced11317f04 [MCA] Always check if scheduler resources are unavailable w [...] adds 8ef712d2b0b [InstCombine] add more tests for saturated add; NFC adds 501f8883f4c [mips] Emit `.module softfloat` directive adds 1f844702f18 [DAG] Fix constant store folding to handle non-byte sizes. adds 9e04c140f5c [InstCombine] add more tests for saturated add; NFC adds de27ddbd55f [InstCombine] canonicalize more unsigned saturated add with 'not' adds df09ef993aa [InstCombine] remove duplicate (but not updated) tests; NFC adds 0d20d79a027 [InstSimplify] add tests for rotate; NFC adds 78b72added2 [SystemZ] Wait with selection of legal vector/FP constants [...] adds 81c0a8a142d [X86] AMD znver2 enablement adds 7e18e3836ec [MIPS GlobalISel] Select G_UADDO adds d04ee38acdc [InstSimplify] remove zero-shift-guard fold for general fun [...] adds cb49cb3c926 [TableGen] Make OpcodeMappings sort comparator deterministic NFCI adds f7d033a9b90 Update docs of memcpy/move/set wrt. align and len adds 0ffe848c65e [lit] Allow setting parallelism groups to None adds f512ffbc7e8 [X86] Use X86_CPU_SUBTYPE_COMPAT for 'cascadelake' cpu. adds 02e42d437e0 [MemorySSA & SimpleLoopUnswitch] Update MemorySSA in Replac [...] adds 18ad7ec3029 [X86] Fix bug in vectorcall calling convention adds bf9624d0935 Fix a small comment typo. adds 1a46c551c7e [AMDGPU] Fixed hang during DAG combine adds a764eb906a0 [PGO] Context sensitive PGO (part 1) adds 3b8055a11c4 [HotColdSplit] Disable splitting for sanitized functions adds ea0d23504f4 vim: `swiftself` is an attribute adds 96e27952a5f [SystemZ] Pass regalloc hints to help Load-and-Test transf [...] adds 6596fa33d78 [WebAssembly] Remove unnecessary instructions after TRY mar [...] adds 61875479685 [DWARFFormValue] Cleanup DWARFFormValue interface. (NFC) adds a0aea0e006a [WebAssembly] Fix ScopeTops info in CFGStackify for EH pads adds 27658567ea8 Support: enable backtraces on Windows adds d97a419cbe0 Revert "[PGO] Context sensitive PGO (part 1)" adds c0db6b6bd44 [BPF] Don't fail for static variables adds 4c1861d5b11 [llvm-readobj] Print DF_1_DISPRELPND adds da6598a60c7 Fix Wenum-compare gcc7 warning. NFCI. adds d4177fd7961 [llvm-readobj]Fix error messages for bad archive members an [...] adds 03864785358 [X86][AVX] Only combine loads to broadcasts for legal types adds ea5f709d737 [llvm-objcopy] - Check for invalidated relocations when rem [...] adds ea85a46c1e2 [AMDGPU][MC][GFX8+] Added syntactic sugar for 'vgpr index' [...] adds a15cff122c4 [DebugInfo] add SectionedAddress to DebugInfo interfaces. adds c8b052a5c3e [AMDGPU][MC] Added register size check for VOP3/SDWA/DPP operands adds 39c9db16147 [DebugInfo] Apply subprogram attributes on behalf of owner CU adds d96fb8c92e1 gn build: Merge r354692 adds 3a5ea4d507a gn build: Merge r354989 adds 85a00932116 [InstCombine] regenerate complete checks; NFC adds 9b19e58007c [InstCombine] Add additional add.sat overflow tests; NFC adds d6de5789d90 [llvm-cxxfilt] Split and demangle stdin input on certain no [...] adds ddb967d7a38 [llvm-objdump] Should print strings when dumping DT_RPATH, [...] adds a3f5d865fbf [llvm-readobj]Add additional testing for various ELF features adds 09ad125e8c0 Recommit r354930 "[PGO] Context sensitive PGO (part 1)" adds 44f0bedfc25 Clean up the delimiters test. adds 61d08231df9 [llvm-cxxfilt] Re-enable the delimiters test on Windows. adds 9304425914a Attempt to fix buildbot after r354972 [#1]. NFCI. adds ce64e29e1fb [llvm-readobj] Print section type values for unknown sections. adds f41945dfb9d [X86][AVX] Pull out some INSERT_SUBVECTOR combines into a c [...] adds f499c3547b5 [InstCombine] add tests for add+ext+add; NFC adds fc9652141e6 Revert "[llvm-cxxfilt] Split and demangle stdin input on ce [...] adds 0e0eb3061a7 Fixed ubsan failures in r355005. adds 9faff7e6c7b Seperate volatility and atomicity/ordering in SelectionDAG adds 2eaed221928 [hwasan, asan] Intercept vfork. adds 6a5e7eb4f38 [llvm-cxxfilt] Re-enable split and demangle stdin input on [...] adds f13cc1e220f Fixup compilation/test failures after r354960 and r355013. adds 83855d225bb Default to Secure PLT on PPC for NetBSD and OpenBSD. This m [...] adds a1d5c6d1e85 [MemorySSA] Make insertDef insert corresponding phi nodes. adds b057538fe52 [InstrProf] Use separate comdat group for data and counters adds 0d2ad48b331 GlobalISel: Implement moreElementsVector for phi adds 2d429b10917 GlobalISel: Implement fewerElementsVector for phi adds 8460fe06bb4 AMDGPU: Fix crashes in invalid call cases adds 35388153b0b [AArch64] Generate FP16 vector compare instructions. https: [...] adds df3568d8a93 AMDGPU: Enable function calls by default adds 42e25a8fd03 AMDGPU: Fix typo adds 62a80b42c15 AMDGPU/GlobalISel: Add regbankselect test for phis adds 9a0d3f04969 [X86] Use X86::LAST_VALID_COND instead of assuming X86::CON [...] adds 2d97abd893a Temporarily revert "ArgumentPromotion should copy all metad [...] adds 0a24ac1326d [Memory] Add basic support for large/huge memory pages adds 820af239361 Fix non-Windows platforms build break introduced by r355065 [...] adds 79606882d3d Fix SupportTests.exe/AllocationTests/MappedMemoryTest.Alloc [...] adds 6392e9b4930 Fix IR/Analysis layering issue with OptBisect adds 3abfa544a0d [SelectionDAG] Strengthen assertions about usage of AtomicSDNodes adds cc5e3d53625 [Dominators] Avoid potentially quadratic std::is_permutation adds 04bfc05d5a5 [X86] Use PreprocessISelDAG to convert vector sra/srl/shl t [...] adds 72316b718a1 [ValueTracking] More accurate unsigned add overflow detection adds f14213bb4cd [llvm-readobj] - Fix the invalid dumping of the dynamic sec [...] adds 32f6332ef1a [llvm-objdump] - Improve the error message for "removing a [...] adds c8a454ac138 [ARM GlobalISel] Support global variables for Thumb2 adds e6ae1b85043 [X86][AVX] Fold vf64 concat_vectors(movddup(x),movddup(x)) [...] adds 3a79f0dbdd2 Fixed a typo in the test s/CEHCK/CHECK/ adds ce3f788c40c Fixed typos in a test: s/CEHCK/CHECK/ adds 6ca659aaa45 [ARM GlobalISel] Make arm_i32imm an IntImmLeaf adds dac99072241 [X86][AVX] Remove superfluous insert_subvector(zero, bitcas [...] adds acfc6c6aa14 [PowerPC] Move the stack pointer update instruction later i [...] adds 3b509019476 [PowerPC] Removed STATISTIC that was causing build errors. adds 85de1fd399e Add support for computing "zext of value" in KnownBits. NFCI adds 0ad049beeaf [Target][ARM] Add a usage for SrcSz to unbreak build-bots w [...] adds 29724e21570 [AArch64][GlobalISel] Add support for 64 bit vector shuffle [...] adds 86ddb2a386a Make MergeBlockIntoPredecessor conformant to the preconditi [...] adds f28061c3a72 llvm-config: Include -stdlib= in --cxxflags adds 29ba81ded06 [ValueTracking] More accurate unsigned sub overflow detection adds 360eb902d85 [Tests] Strengthen LICM test corpus to show alignment striping adds 21f76dad359 [Tests] Strengthen LICM test corpus to show alignment strip [...] adds f71ec6c9f14 [WebAssembly] Remove uses of ThreadModel adds abce0e8bf5a [dsymutil] Use rfind for paths with parentheses adds 56fdaf46b13 Revert "[AArch64][GlobalISel] Add support for 64 bit vector [...] adds 2b3f738fdef [X86] Don't peek through bitcasts before checking ISD::isBu [...] adds b115a9984d8 [X86] Add test case that was supposed to go with r355116. adds 26fe4b69c75 [InstCombine] fold adds of constants separated by sext/zext adds d6bec11b3bf Add Support for Creating and Deleting Unicode Files and Dir [...] adds d339d92e822 bpf: improve dead Defs check for XADD adds b17832255a6 bpf: enable sub-register code-gen for XADD adds 4c30f56d433 bpf: disassembler support for XADD under sub-register mode adds 014b2ad7192 [x86] scalarize extract element 0 of FP math adds 5af7fe31f4c [PGO] Context sensitive PGO (part 2) adds 0e8eb4baf2e Add a module pass for order file instrumentation adds ff6d00c043a [AArch64] Improve FP16 vector convert from short instructio [...] adds 41382323263 [AArch64] [Windows] Fix llvm-readobj -unwind output with ma [...] adds 66161202dd3 [AArch64] [Windows] Don't skip constructing UnwindHelp. adds ad641fc5391 Trying to fix bot breakage due to symbols not defined for WINDOWS! adds caee6a9349b gn build: Merge r355024 adds b4625c078bf gn build: Merge r355035 adds b930800aec0 gn build: Merge r355133. adds 8806e3ae9eb dsymutil support for DW_OP_convert adds 9ddb1edf089 Update testcase since llvm-dwarfdump got more accurate in r355148. adds 35823ce58da llvm-readobj: Try the DWARF CFI dumper on all machines. adds f9dc50f1b1d [sancov] Instrument reachable blocks that end in unreachable adds d1c4e8542dc [PPC] Secure PLT only has meaning for PIC adds 568bf88e60c AMDGPU/GlobalISel: Implement select for G_EXTRACT adds f8000577968 [WebAssembly] Fix crash when @llvm.global_dtors is external adds 44c4c1d5257 AMDGPU/GlobalISel: Implement select for G_INSERT adds 759fd6ca165 [WebAssembly] Lower SIMD shifts since they are fixed in V8 adds 78b4cefc3c1 [Subtarget] Remove static global constructor call from the [...] adds b1f04183c4b [ConstantHoisting] Call cleanup() in ConstantHoistingPass:: [...] adds 778b40dc9a6 [MIPS GlobalISel] Select G_UMULH adds d366a104c4c [MIPS GlobalISel] Fix mul operands adds ee6155481ce [AMDGPU] Mark ds instructions as meybeAtomic adds b4ec9009a62 [llvm-readobj]Add test showing behaviour of thin archive me [...] adds 54df8c81aed [CommandLine] Do not crash if an option has both ValueRequi [...] adds b58513a2a09 [CommandLine] Allow grouping options which can have values. adds 03fc54c863e [ARM] Add armv8a triple to test check updaters adds 0f2d1f2cdc9 [Tablegen] Add support for the !mul operator. adds 6535445674d [ARM GlobalISel] Check target flags in test. NFCI adds de23a6b25f3 [ARM GlobalISel] Support G_CTLZ for Thumb2 adds e11e90af45c Attempt to fix buildbot after r354972 [#2]. NFCI. adds 5f896ac2501 [yaml2obj] - Allow setting custom sh_info for RawContentSec [...] adds 30fbca3fc5b [Thumb] Add some integer abs testcases for different typesizes. adds 46036c4d665 [X86] Regenerate legalize test files adds c064077099d [ARM] Consider undefined-on-NaN conditions in checkVSELConstraints adds ed849dca81f [ARM] Fix FP16 stack loads/stores for Thumb2 with frame pointer adds 5b3d8087486 Try to fix NetBSD buildbot breakage introduced in D57463. adds 8db4d536518 Hide two unused debugging methods, NFCI. adds 99488670207 [InstCombine] add tests for add+umin/umax canonicalization; NFC adds 56d9da61e3c [llvm-readobj] Display section names for STT_SECTION symbols. adds eb716ca2564 Revert "[WebAssembly] Lower SIMD shifts since they are fixe [...] adds e7dd324dafa [InstCombine] Extend "idempotent" atomicrmw optimizations t [...] adds f87f27eb320 [Tests] Add tests for missed optimizations of saturating an [...] adds 739424ab28b [Tests] More missing atomicrmw combines adds 7cc20e135ea [PGO] Remove the default parameter in ProfileSummary API. NFC adds d68ef42919a [LICM] Infer proper alignment from loads during scalar promotion adds 9c71bc48ce8 ELF: Change FileSize back to a uint64_t. adds 31ec6de6cab Revert "[MIPS GlobalISel] Fix mul operands" adds f7e20d25ea3 [InstCombine] add tests for umin/umax narrowing (PR14613); NFC adds 77366ccba37 [InstCombine] move add after umin/umax adds 20c42ab3c6c [InstCombine] Extend saturating idempotent atomicrmw transf [...] adds 141f3969d78 [ValueTracking] Known bits support for unsigned saturating add/sub adds a3fccdcc5d4 [TableGen][SelectionDAG][X86] Add specific isel matchers fo [...] adds f3284d86007 [DWARF] Make -g with empty assembler source work better. adds 80a70bb5a93 [X86] Add test case for D58805. NFC adds ae62c5926e0 [X86] Remove IntrArgMemOnly from target specific gather/sca [...] adds ca58bd27df5 [DWARFFormValue] Cleanup DWARFFormValue interface. (2/2) (NFC) adds 8ee60b0a80e Try to fix Windows bots after r355226. adds 4cdcb8055d2 llvm-dwarfdump: Add new variable, parameter and inlining st [...] adds 98d16d99132 [tblgen] Track CodeInit origins when possible adds 4a483e2e544 [llvm] Fix typo: 's/analsyis/analysis/' [NFC] adds 141f394c31e [WebAssembly][WIP] Expand operations not supported by SIMD adds 94777b9b9d1 [ProfileData] Sort FuncData before iteration to remove non- [...] adds 0afea149b60 Revert "[WebAssembly][WIP] Expand operations not supported [...] adds a5110cb3358 Revert "[DWARFFormValue] Cleanup DWARFFormValue interface. [...] adds d56d7c48aab [SCEV] Remove undef check for SCEVConstant (NFC) adds 76b7cba4c01 Add test case for truncate funnel shifts. NFC adds f370f2847c4 [SCEV] Handle case where MaxBECount is less precise than Ex [...] adds 04a0f332110 [X86] Improve use of SHLD/SHRD adds 341140cf856 [WebAssembly] Expand operations not supported by SIMD adds badb15e1da6 [llvm-objdump] Should print unknown d_tag in hex format adds b6c0a18fa76 [Codegen] fix typos in test case adds ca992cddc2d [Transforms] fix typo in test case. NFC. adds a53711984da Use SDValue::getConstantOperandAPInt helper where possible. NFCI. adds 610d2e424e5 Fix update_mir_test_checks.py to run on python3 adds 95473514151 Add test case for add to sub transformation. NFC adds 1f4f16a829d [InstCombine] add tests for add+smin/smax; NFC adds 20aaebbdebe [InstCombine] move add after smin/smax adds b32bb8a0f90 gn build: Add a cfi/sources target. adds 81458a6d244 Add test case for add to sub transformation. NFC adds 512e2181378 [X86] Prefer VPBLENDD for v2i64/v4i64 blends with AVX2. adds 264aa50f729 [llvm] [Support] Reimplement getMainExecutable() using sysc [...] adds 7d44079bb35 [DemandedBits] Optimize a find()+insert pattern with try_em [...] adds ccb8c9c48cf Remove large amount of empty lines mid-file. NFC adds 8c4116ba6f2 [X86] Pull out combineToConsecutiveLoads helper. NFCI. adds 1ab32adbf41 [X86] getShuffleScalarElt - peek through insert/extract sub [...] adds 0fd197a9f39 Remove unused variable. NFCI. adds 789112c2199 [DemandedBits] Remove some redundancy in the work list adds adb131dce5b Add extra ops in add to sub transform test in order to enfo [...] adds a8a5864cec5 [ValueTracking] do not try to peek through bitcasts in comp [...] adds 981f513ae37 [InstCombine] remove stale FIXME comment from test; NFC adds 58dbe6ba524 [X86] Regenerate test to get the full FP operands printed. NFC adds ba7414dc84a [WebAssembly] Delete ThrowUnwindDest map from WasmEHFuncInfo adds c302fe2d33c [SubtargetFeatuers] Simplify the code used to imply feature [...] adds f45a7a3b4f4 [SubtargetFeatures] Don't call ApplyFeatureFlag if the feat [...] adds 38ebbb2cf95 [SubtargetFeatures] Add operator< for comparing SubtargetIn [...] adds 5e23016546f [InstCombine] Mark debug values as unavailable after DCE. adds 0e75b5ea3c0 [llvm] [Support] Revert "Reimplement getMainExecutable() us [...] adds a5056754863 [DebugInfo] Construct nested types on behalf of owner CU adds dd6e8b981da [AArch64/ARM] Fix two compiler warnings in InstructionSelec [...] adds b649874e8d4 [ARM] Fix selection of VLDR.16 instruction with imm offset adds 273b7e422a6 [X86] Avoid codegen changes when DBG_VALUE appears between [...] adds 033c2939965 [MCA] Highlight kernel bottlenecks in the summary view. adds 0c1eb04a20d [MCA] Correctly initialize struct SummaryView::BackPressureInfo. adds 203bf432d6d [AMDGPU][MC] Enable lds_direct operand for v_readfirstlane_ [...] adds 910d0d47ac0 [MCA] Remove unused methods. NFC adds 3e08ec3144f Unbreak shared library linkage on DragonFlyBSD. adds e11ae4fd35c [X86] Regenerate illegal type load test with non-undef load [...] adds a83437e37e6 Revert duplicate check for DragonFly BSD adds 328c0335527 [WebAssembly] Add support for data sections in the assembler. adds b6ab93e6a5d [DAGCombiner][X86][SystemZ][AArch64] Combine some cases of [...] adds 1e15b24cc4f [MC] Teach ELFObjectWriter that parse-time variables do not [...] adds efbf288c6f8 Re-commit r355104: "[AArch64][GlobalISel] Add support for 6 [...] adds ff9cb76b997 [Subtarget] Follow up to r355167, add another set of curly [...] adds d889fd25dd6 [InstCombine] Add tests for add nsw + sadd.with.overflow; NFC adds 0d5bf69c9c2 [PGO] Context sensitive PGO (part 3) adds 080999b5bba [ConstantHoisting] avoid hang/crash from unreachable blocks [...] adds 3e50101023e Fix wrong enum value in switch. adds f3d5cf2f716 [GlobalISel][AArch64] Legalize vector G_SELECT adds 0c844eb84f5 [build] Rename clang-headers to clang-resource-headers adds 01d87547d65 [GlobalISel][AArch64] Add selection support for G_EXTRACT_V [...] adds b4cc6b6cce7 [CodeGenPrepare] avoid crashing on non-canonical/degenerate code adds 6005be2936a [NFC] Fix PGO link error in shared libs build adds 2b856d4d48d [msan] Instrument x86 BMI intrinsics. adds 9c41c0b5040 Fix invalid target triples in tests. (NFC) adds 935d140874b [cmake] Create exports for umbrella library targets adds 20d279e5b15 [BPF] Do not generate BTF sections unnecessarily adds 99522ce5594 [X86] Reduce some patterns by using FP instructions for int [...] adds b3779ef424a PHI nodes are not `FPMathOperator` s adds bb1734fdb46 [AMDGPU] Implement AMDGPUMCInstrAnalysis adds 8c328c6b515 [ARM][MC] Update one test case in 'test/MC/Disassembler/ARM [...] adds df3d6b9db84 [PowerPC] fix killed/dead flag after convert x-form to d-fo [...] adds 5042e2c0b45 [LangRef] Add 'callbr' instruction to the 'blockaddress' section. adds 624049efdce [AMDGPU] Omit KILL instructions from hazard recognizer adds 3a22eb400ff [ARM] Fix select_cc lowering for fp16 adds cf02f1a2ebb Add wildcard support to all update_*_test_checks.py scripts [...] adds 8aac5e99290 [WebAssembly] Rename a variable in LateEHPrepare (NFC) adds c3ee6993701 [SCEV] Add some extra tests for IndVarSimplifys loop exit v [...] adds de9aea95306 [llvm-objcopy] - Report "no zlib available" error properly [...] adds fba4a365e68 [SCEV] Ensure that isHighCostExpansion takes into account w [...] adds dfa41563195 [AMDGPU] Fix DPP operand order in atomic optimizer adds a855622c498 [llvm-objcopy] - Simplify `isCompressable` and fix the issu [...] adds a38100a64a0 [X86] Add test cases for D58874 adds 349f5f864aa [X86] Add SADDO/UADDO and SSUBO/USUBO combine tests adds b2b3e65c2db Fix typo in constant vector adds 7bb5d42fe3c [X86] Add SMULO/UMULO combine tests adds 3cd66813b06 Revert "[GlobalISel][AArch64] Add selection support for G_E [...] adds 33f09cfa49a [SDAG] move FP constant folding to helper function; NFC adds e46d0f6df47 [X86][SSE] Regenerate vector zero tests adds 60e3f9f86c7 TableGen: Allow lists to be concatenated through '#' adds dabf82a18f8 [SLP] Fix invalid triple in X86 tests adds b3da570deaa [X86] Enable 8-bit OR with disjoint bits to convert to LEA adds ebaba96d613 [X86] Allow 8-bit INC/DEC to be converted to LEA. adds db8da4672b8 [X86] Enable 8-bit SHL to convert to LEA adds 2d90299c795 AMDGPU: Preserve undef flag when expanding SI_IF adds cd52d11df4a [Subtarget] Move SubtargetFeatureKV/SubtargetInfoKV from Su [...] adds 8bc601fd43b [Subtarget] Create a separate SubtargetSubtargetKV struct f [...] adds 83df32c4f82 [X86] In X86DomainReassignment.cpp add enclosed registers t [...] adds 99a4c92625c [Subtarget] Merge ProcSched and ProcDesc arrays in MCSubtar [...] adds ac1eef55515 Revert r355224 "[TableGen][SelectionDAG][X86] Add specific [...] adds 5fe8b23a582 [NFC][CodeGen][X86][AArch64] Add tests for C++ std::midpoin [...] adds 5b3a6d5e256 [WebAssembly] Disable MachineBlockPlacement pass adds f43cce52638 [OptRemarks] Make OptRemarks more generic: rename OptRemark [...] adds f8d95d2d94c [Remarks][NFC] Rename RemarkParser to YAMLRemarkParser adds 097c1aa1121 [WebAssembly] Simplify iterator navigations (NFC) adds c0f01ed8259 [X86][NFC] Add proper test for promotion of i8 cmov's of trunc's adds b58c9836283 [AtomicExpand] Allow libcall expansion for non-zero address spaces adds 82f3d1cfab0 [opt] Report if the provided architecture is invalid. adds 4eb768f03d7 [DWARFFormValue] Don't consider DW_FORM_data4/8 to be secti [...] adds 3cd4111205a [ARM] Sink zext/sext operands for add and sub to enable vsu [...] adds eec5d41710c Revert "[AtomicExpand] Allow libcall expansion for non-zero [...] adds 40c6e736fda gn build: Add 32-bit Linux support. adds e4bca8dc710 [BinaryFormat] Add DT_USED tag into dynamic section. adds 7949c78c098 [WebAssembly] Remove trailing whitespaces in tests (NFC) adds 514353fe69b [X86] Remove periods from the end of SubtargetFeature descr [...] adds 3d715e2e934 [NFC] Declare the member data of class PostGenericScheduler [...] adds 5e6e8711f85 gn build: Merge r355439. adds b71ba91724f [CodeGen] Omit range checks from jump tables when lowering [...] adds c8a70731d15 [X86] Suppress load folding for add/sub with 128 immediate. adds f8ea8c96b80 [X86] Enable the add with 128 -> sub with -128 encoding tri [...] adds 46b09a3368a Reversing the commit of revision 355483 since it is giving [...] adds 62fa6d90b1b [CodeGen] Omit range checks from jump tables when lowering [...] adds 01dbaf4f8c9 [X86][SSE] VSELECT(XOR(Cond,-1), LHS, RHS) --> VSELECT(Cond [...] adds 917bdb560e1 [DAGCombiner] Enable SMULO/UMULO vector combine support (PR40442) adds 0c2484c2df0 [X86][NFC] Autogenerate check lines in cmovcmov.ll test adds 0455881d8ff [llvm-mca][X86] Add ADC/SBB with zero test cases adds c80500fed5e [llvm-objcopy] - Fix incorrect CompressedSection creation. adds 1054a222d5a [llvm-objcopy] - Remove an excessive zlib::isAvailable() ch [...] adds c00c9f3c843 Expose template parameters of endian specific types as clas [...] adds 34045966baa [llvm-objcopy] - Remove dead code. NFCI. adds 66554b3e516 [DAGCombiner] Add SADDO/SSUBO combine support adds aa137aa9eac [Remarks] Refactor remark diagnostic emission in a RemarkStreamer adds 6328488e882 [TargetLowering] simplify code for uaddsat/usubsat expansion; NFC adds 4107715f75d Revert "[Remarks] Refactor remark diagnostic emission in a [...] adds f383764b620 [CGP] Avoid repeatedly building DominatorTree causing long [...] adds 69806c5e5c6 [PowerPC] Add secure plt support for TLS symbols adds 78ee34a412e Reland "[Remarks] Refactor remark diagnostic emission in a [...] adds fffa6110345 Revert "[CodeGen] Omit range checks from jump tables when l [...] adds 7d2b43bd7c7 [TargetLowering] simplify code for uaddsat/usubsat expansion; NFC adds 53c102ac201 [DAGCombiner] Enable UADDO/USUBO vector combine support adds 104ec4e396a [AMDGPU] Add support for 64 bit buffer atomic artihmetic in [...] adds df99a029a52 [IR][ARM] Add function pointer alignment to datalayout adds b642ee29435 [Hexagon] Avoid creating 5-instruction packets with vgather [...] adds bbe4f9c7c57 [MC][MachO] Emit an error for emitting relocations of the f [...] adds 005ab1287ab [PPC] Adjust the computed branch offset for the possible sh [...] adds a5acf6e4858 [InstCombine] Fold add nsw + sadd.with.overflow adds 88f77a47e96 [PowerPC] Use real pointers instead of undef adds fa80b421162 [DAGCombine] Improve select (not Cond), N1, N2 -> select Co [...] adds 9b5814c8093 [AArch64] Remove a stray test from the AArch64 directory. adds 0caabcac171 [AArch64] add tests for uaddsat/usubsat; NFC adds 23ecb8f9e59 Revert "[IR][ARM] Add function pointer alignment to datalayout" adds 963f36ed4af [AtomicExpand] Allow libcall expansion for non-zero address [...] adds 0646a823c0c [PGO] Context sensitive PGO (part 4) adds a52cee0a8da [PS4] Emit a trap after a stack-protector fail call. adds bef7c477cd6 [X86] Add vector mulo with power of two operand tests; NFC adds 54def48087b [AArch64] Improve FP16 instruction selection for vector rou [...] adds 2cf296c944b gn build: Merge r355514. adds db94c77588b [PGO] Fix hexagon buildbot errors in r355541 adds 6f6ca7612ee [mips] Replace assertion by error message while lowering `R [...] adds db98fa3b701 [LoopRotate] fix crash encountered with callbr adds 67bb6a3b713 AMDGPU: Handle "uniform-work-group-size" attribute (fix for RADV) adds d7c38c742c2 [InterleavedAccessAnalysis] Use fixed size integers for Int [...] adds dead1873fe9 [X86] Add 512-bit fminnum/maxnum test cases for PR40984. Al [...] adds 8cd54d12c83 [X86] Enable combineFMinNumFMaxNum for 512 bit vectors when [...] adds 00648c2f76a [BDCE] Optimize find+insert with early insert adds 6ac86cddcf3 [IR][ARM] Add function pointer alignment to datalayout adds 3d77fe0e765 Add newline to interpreter debugging output adds 9bfa70bdc5a Temporarily disable newly added test that fails in debug mode. adds e44e91e1f0f [IDF] Delete a redundant J-edge test adds 81cf489ba88 Fix & re-enable test that intermittently failed in debug mode. adds dba0a79dfc7 [yaml2obj] - Allow producing ELFDATANONE ELFs adds deb1a9834bc [MIPS GlobalISel] Fix mul operands adds 8babc52a2be [LSR] Attempt to increase the accuracy of LSR's setup cost adds 72804e5ef9e [llvm-readobj] Dump DT_USED value as string like GNU readelf does adds d48c58fc4e7 gn build: Merge r355522 adds 696cfbc05b3 gn build: Port r342002 adds 527cd075675 [DebugInfo] Fix the type of the formated variable adds b11b60da2d9 [InterleavedAccessAnalysis] Fix integer overflow in insertMember. adds c5b260d2d38 Rollback of rL355585. adds 6d9292403bd [Sanitizer] Add 'dispatch' feature to be used in compiler-rt tests adds 6821da24b7c [PowerPC] Run clang format to avoid compiling warning. adds 863ea8c618b Delete x86_64 ShadowCallStack support adds fb5cf37fba7 [GN] Remove DataLayoutTest.cpp from IR Unittests. adds a1b2649c408 [llvm-mca] Emit a message when no bottlenecks are identified. adds 323ccae6cab AMDHSA: Code object v3 updates adds 1c4b1cfc76f [CodeGen] Reuse BlockUtils for -unreachableblockelim pass (NFC) adds 0d2610da268 [X86] Model ADC/SBB with immediate 0 more accurately in the [...] adds cfbc66ebed1 [X86] Correct scheduler information for rotate by constant [...] adds 60af31346f2 Add secondary libstdc++ 4.8 and 5.1 detection mechanisms adds fc430aca55e [GN] Locate prebuilt binaries correctly. adds 0f44debca2c Work around a module build error on the LLDB incremental gr [...] adds 4f0bc87e438 Make GenericDomTreeConstruction textual instead. adds 2cb8ba58364 Temporarily diasble debug output in GenericDomTreeConstruct [...] adds 81588cab8d6 [x86] add extract FP tests for target-specific nodes; NFC adds ecff519a168 [Bitcode] Fix bitcode compatibility issue with clang.arc.us [...] adds bbf63cf4c3d [runtimes] Move libunwind, libc++abi and libc++ to lib/ and [...] adds 80bb69d69bf [X86] Improve the type checking in isLegalMaskedLoad and is [...] adds 5b94cee9307 [AMDGPU] V_CVT_F32_UBYTE{0,1,2,3} are full rate instructions adds 154171347ba [SelectionDAG] Allow the user to specify a memeq function. adds 0647335aa34 [IR][ARM] Add function pointer alignment to datalayout adds 4c585d9f042 [DAGCombine] Merge visitSSUBO+visitUSUBO into visitSUBO. NFCI. adds b4d2c6deb5f [DAGCombine] Merge visitSADDO+visitUADDO into visitADDO. NFCI. adds efc2ecad759 [DAGCombine] Merge visitSMULO+visitUMULO into visitMULO. NFCI. adds 21a1afeea95 gn build: Unbreak get.py and gn.py on Windows adds 0b3de189e51 gn build: Unbreak finding a working `gn` on $PATH on Unix a [...] adds e4718103144 gn build: Merge r355685 adds 083138333b3 [llvm-readelf]Don't lose negative-ness of negative addends [...] adds 4530e3826d9 Fix typo in constant vector adds 08195555000 [ARM][FIX] Fix vfmal.f16 and vfmsl.f16 operand adds 9808bce5ccd [X86] Add test case for PR22473 adds fea1ddbc355 [x86] prevent infinite looping from inverse shuffle transforms adds e49fd86b9fe [RegisterCoalescer] Limit the number of joins for large liv [...] adds 39de56955dc [CFLAnders] Fix typo in comment; NFC adds bcd58e4ff63 [DAGCombiner] fold (add (add (xor a, -1), b), 1) -> (sub b, a) adds c30eca2a728 [DEBUG_INFO][NVPTX]Emit empty .debug_loc section in presenc [...] adds f031b0c0443 AMDGPU: Correct DS implementation of areLoadsFromSameBasePtr adds a54398f5be6 AMDGPU: Don't bother checking the chain in areLoadsFromSameBasePtr adds 6bc2eb6a5f8 AMDGPU: Add more tests for d16 loads adds ce6e365dc03 Revert "[runtimes] Move libunwind, libc++abi and libc++ to [...] adds c00fa49767a [x86] add tests for extracted vector FP cmp; NFC adds ed120704215 DAG: Don't try to cluster loads with tied inputs adds 30e4d418612 AMDGPU: Move d16 load matching to preprocess step adds 391dc8001fd [RegionPass] Fix forgotten "!". adds 9ab94cbc044 [GN] Merge 355720. adds 3e4cd7e594c [cmake] Remove llvm from LLVM_ALL_PROJECTS adds 7f8f369b999 [HWASan] Save + print registers when tag mismatch occurs in [...] adds 277a5fa7344 [NVPTX][DEBUGINFO]Temp workaround for crash of ptxas: disab [...] adds f033627be4c [x86] scalarize extract element 0 of FP cmp adds 6a7f25d30d6 Improve "llvm-nm -f sysv" output for Elf files adds a8b5f0e7e3f [AArch64][GlobalISel] Fix i1 arguments not being zero-exten [...] adds 84ed8546153 [Go / ASAN] Disable Go bindings for ASAN tests. adds 3441a8988af [CodeGenPrepare] Fix ModifiedDT flag in optimizeSelectInst adds d9f176f3a8f [RISCV] Allow access to FP CSRs without F extension adds cc2caa3c8bc [ScalarizeMaskedMemIntrin] Only set the ModifiedDT flag if [...] adds 7124801b6f1 [RegisterCoalescer][NFC] bind a DenseMap access to a refere [...] adds 2473ad9be81 Rename a local variable counter to Counter. adds 308caddf916 [CMake] Support stripping and linking output to .build-id d [...] adds 7c2c4642b91 [ScalarizeMaskedMemIntrin] Use IRBuilder functions that tak [...] adds e7e3dde9033 [x86] add tests for extract of FP select; NFC adds e3fedf30811 Refactor isBooleanFlip into extractBooleanFlip so that user [...] adds aca9dda7129 [WebAssembly] Use named operands to identify loads and stores adds ee8f60f78fd [RISCV] Support -target-abi at the MC layer and for codegen adds cd335133b27 [RISCV][NFC] Split out emitSelectPseudo from EmitInstrWithC [...] adds 92108e3add7 [RISCV][NFC] Minor refactoring of CC_RISCV adds 79fd81910e4 [ARM] Generate test checks for umulo-32.ll; NFC adds 86f7633c4dd [ARM] Use non-constant operand in umulo-32.ll; NFC adds 324dd572977 [ValueTracking] Move constant range computation into ValueT [...] adds df9bea7129f [git-llvm] Only use --force-interactive when supported adds 4daee4c2afe [runtime] Use --strip-all rather than --strip-sections adds 7f415404f73 Recommit r355224 "[TableGen][SelectionDAG][X86] Add specifi [...] adds 3e098bee952 [TableGen] Make CheckImmAllOnesVMatcher and CheckImmAllZero [...] adds 47bbaefec48 [AArch64] Add tests for saddsat/ssubsat; NFC adds 3d8d3321c08 [X86] Remove dead code from the handler for INTR_TYPE_SCALA [...] adds 385eaa67a35 [X86] Make lowering of intrinsics with rounding mode strict [...] adds 5cc724bae15 [X86] Remove unused variable. NFC adds 87e0f261545 [CGP] fix comments; NFC adds 6a6735dc586 [x86] add x86-specific opcodes to extractelement scalarizat [...] adds 4e3a7c08f35 Remove redundant extractBooleanFlip argument. NFC adds 15db3769012 [X86] Remove VCVTSI2SDZrrb_Int as it shouldn't exist. adds 7ddc0aad266 [X86] Remove unneeded isel patterns from VCVTSI2SDZ and VCV [...] adds 5ddf9b4b323 Add test case for add to sub post legalization. NFC adds 6a7719c7965 [PowerPC] Remove the override of isMachineVerifierClean() t [...] adds 5ff6def596a [X86] Begin removing matching of FROUND_CURRENT and FROUND_ [...] adds b0f6bf123b7 [X86] Split the VFIXUPIMM/VFIXUPIMMS nodes into a current r [...] adds 190ec51dd63 [X86] Rename X86ISD::CMPM_RND and X86ISD::FSETCCM_RND to _S [...] adds a00be16cd8c [X86] Rename the CVTT*_RND ISD nodes to _SAE and remove the [...] adds 4cd65f011b0 [X86] Rename X86ISD::CVTPH2PS_RND to CVTPH2PS_SAE. Remove S [...] adds c991b03242a [X86] Rename _RND versions of RANGE/REDUCE/GETMANT/RDNSCALE [...] adds a88cb1d6638 [X86] Split RCP28/RSQRT/GETEXP/EXP2 ISD opcodes into SAE an [...] adds a06b09b70de [X86] Split SCALEF(S) ISD opcodes into a version without ro [...] adds fa11051dc44 [X86] Add SCALAR_SINT_TO_FP/SCALAR_UINT_TO_FP ISD opcodes w [...] adds 27eb754d246 [X86] Use 'UseAVX' in place of 'HasAVX, NoAVX512'. NFC adds be6cf2ad91e [X86] Remove apparently unneeded patterns for storing a bit [...] adds 6c46962524c [X86] Enable sse2_cvtsd2ss intrinsic to use an EVEX encoded [...] adds fbbf45ee832 [Support/Endian] Add support for endian-specific enums adds bd07e506c86 Attempt to fix build errors caused by r355812 adds 4306b0ed95a [MIPS GlobalISel] NarrowScalar G_MUL adds e7f4ae297ee [MIPS GlobalISel] NarrowScalar G_UMULH adds f3ff35c66b5 [MIPS GlobalISel] Silence uninitialized variable warning adds ee1b824708e [llvm-objcopy] - Fix --compress-debug-sections when there a [...] adds b6c96952b72 [JumpThreading] Retain debug info when replacing branch ins [...] adds 64ecbb6debd [CGP] Limit distance between overflow math and cmp adds 16c00e17ef7 [MIPS][microMIPS] Add a pattern to match TruncIntFP adds 71dcb3c2106 [DAG] TargetLowering::SimplifySetCC - call FoldSetCC early [...] adds 3b379a97271 [yaml2obj] - Simplify. NFC. adds 763ae301ec7 [SimplifyCFG] Retain debug info when threading jumps with c [...] adds fcda0348af1 [AMDGPU] Mark enum types in SIDefines.h as unsigned adds 1063a019c3f [TableGen] Replace a dyn_cast with isa to avoid an unused v [...] adds 5d5019bab2c Use bitset for assembler predicates adds 4e3754ce697 [DAG] Move SetCC NaN handling into FoldSetCC adds 905c1b120c7 [Utils] Extract EliminateUnreachableBlocks (NFC) adds 0280621b312 [DAG] FoldSetCC - reuse valuetype + ensure its simple. adds 1b9ddbde026 [NFC][PowerPC] Add comment for PPCAsmPrinter::printOperand adds ca9c63cecee [X86] Extend widening comparison test. adds d891699e6f7 Detect malformed LC_LINKER_COMMANDs in Mach-O binaries adds b11ac3d4e1a [coroutines][PR40979] Ignore unreachable uses across suspen [...] adds e3834c1b198 [RegAlloc] Avoid compile time regression with multiple cop [...] adds 079d1d896c9 gn build: Merge r355834 adds 9644531df49 gn build: Merge r355835 adds b3804eeeac6 gn build: Merge r355777 adds 802a6632d56 [SDAG][AArch64] Legalize VECREDUCE adds a44000a1a85 Remove esan. adds f3044fe6963 [RISCV][NFC] Convert some MachineBaiscBlock::iterator(MI) t [...] adds cb9067728a5 [GlobalISel][AArch64] Always fall back on aarch64.neon.addp.* adds 7cb38d512dc [RISCV] Allow fp as an alias of s0 adds ceec6f23cb9 Relax constraints for reduction vectorization adds f2cfb7b3d3b [RISCV] Do a sign-extension in a compare-and-swap of 32 bit [...] adds cc5a8c21afc Remove ASan asm instrumentation. adds 2377ecc1613 Recommit "[GlobalISel][AArch64] Add selection support for G [...] adds d332bc44067 [X86] Remove ProcModel and ProcFeatures tablegen classes. M [...] adds 5b9ba1171e6 Revert "Relax constraints for reduction vectorization" adds cded725cbea Hexagon RDF: Replace function template (plus explicit speci [...] adds e348e5023a2 Add Swift enumerator value for CodeView::SourceLanguage adds 2d9ad107114 Reland "Relax constraints for reduction vectorization" adds 57bdd1c0582 llvm-objcopy: Remove unused field. NFCI. adds 5cb331b8894 Very minor typo. NFC adds 3c8560f7a3e Fix git-llvm crashing when trying to remove directory while [...] adds 456da09d906 [RISCV] Add test cases for the lp64 ABI adds 8183de62fd4 [TableGen] Allow 2^63-1 and 2^63-2 as int literals. adds 240db0070c2 [TTI] Enable analysis of clib functions in getIntrinsicCost [...] adds 4b43b47d8a7 [AMDGPU] Add support for immediate operand for S_ENDPGM adds 13df7e16ef7 [CGP] Fix UB when GEP is bound to trivial PHINode adds 65378bcd144 [SimplifyLibCalls] Fix comments about fputs, memchr, and s[ [...] adds 8b5b0e123a9 [SLP] Remove redundancy of performing operand reordering tw [...] adds a7682f4fedc [ARM][NFC] Move smlad tests adds 88f0c562f56 [ARM][NFC] Delete original smlad tests adds 28f32b6ce90 Try to fix SLPVectorizer BoUpSLP::BoEdgeInfo::dump visibili [...] adds 08b06e613c2 Revert rL355906: [SLP] Remove redundancy of performing oper [...] adds c3ad5d9485d [llvm-objcopy] Remove unneeded checks. NFC adds e73d6cd491f [XRay][docs] Fix option name adds da6012e2633 [NFC][PowerPC]Assert when trying to generate directmove below P8. adds e499a1a9181 [SimplifyLibCalls] Simplify optimizePuts adds 856397bd226 [llvm-readobj] Print symbol version when dumping relocation [...] adds d2440eb2707 [format] \t => ' ' adds 99eb9152f94 CodeGenPrep: preserve inbounds attribute when sinking GEPs. adds 1e6e80480b1 [FileCheck]Remove assertions that prevent matching an empty [...] adds f3b95a8046b [llvm-cxxfilt]Add test to show that empty lines can be handled adds f960871b4b5 [Docs] Add note about legacy PM to Ch4 of tutorial adds 17eecf27405 [DAGCombine] Pull out repeated demanded bitmask generation. NFCI. adds 5ebb3b9e4a3 Regenerate sign_extend.ll test. adds 197205490e6 [X86] Arrange more CPU features to inherit from earlier CPUs. NFCI adds f7a652c414b [SDAG] Expand pow2 mulo using shifts adds 5f9ffd160ad [yaml2obj]Allow explicit symbol indexes in relocations and [...] adds 08592ad5d1e Test commit: add a blank line in test case ppc64-dq-expr.s adds d690dcb9dae [NFC][PowerPC] Update testcases using utils/update_llc_test [...] adds be2c0a2abf7 [RISCV][MC] Find matching pcrel_hi fixup in more cases. adds d13e5110081 [SanitizerCoverage] Avoid splitting critical edges when des [...] adds f522bdf453d Set useful flags for vector imm setting instructions adds 9d5245848ed [SCEV] Use depth limit for trunc analysis adds 197a5e2c4af [CodeGen] Add MMOs to statepoint nodes during SelectionDAG adds 283655fcc30 [x86] scalarize extractelement 0 of FP vselect adds 1ca9798456a [SROA] Fix a crash when trying to convert a memset to an no [...] adds 1bd774409d8 [Remarks] Add -foptimization-record-passes to filter remark [...] adds f5a4de6d253 MIR: Stop reinitializing target information for every use adds ef8ea6ba1a0 Fix missing C++ mode comments adds d0c7284d741 [llvm] Skip over empty line table entries. adds a826459b5e2 Revert "[Remarks] Add -foptimization-record-passes to filte [...] adds 6e8fb99b69c IR: Add immarg attribute adds e74acf4ba7b For faulting ops, include a comment w/the fault destination adds e733b62cb8c [Test] Add tests for implicit null checks on atomic/volatil [...] adds 1e252811d61 Reland "[Remarks] Add -foptimization-record-passes to filte [...] adds e98bc0b63e4 Add XCOFF triple object format type for AIX adds 46c70352450 [X86] Add ImmArg markings to intrinsics. adds d929ec60384 Use AIX version detection at LLVM run-time adds 81f5bd5c087 [WebAssembly] Place 'try' and 'catch' correctly wrt EH_LABELs adds dc849bb04d8 [X86] Enable printAliasInstr for the Intel assembly printer [...] adds 9dca4fc4b86 Revert "[llvm] Skip over empty line table entries." adds babf76c30d1 [Tests] Expand implicit null check coverage adds 5a295517ec5 [ImplicitNullChecks] Support unordered atomic accesses adds cb6651ae9dd [clang-format] [PR25010] AllowShortIfStatementsOnASingleLin [...] adds 4361ad0ab2a Revert "[clang-format] [PR25010] AllowShortIfStatementsOnAS [...] adds 8ab0c060660 [RISCV] Replace incorrect use of sizeof with array_lengthof adds d3c675630f1 [Support] Treat truncation of fullpath as error adds ffd66b23e66 [ELF] Fix GCC8 warnings about "fall through", NFCI adds 2f4a0fcb84d [mips] Fix CPU used in the test case to suppress warning. NFC adds 4113ee0fb7a [MIPS][microMIPS] Fix PseudoMTLOHI_MM matching and expansion adds 5fd3b9019a6 [DAG] Move integer setcc %x, %x folding into FoldSetCC adds d069ea7e62b [DebugInfo][Docs] Document how dbg.value intrinsics are int [...] adds 9a37b8328d4 Appease MSVC builds by #ifdef wrapping runAndGetCommandOutp [...] adds 781bdd8a108 [X86][AVX] lowerShuffleAsBroadcast - improve load folding b [...] adds 9f9dd8f5478 [RISCV] Regenerate umulo-128-legalisation-lowering.ll adds e853018a81d [mips] Map SW instruction to its microMIPS R6 variant adds 17d2bf7db15 Fix signed/unsigned mismatch warning. NFCI. adds e963c6818dd Re-land r354244 "[DAGCombiner] Eliminate dead stores to stack." adds 59c736bd3e6 [mips] Define `mov.d` instructions using `ABSS_M` multiclass. NFC adds a63c4ac08c2 [mips] Fix encoding of the `mov.d` command for microMIPS R6 adds b1c30dbc632 [x86] limit extractelement of setcc to pre-legalization adds c409047310b [AArch64] Add test/CodeGen/AArch64/vecreduce-fadd.ll adds 439680dbe5b [NFC][CMake] Improve Status message in the iOS toolchain file adds 47dc3c17438 [mips] Join some adjacent `let DecoderNamespace` blocks. NFC adds 752b9de47d1 [RISCV] Add tests for callee-saved GPRs, FPR32s, and FPR64s adds ed761d68673 [RISCV] Only mark fp as reserved if the function has a dedi [...] adds 17d355768ce [X86][AVX] Add combineConcatVectors support to improve subv [...] adds e3707b846d4 [X86][AVX] Add X86ISD::VTRUNC handling to SimplifyDemandedV [...] adds 154874adc53 [DAGCombiner] If a TokenFactor would be merged into its use [...] adds e79d0df477b [DAGCombiner] Fix Comment. NFC. adds 1c13a5b0438 Regenerate test adds 83f786b4bac [RISCV] Regenerate test/CodeGen/RISCV/legalize-fneg.ll afte [...] adds ad03152cf75 [X86] Avoid icmp undef in reduced tests adds 5db1718aa6e [X86] Check for 64-bit mode in X86Subtarget::hasCmpxchg16b() adds 3589fdddf4b [MsgPack] New MsgPackDocument class adds 6cce665f805 [AMDGPU] Switched HSA metadata to use MsgPackDocument adds 74fba6521c1 [MsgPack] Removed MsgPackTypes adds dca8e63deaa [X86] Regenerate tail call tests adds 4aa20a4a6d2 [X86] Remove icmp undef in more reduced tests adds f3a3d439652 Mips: Add ImmArg to intrinsics adds bb7e40de731 SystemZ: Add ImmArg to intrinsics adds 9e46efd856d Hexagon: Add ImmArg to intrinsics adds 892b8f0cdb4 PowerPC: Add ImmArg to intrinsics adds 39c8bbd6226 Verifier: Make sure masked load/store alignment is a power of 2 adds a4638a6a3ae [AMDGPU] Silence gcc 7 warnings adds d6686b6984b [GlobalISel][AArch64] Gardening: Factor out code to find la [...] adds 8a89f2de31f [WebAssembly] Improve support for "needed" list in dylink section adds b7dc7b58c4c [AIX][CMake] Changes for building on AIX with XL and GCC adds 86c9a488021 [llvm-objcopy] Cleanup errors from CopyConfig and remove ll [...] adds 63f4b537b32 [GlobalISel][AArch64] Gardening: Factor out vector inserts adds 82b9a28c7e3 [AArch64][GlobalISel] Gardening: Simplify subregister copy [...] adds 0502ddb2a60 [llvm-objcopy][NFC] Remove unnecessary llvm-objcopy.h #includes adds f338da057ca [X86] Add 64-bit mode command lines to rot32.ll so that it [...] adds 8136aefd779 [ResetMachineFunctionPass] Add visited functions statistics info adds c8c4a422420 Fixup tests to check for any MCInst number instead of a spe [...] adds 79ad8c5d849 [GlobalISel][Utils] Add a getConstantVRegVal variant that l [...] adds b98d8ca15ff [X86] Add various test cases for PR41057. NFC adds 6248ee71f83 [X86] Add patterns for rotr by immediate to fix PR41057. adds 8125ab6f68f [RISCV] Extend test/CodeGen/RISCV/callee-saved-* to test ge [...] adds b216751ea8f [RISCV][NFC] Rename callee saved regs 'CSR' to CSR_ILP32_LP [...] adds ac0d6fee075 [RISCV] Fix rL356123 adds f012e914c82 gn build: Merge r356082 adds e83676d5104 [llvm-objcopy]Don't implicitly strip sections in segments adds 01f20a4ee2a [ARM] Run ARMParallelDSP in the IRPasses phase adds 6273747bc3d [NFC][LSR] Cleanup Cost API adds 571398105ee [ARM][ParallelDSP] Enable multiple uses of loads adds 2c597b63fe0 Revert r356129 due to greendragon bot failures adds b425d6d63ac Fix for buildbots adds d5ba5901b90 [llvm-objcopy]Don't implicitly strip sections in segments adds c69e0f0517d [SystemZ] Regenerate tests to make complete codegen more obvious adds b85628fbc5c [SystemZ] Remove icmp undef adds d7620a3317c gn build: Merge r356080 adds c06a0f6ec2c AMDGPU: Don't add unnecessary convergent attributes adds 496c1dd07c4 ARM: Add ImmArg to intrinsics adds 32ff027088c Note ImmArg in documentation for adding intrinsics adds 002b63f0a3b [SampleFDO] add suffix elision control for fcn names adds c357f7eb2b6 GlobalISel: Use multiple returns for intrinsic structs adds 9ec5e55104d AMDGPU: Scavenge register instead of findUnusedReg adds e287d6a791e YAMLIO: Improve template arg deduction for mapOptional adds 9afb620acff [x86] prevent infinite looping from vselect commutation (PR41066) adds acbed856d27 [NFC][ARM] Update test adds 331d4e6ff20 Add IR debug info support for Elemental, Pure, and Recursiv [...] adds 13b61457d35 [X86] Fix the pattern changes from r356121 so that the ROR* [...] adds 3b437858280 [Tests] Add negative folding tests w/fences as requested in D59345 adds 7747c1d2df8 Allow code motion (and thus folding) for atomic (but unorde [...] adds 4411e545d04 [Tests] Add tests for reordering of unordered atomics on in [...] adds 587de2cafa8 [InstCombine] add tests for funnel shift constant shift amo [...] adds 3384c56bc0a Speeding up llvm-cov export with multithreaded renderFiles [...] adds 4385104c44f [ARC] Better classify add/sub immediate instructions in fra [...] adds 751d75d6830 Auto-generate an existing test to make it easier to update adds 1a446d1577d [GlobalISel][AArch64] Add partial selection support for G_I [...] adds 81c0530ed47 [Tests] Revert an accident change to a test adds d0d19c1992a [Tests] Add tests to demonstrate hoisting of unordered inva [...] adds f63ee9026be [MemorySSA] Remove redundant walker assignment [NFC]. adds 74800bb68bc [InstCombine] add tests for funnel shift constant shift amo [...] adds 82311c6556e [InstCombine] canonicalize funnel shift constant shift amou [...] adds 981d5961267 Handle consecutive-double-quotes in Windows argument parsing adds b8324661573 [InstCombine] remove duplicate tests adds a41868aa77d gn build: Add build files for clang-doc adds 48dc9cf87f3 [ARC] Add more load/store variants. adds d6add264d49 [InstCombine] Add tests for range-based saturing math overf [...] adds 2b070724f79 Line wrap README file adds 506dd368898 Add test I forgot to git-add in r356163. adds 487fd676cb6 AMDGPU: Correct type for waitcnt debug flag adds 30e91d46e18 [llvm-strip] Hook up (unimplemented) --only-keep-debug adds 751cb634246 [AArch64][GlobalISel] Add some support for G_CONCAT_VECTORS. adds 2e9c70af234 [AArch64][GlobalISel] Implement selection for G_UNMERGE of [...] adds 4a50374b480 [AArch64][GlobalISel] Add isel support for G_UADDO on s32s [...] adds d8706fcd747 MIR: Allow targets to serialize MachineFunctionInfo adds a092a834c4c [MC] Sort FDEs by the associated CIE before emitting them. adds b1ceba26ca4 Tighten up tests that use -debugify as a shortcut. NFC adds f1180b0c1f9 [CGP] add another bailout for degenerate code (PR41064) adds fab403b55c1 AMDGPU: Remove intrinsic operand assert adds a5cf8e0cbf0 [WebAssembly] Remove unused load/store patterns that use te [...] adds 2932b32f4e4 [BPF] do not generate unused local/global types adds b88b36bff53 Revert "[BPF] do not generate unused local/global types" adds 6bc58e6d3db [BPF] do not generate unused local/global types adds 20744f0b1f3 [MIPS GlobalISel] Improve selection of constants adds 42dcf561227 [ARM][ParallelDSP] Disable for big-endian adds 85356e1a664 [llvm-objcopy] Don't use {}; NFC adds c2226fc117e [llvm-objcopy] Delete unused parameter from replaceDebugSec [...] adds 0fb76792539 [llvm-readobj] Delete unused variable. NFC adds 24ee1c697ff [yaml2obj]Allow explicit setting of p_filesz, p_memsz, and [...] adds af0a8f8949d [llvm-profdata] Deleted unused Cutoffs added by D16005 adds 72299d0b1df [X86][SSE] Attempt to convert SSE shift-by-var to shift-by-imm. adds 7ff56982399 [WebAssembly] Remove icmp undef in stackify test adds 13f8e3c482f [ARM] Remove icmp undef from reduced tests adds 1154d31e8c4 [SPARC] Regenerate label test for D59363 adds f75dbeb8e7d [LSR] Check for signed overflow in NarrowSearchSpaceByDetec [...] adds 58cac675168 [LSR] Update test from rL356256 after rebase. adds d82dbd63a34 [AMDGPU] Fix SGPR fixing through SCC chaining adds 7eaac1c18c0 [ARM] Remove EarlyCSE from backend adds bc7dbf662a6 [CodeGenPrepare] avoid crashing from replacing a phi twice adds b472d695217 [llvm] Skip over empty line table entries. adds 8026cb19928 [Hexagon] Remove icmp undef from reduced tests adds fdb5c575767 [ThinLTO] Restructure AliasSummary to contain ValueInfo of Aliasee adds 1228ed302f3 YAMLIO: Improve endian type support adds 827df5124c4 [X86] Add SimplifyDemandedBitsForTargetNode support for PIN [...] adds 28a7a3055b1 [LLVM-C] Expose the "Add Discriminators" Pass To LLVM-C adds 4c0f218c933 [SelectionDAG] Add SimplifyDemandedBits handling for ISD::S [...] adds 49abaf8b814 [AArch64] Regenerate build vector tests adds a189aac68af [ConstantRange] Add overflow check helpers adds a7717b7c820 [BPF] handle external global properly adds 4c013b3a56e [X86][GlobalISEL] Support lowering aligned unordered atomics adds 9daee5ff7bc [AArch64][GlobalISel] Regbankselect: Fix G_BUILD_VECTOR try [...] adds 915dcbebc00 [InstCombine] add tests for masked store/scatter; NFC adds f54c916764e [tests] Add a test for constexpr mask as requested in D57372 adds 5ac2b03ffe8 [ConstantRange] Try to fix compiler warnings; NFC adds cb6ed662f06 [InstCombine] add tests for logic of NaN fcmps; NFC adds 5ab7e0c1e4b [ValueTracking] Use ConstantRange overflow checks for unsig [...] adds e767531b149 [X86][SSE] Fold scalar_to_vector(i64 anyext(x)) -> bitcast( [...] adds 1c838a42256 [SimplifyDemandedVec] Strengthen handling all undef lanes ( [...] adds bf6b4e88ed5 [X86] Strip the SAE bit from the rounding mode passed to th [...] adds 67b6109ba64 [CMake] Correct CMake message mode adds 4a413d30ec3 AMDGPU: Fix a SIAnnotateControlFlow issue when there are mu [...] adds 6185a3e03ca [AArch64] Turn BIC immediate creation into a DAG combine adds 3cf232123d1 [X86] Promote i8 CMOV's (PR40965) adds 1f727efc28a [X86] X86ISelLowering::combineSextInRegCmov(): also handle [...] adds 70a59574dd1 [ARM] Add MachineVerifier logic for some Thumb1 instructions. adds 18f1325022b [GlobalISel] Allow MachineIRBuilder to build subregister copies. adds 7086bb6b045 [TimePasses] allow -time-passes reporting into a custom stream adds 5bb6ba601e3 gn build: Add missing dependency to check-clang target. adds 7feefc2fe73 [GlobalISel] Make isel verification checks of vregs run und [...] adds d6001a9722f [ADT] Make SmallVector emplace_back return a reference adds ccae125ce42 [WebAssembly] Irreducible control flow rewrite adds c9ba0947cd5 gn build: Merge r356305. adds c1447a19117 [WebAssembly] Method order change in LateEHPrepare (NFC) adds 421f4e7b6ab [WebAssembly] Make rethrow take an except_ref type argument adds 1b3a035e94b [X86] Add SimplifyDemandedBitsForTargetNode support for PEX [...] adds f6ef17c4e98 [X86][SSE] Constant fold PEXTRB/PEXTRW/EXTRACT_VECTOR_ELT nodes. adds ac4082b77e0 [BPF] Add BTF Var and DataSec Support adds 1dcbea8cd57 [DAGCombine] combineShuffleOfScalars - handle non-zero SCAL [...] adds 1b72e9850b8 [RISCV] Fix RISCVAsmParser::ParseRegister and add tests adds 6c8de7f2e28 [RISCV][NFC] Factor out matchRegisterNameHelper in RISCVAsm [...] adds 939c6145a96 [TargetLowering] improve the default expansion of uaddsat/usubsat adds 7cb598a0d7a [DAGCombine] Fold (x & ~y) | y patterns adds 99f94bb32f3 [ARM] Add some CBZ constant island tests. NFC adds 301f1518084 [ARM] Search backwards for CMP when combining into CBZ adds 3ce62d30c27 [InstCombine] add tests for rotate by constant using funnel [...] adds 051e78c2013 [InstCombine] canonicalize rotate right by constant to rotate left adds f6babf87c58 [ConstantRange] Add fromKnownBits() method adds c1e674eb387 [AMDGPU] Regenerate some f16/i16 tests. adds a4f465e4c73 [ARM] Fixed an assumption of power-of-2 vector MVT adds c84795ff0de [AMDGPU] Prepare for introduction of v3 and v5 MVTs adds 826addddb1a [X86] Remove the _alt forms of XOP VPCOM instructions. Use [...] adds 799ecd6eba4 [X86] Remove the _alt forms of AVX512 VPCMP instructions. U [...] adds c90650685f3 [ValueTracking] Use ConstantRange overflow check for signed [...] adds 5a0b364cb70 [ConstantRange] Add assertion for KnownBits validity; NFC adds 2066fb5fc91 AMDGPU: Partially fix default device for HSA adds 9629afce591 RegAllocFast: Add hint to debug printing adds b44cf4fdfc9 [ARM] Check that CPSR does not have other uses adds 9a80c7c838e [CodeGen] Prepare for introduction of v3 and v5 MVTs adds b68313482ba [CodeGen] Defined MVTs v3i32, v3f32, v5i32, v5f32 adds a1745146ced [X86] Merge printf32mem/printi32mem into a single printdwor [...] adds cd3ec4d74b8 Remove immarg from llvm.expect adds 6c3adeb3a9a [X86] Add tab character to the custom printing of VPCMP and [...] adds 0e706fe381c [X86] Make ADD*_DB post-RA pseudos and expand them in expan [...] adds 7e354493669 [X86] Add ADD8ri_DB and ADD8rr_DB to the autogenerated load [...] adds 95cfb867aba [RISCV] Add ImmArg to intrinsics adds 349209d2614 [X86] Hopefully fix a tautological compare warning in print [...] adds 4351957ec55 [AArch64] Fix bug 35094 atomicrmw on Armv8.1-A+lse adds 95c6236239d [DebugInfo] Ignore bitcasts when lowering stack arg dbg.values adds 681f332fc6a [llvm-exegesis] Separate tool options into three categories. adds df212660526 [InstCombine] add funnel shift tests with arbitrary constants; NFC adds 7389752eef4 [SystemZ] Remove icmp undef from reduced tests adds 1772f0a5a32 [InstCombine] extend rotate-left-by-constant canonicalizati [...] adds ab0a1d7699a [llvm-objcopy] - Calculate the string table section sizes c [...] adds bf859bb52f5 [InstCombine] allow general vector constants for funnel shi [...] adds 89fc4394cba [AMDGPU] Add an experimental buffer fat pointer address space. adds 8aaaf73830c [MVT] Fix typos in comment. NFC. adds d918576dc5a [DAG] Cleanup unused node in SimplifySelectCC. adds edbd5597b3a [InstCombine] add/adjust test for NaN checks; NFC adds 2b24b93a59f [X86] Remove the _alt forms of (V)CMP instructions. Use a c [...] adds 5c68269f7ec [AArch64] Refactor floating point materialization. NFC adds 0ce3660e408 [TargetLowering] Add code size information on isFPImmLegal. NFC adds 174d97b3b9e [AArch64] Optimize floating point materialization adds cebbea71814 [AArch64] Small fix for getIntImmCost adds b017ce4be93 [SCEV] Guard movement of insertion point for loop-invariants adds b82c2057848 [X86] Rename imm8_su/imm16_su/imm32_su to relocImm8_su/relo [...] adds e38a937ce0e [MsgPack][AMDGPU] Fix unflushed raw_string_ostream bugs on [...] adds 8ce49075b47 [DebugInfo][PDB] Don't write empty debug streams adds 0990d05f33e Revert r356304: remove subreg parameter from MachineIRBuild [...] adds 0b9f636469b [AMDGPU] Asm/disasm v_cndmask_b32_e64 with abs/neg source m [...] adds a90929573cc [AMDGPU] Asm/disasm clamp modifier on vop3 int arithmetic adds d15747e2fa0 Fix flat-error-unsupported-gpu-hsa test adds f5b72f62c0f Restore comment regarding why Reloc::PIC_ can't be PIC adds 6f1ca03bfff [InstCombine] Improve with.overflow intrinsic tests; NFC adds bb22cd1f19d [llvm-objcopy] Make .build-id linking atomic adds 671c6db1952 [AMDGPU] Enable code selection using `s_mul_hi_u32`/`s_mul_ [...] adds ecb803edc2c [X86] Replace uses of i64immSExt32_su with i64relocImmSExt32_su. adds f2c750b0e65 [X86] Use relocImm in the ROL8ri/ROL16ri/ROL32ri/ROL64ri pa [...] adds 89d0f2ff489 [InstSimplify] Add additional icmp of min/max tests; NFC adds 44d05035050 [ValueTracking][InstSimplify] Move abs handling into comput [...] adds ca5bbb310e6 [WebAssembly] Don't override default implementation of isOf [...] adds b392b2cef2e [GlobalISel] Include missing change from r356396 adds ca0ea067ee0 [X86] Allow any 8-bit immediate to be used with BT/BTC/BTR/ [...] adds 84930c470b4 [InstCombine] Add tests for add nuw + uaddo; NFC adds 348957eb04b [ValueTracking][InstSimplify] Support min/max selects in co [...] adds e85ffd1263f [X86] Disable CQTO and CLTQ instructions in the assembly pa [...] adds 2911d459291 [X86] Add coverage for 16-bit and 64-bit versions of bsf/bs [...] adds 91c7c70b360 [libFuzzer] document -len_control adds 867969e80f3 Revert "[ValueTracking][InstSimplify] Support min/max selec [...] adds 68b1256f371 [WebAssembly] Lower SIMD nnan setcc nodes adds 8dd4b773921 [WebAssembly] Add immarg attribute to intrinsics adds de5a98a8df1 [WebAssembly] Rename methods according to instruction name [...] adds e6c22c2a855 [WebAssembly] Improve readability of irreducibility tests adds 9ecd435b55a [WebAssembly] Small improvements in FixIrreducibleControlFl [...] adds 1cf4b593a7e [DebugInfo] Introduce DW_OP_LLVM_convert adds 1f6df780ece Use response file when generating LLVM-C.dll adds 58648f08903 Revert "[DebugInfo] Introduce DW_OP_LLVM_convert" adds a3c50671a5e [InstCombine] Regenerate + add icmp with undef tests adds 6ce55cd841c [DebugInfo] Introduce DW_OP_LLVM_convert adds 9f91501d176 [InstCombine] add FMF to tests for extra coverage; NFC adds 92078fc49a7 [DebugInfoMetadata] Move main subprogram DIFlag into DISPFlags adds 07bbe5e2922 [InstSimplify] SimplifyICmpInst - icmp eq/ne %X, undef -> undef adds 9de7d754365 [DebugInfo] Move test files added in r356451 adds c9b864d3c6e [mips] Fix crash on recursive using of .set adds a005e566326 [InstCombine] Add missing test for icmp transformation (NFC) adds 20c971d1311 [AMDGPU] Ban i8 min3 promotion. adds 1dfea47e9e2 [AMDGPU] Add buffer/load 8/16 bit overloaded intrinsics adds e697f3e7176 [llvm-ar] Support N [count] modifier adds 5425f5c42b5 [SelectionDAG] Handle unary SelectPatternFlavor for ABS cas [...] adds fc38c3b025d [AMDGPU] Add convergent attribute to WWM. adds 94418e1f648 [InstCombine] fold logic-of-nan-fcmps (PR41069) adds 4d528d9c6c1 [Tests] Update to newer ISA adds eea77acda7b Fix unused variable warning. NFCI. adds 4396102a685 [DAGCombine] Fix a miscompile when reducing BUILD_VECTORs t [...] adds c0bab749ea1 [NFC] Fix unused variable in release builds adds 95f0c9ffc76 [MIPS][microMIPS] Enable dynamic stack realignment adds 8b05fc727ef [AtomicExpand] Fix a crash bug when lowering unordered load [...] adds 90ec4721389 [X86][SSE] SimplifyDemandedVectorEltsForTargetNode - handle [...] adds 57757dd059f gn build: Merge r356451. adds 861cde1460f gn build: Merge r356387. adds cd6f62dcd4b [ValueTracking] Use computeConstantRange() for unsigned add [...] adds 2e8758fd517 [Remarks] Add a new Remark / RemarkParser abstraction adds 7feeb42225d Revert "[Remarks] Add a new Remark / RemarkParser abstraction" adds c2065f2c0ba Allow unordered loads to be considered invariant in CodeGen adds 04a982d9fb0 Fix for ABS legalization on PPC buildbot. adds 51c2ad77cde RegAllocFast: Remove early selection loop, the spill calcul [...] adds c5826b9f48c RegAllocFast: Do not allocate registers for undef uses adds 951c9d9b261 CodeGen: Refactor regallocator command line and target selection adds 94c6fbfa0e7 Demanded elements support for masked.load and masked.gather adds e9a0d4ae07e [TailCallElim] Add tailcall elimination pass to LTO pipelines adds cd805e0a790 [DwarfDebug] Skip entries to big for 16 bit size field in D [...] adds 6364ead02be Revert r356511 "[TailCallElim] Add tailcall elimination pas [...] adds ae5245f08c6 Reland "[Remarks] Add a new Remark / RemarkParser abstraction" adds df1fd0765ba [InstSimplify] Add additional cmp of abs without nsw tests; NFC adds 8cb45493526 [DwarfDebug] Add triple to test. adds 61937976e29 [Remarks] Fix gcc build for r356519 adds a02f17a2d3e Remove MSVC compat hack since the inline keyword was added in 2015 adds dbb609e9f2d [AArch64][GlobalISel] Make v4s32 G_IMPLICIT_DEF legal. adds 6c2d34c25fb [AArch64][GlobalISel] Add an optimization to select vector [...] adds aae431a7be0 [ARM] Make sure to save/restore LR when we use tBfar. adds 5a80ebcf20f [X86] Re-disable cmpxchg16b for 32-bit mode assembly parsing. adds 43779dfd98e Add workaround to build scoped enums with VS2015. NFCI. adds a90778f4d66 Revert "Add workaround to build scoped enums with VS2015. NFCI." adds 75be4b8c64d Retry to add workaround to build scoped enums with VS2015. NFCI. adds 1fd2bab1d52 [X86] Remove X32 check lines from a test that doesn't have [...] adds 4723fae6cb6 [instcombine] Add todos describing missing transforms for m [...] adds c60506461fb [AMDGPU] Allow MIMG with no uses in adjustWritemask in isel adds a5720ca7ac6 [perf][DebugInfo] follow up for "add SectionedAddress to De [...] adds 8f4fcc2043f [X86] Remove X86 specific dag nodes for RDTSC/RDTSCP/RDPMC. NFCI adds 3bb42b078e3 [X86] Use getConstantOperandAPInt to detect out-of-range shifts. adds c34c8cdc7ae [ExpandMemCmp] Trigger on bcmp too. adds b2508feccef Remove out of date comment. NFCI. adds e9fd37a7493 [llvm-objcopy] - Use replaceSectionReferences to update the [...] adds ffe6f392ce4 [TTI] getMemcpyCost adds 91dc583d374 Follow up of rL356555 adds c8a95e16f65 [CGP][x86] add tests for usubo regression (PR41129); NFC adds 0e7dac6a2f7 gn build: Merge r356519 adds b04f80485ce [AMDGPU][MC][GFX9] Added support of operands shared_base, s [...] adds 6c730c69df8 gn build: Merge r356508 adds 0fd81a3c2d0 [CGP] convert chain of 'if' to 'switch'; NFC adds b8014cec306 gn build: Add build files for some clang-tools-extra adds 5a80625bf9b Fix sanitizer failures for 356550. adds a062393d06a [CGP] fix formatting; NFC adds f88ef524dd4 [AMDGPU][MC] Corrected checks for DS offset0 range adds b0941775f0b Remove HAVE_REALPATH from config.h adds d1e92f3b2aa [AMDGPU] Factored PAL metadata handling out into its own class adds 9275184cf22 [Remarks] Fix mismatched delete due to missing virtual destructor adds bef1b6fce41 [InstCombine] Fold add nuw + uadd.with.overflow adds 2aa13e1fa8e [ValueTracking] Compute range for abs without nsw adds 906007f75a6 [LICM & MemorySSA] Don't sink/hoist stores in the presence [...] adds 723e799c4de Simplify operands of masked stores and scatters based on de [...] adds 2b2c7f795d4 [AMDGPU] Added MsgPack format PAL metadata adds d1ec87fb2f5 Resubmit r356511 "[TailCallElim] Add tailcall elimination p [...] adds 7201b5f8685 [NFC] Fix brace indentation. adds e43e4afb375 [Linker] Fix crash handling appending linkage adds 283e227ba6d [ARM] Eliminate redundant "mov rN, sp" instructions in Thumb1. adds 19d5a90f6d7 AMDHSA: Fix COMPUTE_PGM_RSRC2.USER_SGPR calculation when pa [...] adds f343c82fa29 [AArch64] Fix formatting (NFC) adds b82e24e53fc [ARC] Add ARCOptAddrMode pass to generate postincrement loa [...] adds 4dc029cbf0f [AMDGPU] Fix clamp bit DAG operand adds 39812314f7e [WebAssembly] Target features section adds f2fd5784992 AMDGPU: Don't look for constant in insert/extract_vector_el [...] adds 2213c42310b [AMDGPU] Fix dependency on `BinaryFormat` adds 98e0aa0b32c [X86] Call lowerShuffleAsBitMask for 512-bit vectors in low [...] adds 724d09f05cb Allow machine dce to remove uses in the same instruction adds e8fbd474641 [InstCombine] Add additional sub nsw inference tests; NFC adds 2107f31cc36 [AMDGPU] Do not generate spurious PAL metadata adds 6dc24d0808c [WebAssembly][NFC] Fix formatting error from rL356610 adds c541f4eb4a0 Fix Mach-O bind and rebase validation errors in libObject adds 1213cfca13c [X86] Add CMPXCHG8B feature flag. Set it for all CPUs excep [...] adds 75a7ab03dce [MSSA] Delete move ctor; remove dynamic never-moved verification adds 2026cdf8191 [instcombine] Add some todos, and arrange code for readibility adds 5fe84b487d3 [BasicAA] Reduce no of map seaches [NFCI]. adds 3735f24c9f1 [InstCombine] Add test case for PR41164. NFC adds e2493293d4b [ScalarizeMaskedMemIntrinsics] Reverse some if conditions t [...] adds a182adac957 Silence warning about unused variable in builds without ass [...] adds 230e46be77d [BasicAA] Use DenseMap::try_emplace after D59151. NFC adds 4d62ff1c152 [Object] Add basic minidump support adds bb304284b5d Attempt to fix modules build for r356652 adds dc564b2dd84 [RISCV][NFC] Remove old CHECK lines from linker-relaxation.s test adds 6fc33e0134d Fix two more issues with r356652 adds 942676365ee [SelectionDAG] Add scalarization of ABS node (PR41149) adds 4e86cb6e584 [AArch64] Allow -mattr=tpidr-el[1|2|3] adds 4d12ab485a4 Fix -Wmisleading-indentation gcc7 warning. NFCI. adds a047778b621 [AMDGPU] Support for v3i32/v3f32 adds 6325bddd1ee [Thumb] Fix infinite loop in ABS expansion (PR41160) adds 380737bf6db [llvm-readobj] Format codes. NFC. adds c4a68ddfbf2 [CodeGenPrepare] limit formation of overflow intrinsics (PR41129) adds 001665e9a86 [DAGCombine] SimplifySelectCC - call FoldSetCC with the set [...] adds 40750bcf02f [DAGCombiner] Use getTokenFactor in a few more cases. adds 146d3826a27 Fixup opt-remarks.ll gold plugin test. NFC adds 507cee06548 Add more rotate tests, including ORs of rotates adds 193bd01e7e7 [ValueTracking] Use ConstantRange based overflow check for [...] adds c1b79b3c594 [ScalarizeMaskedMemIntrin] Add support for scalarizing expa [...] adds 25aad6c4139 [X86] Don't avoid folding multiple use sign extended 8-bit [...] adds 8ff8e3360b4 [InstCombine] Don't transform ((C1 OP zext(X)) & C2) -> zex [...] adds 59371684659 [x86] add tests with movmsk potential (PR39665); NFC adds 983ff6b3594 [llvm-pdbutil] Add -type-ref-stats to help find unused type info adds d32d385c54b [X86] canonicalizeBitSelect - don't attempt to canonicalize [...] adds 8cdeab01bc6 [llvm-objdump] Support arg grouping for -j and -M (e.g. llv [...] adds 86e52fd5861 [AArch64] Update for Exynos adds a7ccf7e3fb0 Don't add a tail keyword to calls to ObjC runtime functions [...] adds e584761c228 GlobalISel: Fix RegBankSelect for REG_SEQUENCE adds e2867510499 Mips: Don't create copy of nothing adds 5bb6fe11909 Mips: Fix typo in assert message adds b79b3c81605 [Object] Fix reading objects created with -fembed-bitcode-marker adds 49e23dc657f [InstSimplify] Add tests for signed icmp of and/or; NFC adds e57e8cc2312 [X86] Use LoadInst->getType() instead of LoadInst->getPoint [...] adds 398ab5fe337 [AArch64] Split the neon.addp intrinsic into integer and fp [...] adds cfac065bea6 [X86] Autogenerate complete checks. NFC adds 527ff218843 [BPF] handle derived type properly for computing type id adds 4ff2529e870 [DWARF] Refactor RelocVisitor and fix computation of SHT_RE [...] adds 551e44401a9 [BPF] fix flaky btf unit test static-var-derived-type.ll adds 2d1b3fc82e2 [X86] Add 32-bit command lines with and without SSE2 to ato [...] adds aa5b4e00ae0 [RISCV][NFC] Expand test/MC/RISCV/linker-relaxation.s tests adds 7684aab92af [AMDGPU] Added v5i32 and v5f32 register classes adds 49e83838616 [RISCV][NFC] Add test case to MC/RISCV/linker-relaxation.s [...] adds 3c1091398ef [llvm-objcopy]Add support for *-freebsd output formats adds 76308dc543b [llvm-objcopy] - Implement replaceSectionReferences for Gro [...] adds 3cf84d2ef25 [llvm-objcopy] - Fix a st_name of the first symbol table entry. adds 9ac8aecbf9d [RISCV] Allow conversion of CC logic to bitwise logic adds d580c5bcede [RISCV] Optimize emission of SELECT sequences adds 631bc693f80 [RISCV] Add basic RV32E definitions and MC layer support adds acb922e7f80 Revert r356738 "[llvm-objcopy] - Implement replaceSectionRe [...] adds b73dcbc93a7 [llvm-objcopy]Add coverage for --split-dwo and --output-format adds 6e4d6c21043 [llvm-exegesis] Add clustering test. adds f0344750f20 [llvm-exegesis] Fix compilation before c++17. adds 2385b8e661e [ObjectYAML] Add basic minidump generation support adds 158b5b6e513 [SLPVectorizer] Add test related to SLP Throttling support, NFCI. adds c89bf6fdf36 [AMDGPU] Implemented dwordx3 variants of buffer/tbuffer loa [...] adds 795a6bf867e [AMDGPU] Use three- and five-dword result type in image ops adds ca31ee328d0 [x86] auto-generate complete checks for test; NFC adds d0581dfebde [x86] add 'nounwind' to tests to reduce noise; NFC adds 17f4c15fdb6 [x86] auto-generate complete test checks; NFC adds 6544903a2b7 [x86] auto-generate complete test checks; NFC adds 85f2850f159 [llvm-readobj] Separate `Symbol Version` dumpers into `LLVM [...] adds abfc7b07588 gn build: Merge r356729 adds 2943ef684f2 gn build: Merge r356652 (and follow-up r56655) adds 6e1d5e79bc9 gn build: Merge r356753 adds 5514b5c1f42 InstCombineSimplifyDemanded: Allow v3 results for AMDGCN bu [...] adds bb7534533b8 gn build: Merge r356692 adds bf41b04739e gn build: Merge r356662 adds cda5303cf21 gn build: Merge r356570 adds d6235de0339 gn build: Merge r356750 adds e10e2ecbf75 [Tests] Use valid alignment in masked.gather tests adds 2154ccb338d [llvm-readobj] Revert bad changes adds 5f2befefc9b [tests] Add tests for converting masked.load to load speculatively adds 3bd6d3eced9 [tests] Add a generic masked.gather test to show sometimes [...] adds b884c5db346 Make clang-move use same file naming convention as other tools adds 4b3e2db5d4d [ConstantFolding] Fix GetConstantFoldFPValue to avoid cast [...] adds 431bb12d06b [Tests] Add masked.gather tests for non-constant masks + sp [...] adds 5bfa50e0acb [AliasAnalysis] Second prototype to cache BasicAA / anyAA state. adds a8538579278 [X86] lowerShuffleAsBitMask - ensure float bit masks are th [...] adds ef29d0f46de [ValueTracking] Avoid redundant known bits calculation in c [...] adds 611d8efe442 [X86] Add PR13897 test case (i128 mul on i686) adds 556dfff610c [X86] Regenerate powi tests to include i686 x87/sse targets adds 6df50f4718c IR: Support parsing numeric block ids, and emit them in tex [...] adds 765f2feb7a4 [SLP] fix variables names in test; NFC adds 1c0548100e1 [ARM] [NFC] Use tGPR in patterns where appropriate. adds f00c21b122e [AArch64, ARM] Add support for Exynos M5 adds 314111b736a [KnownBits] Add const to some methods. NFC adds b1aec70893f Fix non-determinism in Reassociate caused by address coincidences adds 962427e90b0 [X86] Use movq for i64 atomic load on 32-bit targets when s [...] adds 93b589a73da [X86] Use xmm registers to implement 64-bit popcnt on 32-bi [...] adds 925f59138d8 [ARM] Don't form "ands" when it isn't scheduled correctly. adds ac90f79174e [TargetLowering] SimplifyDemandedBits trunc(srl(x, C1)) - e [...] adds 4cdbf5e60a3 Revert "[llvm-readobj] Separate `Symbol Version` dumpers in [...] adds 29d9e6a569a [pdb] Add -type-stats and sort stats by descending size adds 7057f99d389 [SLP] Remove redundancy of performing operand reordering tw [...] adds 6dbc6445b5f [TextAPI] TBD Reader/Writer adds e3637528865 Followup for r356820 to fix the bots. adds 557f47440a1 [Legacy][TimePasses] allow -time-passes reporting into a cu [...] adds ea60fd7de4f Disable MachO TBD write tests for Windows. adds 82921a136c1 [gn] Add clang-tools-extra/clang-tidy/tool/BUILD.gn adds 1fb71691edc [gn] Add clang-tools-extra/clang-tidy/tool/BUILD.gn adds d7f003c8175 [DebugInfo] follow up for "add SectionedAddress to DebugI [...] adds 5e19ff49092 [SLPVectorizer] Don't repeat VL.size() call. NFCI. adds 7f10b540617 [LowerSwitch] Use ConstantRange::fromKnownBits(); NFC adds cda52c36382 [SLPVectorizer] reorderInputsAccordingToOpcode - use Instru [...] adds 2b7218d3777 [x86] reduce code duplication; NFC adds 6feb429bab1 [X86][SLP] Show example of failure to uniformly commute spl [...] adds 79428c1e07d [DWARF] Delete a stray break and a stray comment. NFC adds a9d9dfd3ee4 Remove unused function argument. NFCI. adds 6f3ed8cfcfa Fix unused variable warning on non-asserts builds. NFCI. adds 025a2dcaff9 gn build: Add build files for modularize and pp-trace adds 5646c0a7922 gn build: Merge r356820 adds 61d184be596 [ConstantRange] Add getFull() + getEmpty() named constructors; NFC adds 8b8a0a78353 [llvm-objcopy] - Report SHT_GROUP sections with invalid alignment. adds 8731cd195cc [SLPVectorizer] shouldReorderOperands - just check for reor [...] adds d6a187abe9e [x86] improve the default expansion of uaddsat/usubsat adds d33d5ac7aab Recommit r356738 "[llvm-objcopy] - Implement replaceSection [...] adds ff5f64e4c8e [CGP] Make several static functions member functions (NFC) adds d4f7cbfea6a [X86][AVX] Start shuffle combining from ZERO_EXTEND_VECTOR_ [...] adds c74b7a530a7 [X86] Remove icmp undef from reduced tests adds 519434006fd [LegalizeDAG] Expand i16 bswap directly to a rotate by 8 in [...] adds f4baea281dc [WebAssembly] Rename a variable in CFGSort (NFC) adds 470391222b3 [X86][SSE41] Start shuffle combining from ZERO_EXTEND_VECTO [...] adds 90968934917 Revert r356688 "[X86] Don't avoid folding multiple use sign [...] adds 78b7d4a4920 [X86] Remove a couple unused SDNodeXForms. NFC adds 52df471d08b [X86] Remove GetLo8XForm and use GetLo32XForm instead. NFCI adds 83768b93ba5 [X86] When selecting (x << C1) op C2 as (x op (C2>>C1)) << [...] adds a8f354662a7 [X86] Update some of the getMachineNode calls from X86ISelD [...] adds fa60fe0a8f3 [ARM GlobalISel] 64-bit memops should be aligned adds a355fbf6808 [TTI] Move getIntrinsicCost to allow functions to be overri [...] adds 6e821f01513 Fix the build with GCC 4.8 after r356783 adds 75ebb082a21 [llvm-readobj] Separate `Symbol Version` dumpers into `LLVM [...] adds ce7cb683c29 [MIPS GlobalISel] Lower float and double arguments in registers adds f636c26bde8 [MIPS GlobalISel] Add floating point register bank adds af179cc68ee gn build: Let get.py keep zip file in memory instead of usi [...] adds a0a20fdec38 gn build: Clean up README.rst a bit adds 29ab38eb24e [MIPS GlobalISel] Select copy for arguments from FPRBRegBank adds b05515fb570 [llvm-objcopy] - Refactor the code. NFC. adds f694319233c [clang-tidy] Separate the check-facing interface adds 198d1a1ac38 [DebugInfo] IntelJitEventListener follow up for "add Sectio [...] adds dabd4d53f4e [RegAlloc] Simplify MIR test adds af815f178f7 MinidumpYAML.cpp: Fix some code standard violations missed [...] adds c72a66877f3 Python 2/3 compat: queue vs Queue adds 8ee86696d74 Revert 356905 adds ce23689b40c [SLPVectorizer] reorderInputsAccordingToOpcode - remove non [...] adds 2b324fde545 [x86] add tests for vector zext; NFC adds acd323e334a [SLPVectorizer] Update file missed in rL356913 adds ea6301340f3 [llvm-objcopy]Preserve data in segments not covered by sections adds 6375a63fcb5 AMDGPU: Preserve LiveIntervals in WQM adds 08e5a720011 merge-request.sh: Update 8.0 metabug for 8.0.1 adds 58dc6ce2d06 MISched: Don't schedule regions with 0 instructions adds 987a6ac4c90 Moved everything SMT-related to LLVM and updated the cmake [...] adds c21c57c8aab [x86] add another vector zext test; NFC adds 30cc7c81306 [CGP] Build the DominatorTree lazily adds 92948ec17b6 [SelectionDAG] Add icmp UNDEF handling to SelectionDAG::FoldSetCC adds f36ee139a4c [SLPVectorizer] Merge reorderAltShuffleOperands into reorde [...] adds 428cbbbec8d [llvm] Prevent duplicate files in debug line header in dwarf 5. adds ba71b832d8e AMDGPU: Add support for cross address space synchronization scopes adds 45fd445aa04 [LLVM-C] Add binding to look up intrinsic by name adds a81909135b7 Revert "[llvm] Prevent duplicate files in debug line header [...] adds d8ebe2971a8 AMDGPU: Set hasSideEffects 0 on _term instructions adds 5a21fcdefdf [AArch64] Prefer "mov" over "orr" to materialize constants. adds 84bcf68f02e AMDGPU: Make collapse-endcf test more useful adds 70b19478024 AMDGPU: Remove unnecessary check for isFullCopy adds b2435c6b835 Revert "AMDGPU: Scavenge register instead of findUnusedReg" adds 9d623293905 [x86] add tests for vector cmps; NFC adds fee8cc83e82 [ARM] Add missing memory operands to a bunch of instructions. adds 35fcd18d433 X86AsmParser: Do not process a non-existent token adds 729de3f3e50 X86Parser: Fix potential reference to deleted object adds f8d08c1318f [X86] Remove unneeded FIXME. NFC adds 0f2a0d18473 [X86] In matchBitExtract, if we need to truncate the BEXTR [...] adds 57810eb46e5 [X86] In matchBitExtract, place all of the new nodes before [...] adds 1acf70e7f7c [ADT] Update SmallVectorTest.EmplaceBack tests after rL356312 adds 5b28ef618da [llvm-dlltool] Set a proper machine type for weak symbol ob [...] adds 286540be1a0 [ARM][Asm] Accept upper case coprocessor number and registers adds 0a995825115 [TableGen] Give meaningful msg for def use in multiclass adds e2084b7bc1c [TableGen] Let list elements have a trailing comma adds 6bb5006d9eb Fix nondeterminism introduced in r353954 adds 3ae58c3794f [TargetLowering] Add SimplifyDemandedBits support for ISD:: [...] adds 11a3b129416 [RISCV] Improve codegen for icmp {ne,eq} with a constant adds 1b75f131c67 Moved body of methods dump to .cpp file to fix compilation [...] adds de6ac6d2115 [DAG] Avoid smart constructor-based dangling nodes. adds 6919cecfc3c [SystemZ] Remove LRMux pseudo instruction. adds 0e7b2400f2d Test commit: fix typo adds 6db31ea72b9 [MCA] Correctly update the UsedResourceGroups mask in the I [...] adds b9eb67aedbf [RISCV] Update setcc-logic.ll codegen test adds 2626e5e9d36 [llvm-exegesis] Allow the target to disable the selection o [...] adds 544ab1fb884 [InstCombine] update tests to use FileCheck; NFC adds 2cdd5b4ce00 [InstCombine] add tests for uaddsat using min; NFC adds 76db59c4bed [WebAssembly] Fix bugs in BLOCK/TRY placement adds 15e0c2b138b [WebAssembly] Fix a bug when mixing TRY/LOOP markers adds 32053eb34f4 [WebAssembly] Support WebAssemblyFunctionInfo serialization adds fa1a7df2eb7 [WebAssembly] Add CFGStacikfied field to WebAssemblyFunctionInfo adds 9551a638127 [InstCombine] form uaddsat from add+umin (PR14613) adds 4162568d853 [InstCombine] Add tests for ssubo X, C -> saddo X, -C; NFC adds cf76d444117 [ConstantRange] Fix outdated comment; NFC adds 0d02e66ea8c [WebAssembly] Don't analyze branches after CFGStackify adds dca7346ad9a [llvm-objcopy] - Strip sections before symbols. adds d42f155408b [llvm] Reapply "Prevent duplicate files in debug line heade [...] adds 10ee5d422df gn build: Merge r356929 (effectively relands r353518, rever [...] adds f50526b2702 gn build: Format all build files adds 23fe8db89f1 [WebAssembly] Initial implementation of PIC code generation adds 02bbadc9236 Revert "[llvm] Reapply "Prevent duplicate files in debug li [...] adds 9d733a24e0d [PowerPC] Remove UseVSXReg adds be69330b8e7 [SDAG] add simplifications for FP at node creation time adds 7fce37e34d0 [LiveRange] Reset the VNIs when splitting subranges adds 2c0f7249077 [PPC] Refactor PPCBranchSelector.cpp adds 285454654d9 [cmake] Reset variable before using it adds dcc0d9395da [ConstantRange] Exclude full set from isSignWrappedSet() adds 7b016165658 gn build: Add build files for clang-include-fixer and find- [...] adds 0c810b46bd8 [Remarks] Emit a section containing remark diagnostics metadata adds c43e709630f [X86] Simplify some code in matchBitExtract by using ANY_EXTEND. adds 26c53b87aad [X86] Autogenerate complete checks. NFC adds d1b34e99f68 [NFC][PowerPC] Custom PowerPC specific machine-scheduler Th [...] adds c760298a35c [X86] When iselling (x << C1) and/or/xor C2 as (x and/or/xo [...] adds 6ba87d01dcd [X86] Add test cases for missed opportunities in (x << C1) [...] adds add25ee3712 [llvm-dwarfdump] Simplify -o handling adds 6ae1aaade9d [DAGCombiner] Don't allow addcarry if the carry producer i [...] adds c2d3bf630c3 [DWARF] Simplify DWARFVerifier::handleDebugAbbrev. NFC adds 650dceb82e2 [DWARF] Add D to Seen early to avoid duplicate elements in [...] adds fc9fa6d5145 Revert rL356864 : [X86][SSE41] Start shuffle combining from [...] adds a7d2ce06791 [Support] MemoryBlock size should reflect the requested size adds 9696991bd8e [AArch64] Adds cases for LDRSHWui and LDRSHXui to getMemOpInfo adds 1ac40fdf4d0 [X86][SSE] Add shuffle test case for PR41249 adds f49a51bff0d [AMDGPU][MC] Corrected handling of tied src for atomic retu [...] adds 26882c9d258 [AArch64] NFC: Cleanup isAArch64FrameOffsetLegal adds aaa3361678a The IR verifier currently supports the constrained floating [...] adds 7d583cafa64 Revert of 357063 [AMDGPU][MC] Corrected handling of tied sr [...] adds 939c1838410 Re-commit r355490 "[CodeGen] Omit range checks from jump ta [...] adds 269bbd151f0 [DAGCombine] Refactor GatherAllAliases. NFCI. adds 30d97334435 [DAGCombiner] Unify Lifetime and memory Op aliasing. adds b23265474e7 gn build: Merge r357047 adds f46cbbae71a AMDGPU: Fix areLoadsFromSameBasePtr for DS atomics adds 15b78418a41 [MCA][Pipeline] Don't visit stages in reverse order when ca [...] adds 88220ed3cb2 [X86MacroFusion][NFC] Improve macrofusion testing. adds 85ad8db97e9 [BPF] use std::map to ensure consistent output adds 17f72131c2b AMDGPU: wave_barrier is not isBarrier adds 47101319272 MIR: Freeze reserved regs after parsing everything adds 68048d45d3f AMDGPU: Don't hardcode num defs for MUBUF instructions adds 77362bcbc4c [MCA] Fix -Wparentheses warning breaking the -Werror build. adds 9859759f10a PEI: Delay checking requiresFrameIndexReplacementScavenging adds 86a3d313e81 New methods to check for under-/overflow in the SMT API adds 502b049dcb5 AMDGPU: Fix missing scc implicit def on s_andn2_b64_term adds 99267d8b98c AMDGPU: Skip debug_instr when collapsing end_cf adds 44ee20512e2 AMDGPU: Add additional MIR tests for exec mask optimizations adds 0755a8d19c5 AMDGPU: Enable the scavenger for large frames adds d0d95f2d771 [AArch64][SVE] Asm: error on unexpected SVE vector register [...] adds 5a4d4416339 [PeepholeOpt] Don't stop simplifying copies on sequence of subregs adds 35912b770f3 [X86] Add post-isel pseudos for rotate by immediate using S [...] adds 5503f81d14f AMDGPU: Add testcase I meant to merge into r357093 adds 50359ffe2c4 Reapply "AMDGPU: Scavenge register instead of findUnusedReg" adds 3cf6f94e456 [X86MacroFusion][NFC] Add a bulldozer test. adds a3e702346ea [GlobalISel] Fix legalizer artifact combiner from crashing [...] adds a600eb60fd4 [InstCombine] Use uadd.sat and usub.sat for canonicalization adds 53202c3a192 RegPressure: Fix crash on blocks with only dbg_value adds 906b31a972f [opt-viewer] Make filter_=None by default in get_remarks an [...] adds faf8d9472da [ConstantRange] Rename isWrappedSet() to isUpperWrapped() adds 758238e94e8 [AArch64][GlobalISel] Make G_PHI of v2s64, v4s32, v2s32 legal. adds 953adb2fe49 [ARM] Don't confuse the scheduler for very large VLDMDIA etc. adds 8647448aa79 [opt-viewer] Teach optrecord.py about !Failure tags adds 9af297cc57f [CGP] Reset DT when optimizing select instructions adds 58c0bdde21e [ConstantRange] Add isWrappedSet() and isUpperSignWrapped() adds b4adfc21eb7 Revert r356996 "[DAG] Avoid smart constructor-based danglin [...] adds 631103abab3 [WebAssembly] Add some whitespace to WebAssemblyFixIrreduci [...] adds fe1d125738e Fix llvm-rc tests. adds 96afa5b3acd [ConstantRangeTest] Add exhaustive intersectWith() test adds c466f32ecf0 [LegalizeVectorTypes] Allow single loads and stores for mor [...] adds 65068d00d37 [DAGCombiner] Teach TokenFactor pruning to peek through lif [...] adds 6232f1e06cb test/CodeGen/X86/codegen-prepare-replacephi.mir requires a [...] adds 3f408719350 [X86ISelDAGToDAG] Move initialization of OptForSize and Opt [...] adds 8e4afeb5ff6 [x86] look through bitcast operand of MOVMSK adds 6e543a2c825 [x86] improve AVX lowering of vector zext adds bb290ef8606 [ARM] Remove dead function ARMMCCodeEmitter::getSOImmOpValue adds c6e896237f6 [X86] Add test cases from PR27202. adds 1cb1b303682 [NewPM] Fix a nasty bug with analysis invalidation in the new PM. adds 6d179d64d12 Fix typoed variable name. adds 28d5e13c110 Add reproduction instructions to llvm-objdump's embedded so [...] adds 0c6b3a0db8e [WebAssembly] Rename wasm fixup kinds adds f720a4c5e32 SafepointIRVerifier port to new Pass Manager adds 0fed39d67c2 SafepointIRVerifier port to new Pass Manager adds b6bb254aa4b [SelectionDAG] Add 2 tests for selection across basic blocks adds 98ccb482640 [llvm-exegesis] Introduce a 'naive' clustering algorithm (PR40880) adds 51a43ae6d59 [ARM GlobalISel] Fix selection of G_SELECT adds b94dc88e01c [ARM GlobalISel] Fix G_STORE with s1 adds 64e54ce13ec [X85][AVX] Add missing vXi16 broadcast fold patterns adds 3259337afd5 [VPlan] Determine Vector Width programmatically. adds d12f22c35af [asan] Add options -asan-detect-invalid-pointer-cmp and -as [...] adds 04fe7bcdd5b [yaml2obj][obj2yaml] - Teach yaml2obj/obj2yaml tools about [...] adds 5dc7f24f6a4 [ARM GlobalISel] Run regbankselect test for Thumb. NFCI adds d9e2ef1edc3 [DAGCombiner] Fold truncate(build_vector(x,y)) -> build_vec [...] adds e84f5aaedfe [llvm-readobj] Add new helper function `getSymbolVersionByIndex()` adds 6717b4e616a - Addressed @jhenderson 's comments - Format patch adds 461a7ee6493 - Addressed comments adds 5df438c9980 [NFC] Format InlineFeatureIgnoreList. adds 60eba9fc37f [X86] AMD Piledriver (BdVer2): fine-tune some latencies adds a88dcdbff22 AMDGPU: Make exec mask optimzations more resistant to block splits adds 60639d89eb6 [X86MacroFusion] Handle branch fusion (AMD CPUs). adds 629c6da2016 [x86] avoid cmov in movmsk reduction adds 53583ed1d71 [Documentation] Proposal to change variable names adds 8c243de4d17 [AMDGPU] Clarify Code Object V2/V3 differences in AMDGPUUsage adds f3dc6d4c200 [x86] add vector test for sext of negate; NFC adds e540281a26f [DAGCombiner] fold sext into negation adds 1e93deac15b [DAG] Fix Lifetime Node ID hashing. adds 4b1adb005fa Add "git llvm revert" and "git llvm svn-lookup" subcommands adds 5c4309d4544 gn build: Add some build files for clangd adds fbfa7eae2fa [MIPS GlobalISel] Select float constants adds 6ec2ba75e9f Make helper functions static. NFC. adds f290220c22d Delay initialization of three static global maps, NFC adds 7144be6b918 [X86] Teach the isel optimization for (x << C1) op C2 to (x [...] adds d7f746ca03b [llvm-objcopy][NFC] Move ELF-specific logic into /ELF/ directory adds 99f3ad037d9 Temporarily revert "SafepointIRVerifier port to new Pass Ma [...] adds 079ca3ecabd [SLP][X86] Add tests showing failure to commute icmp/fcmp operands adds 7cf515b63a8 [SLP][X86] Add tests showing failure to commute icmp/fcmp b [...] adds 7f1051e1fa3 [MemDepAnalysis] Allow caller to pass in an OrderedBasicBlock. adds ba97e8711be [DSE] Preserve basic block ordering using OrderedBasicBlock. adds 8ddcd41f4c3 Revert [DSE] Preserve basic block ordering using OrderedBas [...] adds 1dc854412ed [InterleavedAccessPass] Don't increase the number of bytes loaded. adds bd45c9fec1a [SelectionDAGBuilder] Fix 80 column violation. NFC adds 589b088809b [MC] Fix floating-point literal lexing. adds 97a1792e121 [BPF] add proper multi-dimensional array support adds 584d3b78abd [LSR] Fix signed overflow in GenerateCrossUseConstantOffsets. adds 06a5e33b71e Update lit config for ld.lld command to match "ld.lld" ins [...] adds a66a0bff833 [yaml2obj] Fixing opening empty yaml files. adds 074bfaec2b1 [llvm-readobj] Fix formatting of unknown note types adds 35945918f02 Recommit "[DSE] Preserve basic block ordering using Ordered [...] adds 6d7e6d99405 [WebAssembly] Merge used feature sets, update atomics linka [...] adds ec4b385c77a Revert Recommit "[DSE] Preserve basic block ordering using [...] adds 4cf89de5612 [llvm-readobj] Change variable names to match LLVM-style. NFC. adds 56e8d40dd05 gn build: Add check-clang-tools to run clang-tools-extra lit tests adds fc1bf1b19aa [PowerPC] Strength reduction of multiply by a constant by s [...] adds 768023a783f AMDGPU/GlobalISel: Insert waterfall loop for vector indexing adds 18896e646b4 Test commit. Fix typo. adds b149dcc9a00 [llvm-objcopy] Delete two redundant reinterpret_cast. NFC adds f88426dac5f [ScheduleDAG] Move `Topo` and `addEdge` to base class. adds 16c4a8836b5 [PowerPC] Add the support for __builtin_setrnd() adds 8c3557f6d71 [SLP] Add support for swapping icmp/fcmp predicates to perm [...] adds 57009e01a2f [X86] Add X86TargetLowering::isCommutativeBinOp override. adds 93684e33a75 [NFC][llvm-exegesis] Refactor Analysis::SchedClassCluster:: [...] adds 28eed06d087 [llvm-readelf]Merge dynamic and static relocation printing [...] adds 142ef796c01 AMDGPU: Make sram-ecc off by default for Vega20 adds 3f27fbb514a [MCA] Add an experimental MicroOpQueue stage. adds 8617a128fcd [AMDGPU][MC] Corrected handling of tied src for atomic retu [...] adds bf3362c6493 [x86] add tests for decrement+sext; NFC adds 03b3201cc29 Switch lowering: exploit unreachable fall-through when lowe [...] adds 2c4f9d155df [DAGCombiner] fold sext into decrement adds 6ec888ac384 [DAGCombine] Improve Lifetime node chains. adds 38c33b6d667 Recommit "[DSE] Preserve basic block ordering using Ordered [...] adds 61dd1946942 [DAGCombiner] simplify shuffle of shuffle adds 6bd5429ddf5 [NFC][llvm-exegesis] Refactor ResolvedSchedClass & friends adds b44e4a67c71 gn build: Merge r357259 adds 755ffc48b16 gn build: Merge r357248 adds a33ed9cfece [AMDGPU][MC] Corrected conversion rules for inlinable const [...] adds 1dce0320b60 [NFC][llvm-exegesis] Also promote getSchedClassPoint() into [...] adds 5a3c3d47746 [mips] Fix lowering a signed immediate for *.d MSA instructions adds 4086f0cda4e [llvm-objcopy] Fix case style of LayoutSegments. NFC adds 8678b086003 [SLP] Add support for commutative icmp/fcmp predicates adds 48c5a4e8c20 [llvm-readelf] Allow prefix flags for -p and -x adds 745934cdb6c [llvm-readobj] Add some generic notes (e.g. NT_VERSION) adds 0509fb6a5d7 [InstCombine] move shuffle canonicalizations before other t [...] adds 2d874dc21eb [X86] Fix some tests using fcmp with undef arguments adds cbcef203c26 [DAG] Set up infrastructure to avoid smart constructor-base [...] adds e5ec07fa486 [CodeGen] Refactor the option for the maximum jump table size adds 2a7633ae4de [ARM] Regenerate vector comparison tests adds d3c5ebd041d [DAGCombine] Prune unnused nodes. adds ada6a9f0b15 [llvm][NFC] Factor out logic for getting incoming & back Lo [...] adds 6f2f494ae1b [AArch64] Regenerate half precision tests adds c9da8c17e6e [InstCombine] regenerate test checks; NFC adds 6209ea9ff71 [AMDGPU] Add an additional Code Object V3 assembler example adds 83baf5e232e [InstCombine] autogenerate complete checks; NFC adds 7de2c6d90dc [ARM] Regenerate execute-only float comparison tests adds b5762155f70 [MIPS] Regenerate double constant comparison test adds 93cb35b4177 [SystemZ] Regenerate double constant comparison test adds 1d4a7a02282 [X86] Use cached OptForSize in X86ISelDAGToDAG.cpp instead [...] adds b1825c3ad88 [DAG] Avoid redundancy in StoreMerge TokenFactor generation. adds 08abe8c31a4 [X86] Add test cases showing failure to use RMW form of neg [...] adds 966d4dc9697 [Hexagon] Remove fcmp undef from reduced tests adds 234b3a117e8 AMDGPU: Remove dx10-clamp from subtarget features adds 2dbff99e43a [WebAssembly] Handle END_LOOP in unreachable BB in CFGStackify adds f8ac9101a17 [DAGCombiner] Rewrite ImproveLifetimeNodeChain to avoid DAG loop. adds fa9876ca9d5 [MemorySSA] Don't optimize incomplete phis. adds b54364c18e8 [X86] When using Win64 ABI, exit with error if SSE is disab [...] adds f125a4c08ec [GlobalISel][AArch64] Add isel support for G_INSERT_VECTOR_ [...] adds 714da7944c4 [MemorySSA] Limit clobber walks. adds 12e624f2514 [SCEV] Check the cache in get{S|U}MaxExpr before doing any work adds 0ef436534eb [WebAssembly] Add mutable globals feature adds 9d13c903f70 Try to fix buildbot error adds d266d2b04f8 [MemorySSA] Temporary fix assert when reaching 0 limit. adds 0871289fd9e [LoopPredication] Use the builder's insertion point everywh [...] adds 7bbe85d3671 [LoopPredication] Remove stale TODO adds a61db08d2e8 [Support] Implement is_local_impl with AIX mntctl adds 9a44b1fdb4a [WebAssembly] Optimize the number of routing blocks in FixI [...] adds bce08cb615b [cmake] Remove use of deprecated generator expression. NFC adds d0a191c33cf [RISCV][NFC] Remove floating point operations from test/Cod [...] adds cc6227998a6 Adds `-ftime-trace` option to clang that produces Chrome `c [...] adds bf8e0ff80de [RISCV] Add DAGCombine for (SplitF64 (ConstantFP x)) adds cc037ac6e20 [WebAssembly] Run ExplicitLocals pass after CFGStackify adds 6ed15740eff [WebAssembly] Fix unwind destination mismatches in CFG stackify adds 7a9f4e0242a [X86][SSE] Add PAVG test case from PR41316 adds 4fd25f1573d [llvm-objcopy] Replace the size() helper with SectionTableR [...] adds 0eee80f4d16 [cmake] Change deprecated $<CONFIG> to $<CONFIGURATION>. NFC adds 63aa91b16e8 [X86][SSE] detectAVGPattern - begin generalizing ADD matches adds 4678d95278c [RISCV] Add RV64 CHECK lines to test/CodeGen/RISCV/vararg.l [...] adds 7c2aa8385bd [X86][SSE] detectAVGPattern - Match zext(or(x,y)) 'add like [...] adds 62531b9ae12 [RISCV] Add codegen support for ilp32f, ilp32d, lp64f, and [...] adds 1378f64cc54 [X86] Teach isel for RMW binops to handle negate adds c6c65fd7020 [MIPS] Remove fcmp undef from reduced test adds 7598a01597f [SystemZ] Remove fcmp undef from reduced test adds 911aef5e01f gn build: Merge r357326 adds 561ba978294 gn build: Merge r357340 adds f57a892ba82 [NFC][InstCombine] Add tests for combining icmp of no-wrap [...] adds 129c32597bb SafepointIRVerifier port to new Pass Manager adds d39afb2c98c fix typo: "\t" => " " adds 3a12f8f3d29 [InstCombine] canonicalize select shuffles by commuting adds 9236537dd34 [x86] allow movmsk with 2-element reductions adds f35570857d5 [InstCombine] add tests for inverted select-shuffles + bino [...] adds a11754154dd gn build: Add build files for most clang-tools-extra unit tests adds def747f20c2 [RISCV] Don't evaluatePCRelLo if a relocation will be force [...] adds d5ac9266f65 [X86] Use ISD::INTRINSIC_VOID in getTgtMemIntrinsic for tru [...] adds 6bc72be0f5a [RISCV] Add seto pattern expansion adds aa17acd486f [X86][SSE] Add fcmp constant folding tests adds b15b5bb2214 [X86] Fix a test from r357317 adds a8661e7ad43 [X86MacroFusion][NFC] Add more tests. adds fbbab5a6b01 [InstCombine] eliminate commuted select-shuffles + binop (PR41304) adds 6c96df59082 [X86] Make post-ra scheduling macrofusion-aware. adds 75216a6dbcf [InstCombine] Handle vector gep with scalar argument in eva [...] adds b52beb74975 InstSimplify: Add baseline test for upcoming change adds c45a79becff Revert "[InstCombine] Handle vector gep with scalar argumen [...] adds 46c1976bb09 X86: Fix override warning adds 74746501d3a [InstCombine] Handle vector gep with scalar argument in eva [...] adds b602cf0752d [AArch64] Add v8.5-a Memory Tagging GMID_EL1 register adds 2e53035953b [RISCV] Generate address sequences suitable for mcmodel=medium adds d2fa304a073 [AArch64] Add v8.5-a Memory Tagging STGM/LDGM instructions adds 415b5e48b63 [RISCV] Attach VK_RISCV_CALL to symbols upon creation adds b9913c3ee52 [AArch64] Add v8.5-a Memory Tagging STZGM instruction adds a7bc052caeb gn build: Merge r357383 adds fcc236c2688 [AMDGPU] Pre-allocate WWM registers to reduce VGPR pressure. adds cef44950115 [Tests] Add tests for a possible loop predication transform [...] adds aa5782c6300 [Tests] Autogen all the LoopPredication tests adds 071b5c0eb53 [LoopPred] Delete the old condition expressions if unused adds 627d3461481 [NVPTX] Fix the codegen for llvm.round. adds a3d1fd25352 [LoopPred] Be uniform about proving generated conditions adds b6f0eccc0b6 Commit accidentally omitted test case. adds a15fff454ff [SLP] getGatherCost and isFullyVectorizableTinyTree are con [...] adds f06123b2a8c [SLP] getVectorElementSize and isTreeTinyAndNotFullyVectori [...] adds 7177f4e661e [llvm-objcopy] Add --keep-symbols option adds ad17d850c74 [X86] Classify the AVX512 rounding control operand as X86:: [...] adds 7ebc1626961 Not all blocks are reachable from entry. Don't assume they are. adds 59ed9c6f41b [NFC] Remove dead parameter "FreeInLoop", fix some typos an [...] adds 89c3e78e374 [AArch64][GlobalISe] Select STRQui for stores into v264s in [...] adds 4513bbfe099 [LoopPred] Rename a variable to simply a future patch [NFC] adds 271788f596c [ARM] Don't try to create "push {r12, lr}" in Thumb1 at -Oz. adds 95e6c7dccea [ARM] Optimize expressions like "return x != 0;" for Thumb1. adds 30c1233cb59 AMDGPU: Fix test filename adds c23ae47bcb5 [AMDGPU] Add more test cases of D59608. adds a5dc7cad203 InstSimplify: Add missing case from r357386 adds 09594bace81 [X86] Use unsigned type for opcodes throughout X86FixupLEAs. adds 5037de9b9ea [X86] Autogenerate complete checks. NFC adds 35d264ee4b3 [X86] Add test cases to fixup-lea.ll for optsize and no siz [...] adds d5c86e9e6dd Add an optional list of blocks to avoid when looking for a [...] adds 2f2c88671c4 [LoopPredication] Simplify widenable condition handling [NFC] adds 8abcd764922 SimplifyCFG SinkCommonCodeFromPredecessors: Also sink funct [...] adds 5377f1995b0 [Internalize] Replace fstream with line_iterator for -inter [...] adds 8c3a3205cc8 [Internalize] Replace uses of std::set with DenseSet adds 74a4fc7f9d9 Enforce StackID definition in PEI adds 64bce2ddd40 [X86][AVX] Add test case showing failure to fold broadcast [...] adds c47e98d58f8 Add minidump support to obj2yaml adds 58692f8b407 [RISCV] Support assembling @plt symbol operands adds 8e01364bcac [ObjectYAML] Fix build issue adds 7ce65e1e74c [mips] Use AltOrders to prevent using odd FP-registers adds 9306f8ece7c [mips] Remove the override of the `isMachineVerifierClean()` adds 925602b5883 [llvm-objcopy]Allow llvm-objcopy to be used on an ELF file [...] adds e3e62b426cb gn build: Add build files for non-framework xpc clangd bits adds 73c045c7bec gn build: Merge r357469 adds b0d0b07731e [Transforms] Redundant getValueOperand (NFC) adds 1d777c335fd [SystemZ] Improve instruction selection of 64 bit shifts a [...] adds 5fc1c8d59b3 [PruneEH] Don't split musttail call from ret adds 2b32e0123f5 [SampleProfile] Repeat indirect call promotion only when th [...] adds 85027ee6560 [SimplifyCFG] Don't split musttail call from ret adds f66e62013a3 [cmake] Add function for building native tool adds e2968869008 [llvm-shlib] Fix cross-compilation for LLVM-C adds 948cc167892 [BPF] Replace fstream and sstream with line_iterator adds 81ead47d203 [SLP] reorderInputsAccordingToOpcode is const method. NFCI. adds b9af20dec1e [llvm-objcopy] Change SHT_NOBITS to SHT_PROBITS for some -- [...] adds 4bbb5efb815 [WideableCond] Fix a nasty bug in detection of "explicit guards" adds d5258b69854 [PowerPC] Fix reversed bit issue in DCMX mask for "xvtstdcd [...] adds cb181675d0e [X86] Allow FixupLEAs to form INC/DEC under OptSize not jus [...] adds 18a97456ac9 [DAGCombiner] reduce code duplication; NFC adds 3bc14040b50 [DebugInfo] Fix pr41180 : Loop Vectorization Debugify Failure adds 9f961da60ec [ArgPromotion] Set debug location at updated callsites adds f17d75e4cd8 [Remarks][NFCI] Remove useless include adds 66a0671770e [InstCombine] Added tests for PR41273 adds 32af43a9664 [FileCheck] Fix FileCheck.cpp compilation on Solaris adds 976ddacc4f9 [AArch64][GlobalISel] Select llvm.aarch64.stlxr(i64, i64*) adds ceabbb96bfa [InstCombine] Simplify ctlz/cttz with bitreverse adds 979d67d9524 [InstCombine] Added tests for PR41337 adds c412e2ac4ba [x86] add more tests for FP scalarization; NFC adds e7c3224a483 [TableGen] Properly calculate the minimum size needed or Co [...] adds ddaa6290bad [X86] Check MI.isConvertibleTo3Addr() before calling conver [...] adds 4babc48b059 [X86] Mark the default case of the X86InstrInfo::convertToT [...] adds 3ce39390c1c [COFF] Reduce the size of Chunk and SectionChunk, NFC adds 3d75155bb34 X86: regenerate speculative-load-hardening-indirect.ll tests. NFC. adds b3e5d54b53e [GlobalISel] Add IRTranslator support for llvm.stacksave an [...] adds d833ca999e4 AMDGPU: Don't use the default cpu in a few tests adds 14c192770d3 AMDGPU: Fix names for generation features adds 581e35dc2de AMDGPU: Remove unnecessary subtarget get adds 7e027f0f2d0 [X86] Autogenerate complete checks. NFC adds 96d65a29e3d [X86] Update the test case for v4i1 bitselect in combine-bi [...] adds 3207e11ca32 [WebAssembly] Remove unneeded target operand flags adds 45c5050e902 InstSimplify: Fold round intrinsics from sitofp/uitofp adds 683212b71c5 [WebAssembly] Add Emscripten OS definition + small_printf adds cd3a8dda108 AMDGPU: Assume ECC is enabled by default if supported adds 6cc7426c149 Fix TargetLibraryInfoTest.ValidProto after rL357552 adds 68e1cfff749 [PowerPC]add testcase for ppcctrloops pass shortloop check adds b93479a910e Revert r357256 "[DAGCombine] Improve Lifetime node chains." adds 1e8e0fd0ea5 [InstCombine] Simplify ctpop with bitreverse/bswap adds 6aeb816708b [X86][NFC] Add tests for misched macro-fusion. adds 3de8eca299b [X86] Make the post machine scheduler macrofusion-aware. adds 512c922d040 [mips] Remove unused FGRH32 register class. NFC adds 9337d5b41f4 [DAGCombine] Don't use getZExtValue() until we know the con [...] adds e15cdb283c1 [X86] Regenerate LEA codegen tests adds 8878856e8fd gn build: Add build files for clangd xpc framework code adds 854aaa0bbe1 [llvm-nm]Add support for --no-demangle adds 9b4a5209aaa [llvm-readobj] Add GNU style dumper for .gnu.version section adds e0e9078d54d [DAGCombiner] loosen restrictions for moving shuffles after [...] adds 81f6b42c595 AMDGPU: Fix copy/paste error in intrnsic comment adds 5ad49e729c0 [AArch64] Update v8.5a MTE LDG/STG instructions adds d98749c59f2 [MIPS GlobalISel] Select floating point arithmetic operations adds f793291e8be [x86] add tests with constants for FP scalarization; NFC adds 4e6b00fa2c5 [llvm-objcopy] Make section rename/set flags case-insensitive adds 1ce9ddff790 [x86] add tests with constants for FP scalarization; NFC adds 1cb99611c4a [x86] add negative tests for FP scalarization; NFC adds e75d281205b [x86] remove duplicate tests adds f576f8bf7d8 [NFC] Address missed review comment for test adds 26db7fb2ec3 [yaml2obj][obj2yaml] - Change how symbol's binding is desci [...] adds 909ca0c8afd [SystemZ] Improve codegen for certain SADDO-immediate cases adds a8e45ca58d1 [llvm-readobj] - Fix 2 test cases. adds 7bfdfb1677b Test commit: Remove double variable assignment adds 2ef9e5016e4 [DAGCombiner] Rename variables Demanded -> DemandedBits/Dem [...] adds f61078e3558 [x86] make stack folding tests immune to unrelated transforms; NFC adds b68b542b758 [AArch64][GlobalISel] Legalize G_FEXP2 adds b1e750e1628 [DWARF] check whether the DIE is valid before querying for [...] adds 240c4fac7b4 [X86][AVX] combineHorizontalPredicateResult - support v16i1 [...] adds 1b7bd368ad4 [X86][AVX] combineHorizontalPredicateResult - split any/all [...] adds fdaddf472ee [X86] Extend boolean arguments to inline-asm according to g [...] adds c83e8408b5f AMDGPU/NFC: Add offset field to arg metadata (required for [...] adds 5c7b7d7261b gn build: Add build file for dexp adds 172ff13310a [ProfileSummary] Count callsite samples when computing tota [...] adds c28b42a53dc [dwarfdump] Remove bogus verifier error adds c90f4e79b92 [x86] add test for disguised horizontal op; NFC adds 7a6ef300465 AMDGPU: Split block for si_end_cf adds bdebcba459c [x86] add another test for disguised h-op; NFC adds 67820173178 [IR] Create new method in `Function` class (NFC) adds 5e398234dd2 [x86] eliminate movddup of horizontal op adds 92604432b4a [x86] fold shuffles of h-ops that have an undef operand adds 2ca31392986 llvm-cxxfilt: Demangle gcc "old-style unified" ctors and dtors adds 61d2657ecc9 llvm-undname: Fix a crash-on-invalid adds d05c59d5f94 llvm-undname: Fix an assert-on-invalid adds 79f7028ca6a llvm-undame: Fix an assert-on-invalid adds c8d28c5350f llvm-undname: Fix a crash-on-invalid adds 531103ab94b [X86] Autogenerate checks. NFC adds 7fef98e0757 [X86] Remove dead CHECK lines for a test. NFC adds 364edc291c5 [X86] Remove CustomInserter pseudos for MONITOR/MONITORX/CL [...] adds 21c63d584f9 llvm-undname: Name a pair. No behavior change. adds 07a9ff8d1e7 Make ManagedStatic constexpr constructible adds c89c2803c31 Fix minor innaccuracy in previous comment on ManagedStaticBase adds 27775cd11be [codeview] Remove Type member from CVRecord adds bd7054fe092 [X86] Remove CustomInserters for RDPKRU/WRPKRU. Use some cu [...] adds fe2046590d7 [gn] Use "$link /lib" for archives instead of lib.exe adds 7582b90456e [AIX] SelectionDAGNodes.h: Pack bit-fields that are meant t [...] adds 144d4899a3c [Support] On AIX, Check ENOTSUP on posix_fallocate instead [...] adds e09c4ccc48c [XCOFF] Add functionality for parsing AIX XCOFF object file [...] adds c7257487123 [WebAssembly] EmscriptenEHSjLj: Don't abort if __THREW__ is [...] adds 0d753d008ee gn build: Merge r357663 adds a8e2ae4a637 Revert r357452 - 'SimplifyCFG SinkCommonCodeFromPredecessor [...] adds 46e8fd7ad78 [FastISel] Fix the crash in gc.result lowering adds c0ee5fdcb71 [X86] Use INSERT_SUBREG rather than SUBREG_TO_REG when crea [...] adds 0f925da273a [InstCombine] Combine no-wrap sub and icmp w/ constant. adds 10ceb1aee94 [llvm-symbolizer] Add `--output-style` switch. adds e7385308ff5 [llvm-symbolizer] Allow more flexible usage of -e. adds aaf8785c9cc [AArch64][AsmParser] Fix .arch_extension directive parsing adds 4fbffbd5f67 [SLP][X86] Regenerate operandorder tests with arguments on [...] adds 80733cc0e97 [ARM GlobalISel] Support DBG_VALUE adds 3e67b7a1e67 [Symbolize] Keep SymbolDescs with the same address and impr [...] adds 4cb71b7a5e4 Revert rL357655 and rL357656 from llvm/trunk: Fix minor inn [...] adds b99bb13bdf8 [yaml2obj] - Check we correctly set the sh_info field of .s [...] adds 8d88d919bb8 [SystemZ] Bugfix in isFusableLoadOpStorePattern() adds 83d954b278a [COFF] Fix delay import directory iterator adds 0796b9408f0 [RISCV] Support assembling TLS add and associated modifiers adds e259a4d243d [llvm] [cmake] Add additional headers only if they exist adds 22283247bc9 [x86] eliminate unnecessary broadcast of horizontal op adds fcf59db0a6e llvm-dwarfdump: Support alternative architecture names in t [...] adds ad100be4e44 [llvm-objcopy] [llvm-symbolizer] Fix failing tests adds c1819f5966f [WebAssembly] Add new explicit relocation types for PIC rel [...] adds f3a823c1620 Ensure that ManagedStatic is constant initialized in MSVC 2 [...] adds f9432450dd6 [WebAssembly] Apply data relocations at runtime in shared objects adds ea5a38f994d Appease STLs where std::atomic<void*> lacks a constexpr def [...] adds 56c2f3a5639 Revert [X86] When using Win64 ABI, exit with error if SSE i [...] adds 85442c5054a Fix some MCTargetOptions Doxygen comments (NFC) adds 3fb0089d3d9 Make SourceManager::createFileID(UnownedTag, ...) take a co [...] adds d71ea05ab75 [IR] Refactor attribute methods in Function class (NFC) adds 6eb1d7bc944 [TextAPI] Prefix all architecture enums to fix the build on i386. adds 4ebcbff143d An unreachable block may have a route to a reachable block, [...] adds f75fdc34a48 Include invoke'd functions for recursive extract adds 7cc761f09b2 NFC: Move API uses of MD5::MD5Result to Optional rather tha [...] adds f708c59106e [FastISel] Fix crash for gc.relocate lowring adds 392bafc3f6b [X86] Promote i16 SRA instructions to i32 adds 959b42493f4 [SelectionDAG] Compute known bits of CopyFromReg adds 202bc23081c Minidump: Add support for reading/writing strings adds 73ee2701b93 Fix MSVC build for r357749 adds 38466d8cb01 [RISCV] Implement adding a displacement to a BlockAddress adds b27c5f5dd92 Fix r357749 for big-endian architectures adds 6c7d2a4c687 [X86] Add SSE/AVX1/AVX2 masked trunc+store tests adds 840f8cd12cd [X86][AVX] Add PR34584 masked store test cases adds 2b179093550 [Symbolize] Replace map<SymbolDesc, StringRef> with sorted vector adds 5daa5299580 [TextAPI] Fix off-by-one error in the bit index extraction loop adds a61c373e875 [DAGCombiner][x86] scalarize splatted vector FP ops adds 50b9c082418 [llvm] Add isa_and_nonnull adds 6c7dd5967af AMDGPU/GlobalISel: Fix non-power-of-2 select adds bd19ebc5d82 GlobalISel: Add another overload of buildUnmerge adds 4cd136da598 [SelectionDAG] Add fcmp UNDEF handling to SelectionDAG::FoldSetCC adds e2244b79d64 [ExpandMemCmp][NFC] Add tests for `memcmp(p, q, n) < 0` case. adds 99e08856aef Add an option do not dump the generated object on disk adds 1fc8fc0b092 [format] Add correct punctuation to comment adds ca728263d80 [llvm-readobj] Improve error message for --string-dump adds 360e56327d1 Change some dyn_cast to more apropriate isa. NFC adds afee28400ca Revert "[llvm-readobj] Improve error message for --string-dump" adds 9a81f025cf5 [InstCombine] add test to show reassociation that creates a [...] adds e28ea96f43b Add documentation for PDB TPI/IPI Stream. adds 11ab360eb5d lit: support long paths on Windows adds 2ad261a6920 [InstCombine] add tests for sqrt+fdiv+fmul; NFC adds 5f868076d7b gn build: Merge r357719 adds 995935b43bf [InstCombine] add tests for fdiv+fmul; NFC adds 226c868c6a5 gn build: Merge 357768 and 357770 adds 65e5a02fa90 [PDB Docs] Add info about the hash adjustment buffer. adds 0651f460710 [PDB Docs] Finish documentation for PDB Info Stream. adds 5e9b0f46220 lit: make rm python 3 friendly (NFC) adds 90e8e811996 Try to fix Sphinx bot. adds a0163213a9d [AMDGPU] predicate and feature refactoring adds 0fdc2d835f9 [LCG] Add aliased functions as LCG roots adds ff27e9f183d [gn] Make -no-exceptions flag a config adds 4fb52f8a323 [gn] Rebase paths in symlink_or_copy against root_build_dir adds d8490747ade [X86] Merge the different CMOV instructions for each condit [...] adds d8286e45afd [X86] Merge the different SETcc instructions for each condi [...] adds 2310900b633 [X86] Merge the different Jcc instructions for each conditi [...] adds 5d206b63270 [AMDGPU] Add MachineDCE pass after RenameIndependentSubregs adds 051d4978f8d [X86] Preserve operand flag when expanding TCRETURNri adds 5122ddd5d5c [X86] Enable tail calls for CallingConv::Swift adds 083f0c85ec6 [LLVM-C] Add bindings to insert basic blocks adds 5e38b140d25 [globalisel] Support 3-type legalForCartesianProduct() adds ea127b9f948 [InstCombine] add more tests for fmul+fdiv+sqrt; NFC adds aeacd5adf42 [PDB Docs] Delete * LINKER * Stream information. adds 60fbcc20c36 [globalisel] Allow combiners to query legality adds a47974f1b97 [gn] Support for building compiler-rt builtins adds 49009c9f67c [LLVM-C] Begin to Expose A More General Binary Interface adds 903fc4e173b [PDB Docs] The IPI Stream actually has index 4. adds 0e34344e6e9 [PDB Docs] Add documentation for the hash table format. adds f3c71e3d75c gn build: Pacify `gn format` adds 26d086bd366 [Symbolize] Uniquify sorted vector<pair<SymbolDesc, StringRef>> adds 27dda60da2b [DWARF] Simplify DWARFDebugAranges::findAddress adds c7b87faaf65 [AMDGPU] Sort out and rename multiple CI/VI predicates adds 8e287aee8b5 [CostModel][X86] Add more exhaustive masked load/store/gath [...] adds 9d6cfa979f7 [X86][SSE] Add more exhaustive masked load/store tests adds 98514317dd2 [X86] Split expandload and compressstore tests adds faa1b772d97 [llvm-exegesis][X86] Handle CMOVcc/SETcc OPERAND_COND_CODE [...] adds b29aa0ed5ae [X86] Add AVX-target expandload and compressstore tests adds e0f99ea4f0d Fix spelling mistake. NFCI. adds af98c632ded [X86] Autogenerate complete checks. NFC adds 37f40046fb8 [X86] Add test cases to show missed opportunities to use a [...] adds 58723280e47 [X86] Use a signed mask in foldMaskedShiftToScaledMask to e [...] adds b7a1501a046 [X86] combineBitcastvxi1 - provide dst VT and src SDValue d [...] adds ec0a133717f [X86] When converting (x << C1) AND C2 to (x AND (C2>>C1)) [...] adds aaf08591e98 [NFC] Fix typo in comment. adds 003add3c665 [gn] Support for per-target runtime directory layout adds 9cc714957fa Change some StringRef::data() reinterpret_cast to bytes_beg [...] adds 7a5b0c460cc [llvm-objdump] Simplify disassembleObject adds 5ac536e416f [ConstantRange] Shl considers full-set shifting to last bit [...] adds 582aba066dd [llvm-objdump] Simplify Expected<T> handling with unwrapOrError adds 07cbb7ba4bf . adds aaf1f3612ec [llvm-objdump] Simplify some ELF typename: ELFFile<ELFT>::E [...] adds bcaec23c255 [llvm-objdump] Fix split of source lines; don't ltrim source lines adds e9d45f9ecc8 [X86][SSE] SimplifyDemandedBitsForTargetNode - Add initial [...] adds 3ae5d6c4c48 [DAG] Pull out ComputeNumSignBits call to make debugging ea [...] adds b97b21f6246 Copy the C++ kaleidoscope tutorial into a subdirectory and [...] adds e0a373b5570 remove some unhelpful language from the tutorial adds 0e1be173238 [CostModel][X86] Masked load legalization requires an binar [...] adds a932c9ae0ab make a bunch of cleanups in wording and tone adds a2353929a36 [DWARF] DWARFDebugLine: delete unused parameter `Offset` adds c599324ae44 various improvements in wording, also unbreak the bot adds 2dd25b04131 last changes for now adds ddfe71d047d [llvm-objdump] Split disassembleObject and simplify --{star [...] adds cdee3b7f234 Reapply [ValueTracking] Support min/max selects in computeC [...] adds a83da3f8839 [ConstantRange] Add isAllNegative() and isAllNonNegative() methods adds f44199b7bfa [LLVM-C] Allow Access to the Type of a Binary adds fbdd8db6019 [ConstantRange] Add unsigned and signed intersection types adds 24352fc973e [ConstantRangeTest] Generalize intersection testing code; NFC adds 7ef283f68dc [X86] Use (SUBREG_TO_REG (MOV32rm)) for extloadi64i8/extloa [...] adds c62bb1e099d [ConstantRange] Add signed/unsigned unionWith() adds c0af88a98cc [llvm-objdump] Fix MC/ARM/arm-macho-calls.s adds 968007b51b9 [X86] Add avx and avx512f command lines to atomic-non-integ [...] adds 064d9fea373 [X86] Split floating point tests out of atomic-mi.ll into a [...] adds 86fa8f4d56f [InstCombine]add testcase for sdiv canonicalizetion - NFC adds c7a2fabb483 [InstCombine] add testcases for sdiv exact flag fixing - NFC. adds e866cff2107 [ConstantRange] Delete redundnt {z,s}extOrSelf for multiplication adds 9880a23b183 [X86] Make LowerOperationWrapper more robust. Remove now un [...] adds 6d282cdcdea [InstCombine] add more testcases for sdiv exact flag fixup. adds 46b97dd6ad3 Object/Minidump: Add support for reading the ModuleList stream adds dc4e93b649b [llvm-exegesis][X86] Randomize CMOVcc/SETcc OPERAND_COND_CO [...] adds 9736ffc02af [CMake] Replace LLVM_ENABLE_CXX1Y and friends with LLVM_CXX_STD adds 28481789cfe [llvm-exegesis] benchmarkMain(): less cryptic error if buil [...] adds a3ee5306ac1 [Support] Add zlib independent CRC32 adds 5d33cd5143b Reverting r357901 as fails to build on some of the buildbots adds 6e3b9845eac [llvm-readobj] Use `reinterpret_cast` instead of C-style ca [...] adds ef1e756a76a [InstCombine] sdiv exact flag fixup. adds 3676506b06c Attempt to recommit r357901 adds 070c4bb390b gn-build: Re-run `git ls-files '*.gn' '*.gni' | xargs llvm/ [...] adds e51a6f17069 gn build: Merge r357905 adds f9c39ac584f [InstCombine][X86] Expand MOVMSK to generic IR (PR39927) adds f2bfd1e2c62 [InstCombine] remove overzealous assert for shuffles (PR41419) adds f7721ae87dc Use llvm::crc32 instead of crc32. NFC adds 50de781fc93 [x86] make 8-bit shl undesirable adds c32c31e7200 [X86][AVX] Add PR34380 shuffle test cases adds eb444790568 [llvm-mca][scheduler-stats] Print issued micro opcodes per [...] adds 7ac74fb0ca9 [llvm-objdump] Migrate relocation handling functions from e [...] adds 954fc5a6252 [JumpThreading] Fix incorrect fold conditional after indire [...] adds 13456d67c90 [ThinLTO] Fix ThinLTOCodegenerator to export llvm.used symbols adds 65881148e94 Revert [ThinLTO] Fix ThinLTOCodegenerator to export llvm.us [...] adds f09c6d5b712 Add LLVM IR debug info support for Fortran COMMON blocks adds 5ff5943b837 [X86] Fix a couple lowering functions that called ReplaceAl [...] adds 53883093874 llvm-undname: Fix more crashes and asserts on invalid inputs adds c924f5a32a3 [InstCombine] Add more tests for signed saturing math overf [...] adds 5b6d7be67cb [InstCombine] add extra-use tests for fmul+sqrt; NFC adds a2b71f96a9d [TargetLowering] SimplifyDemandedBits - use DemandedElts in [...] adds 44ffd2ca9e8 [InstCombine] peek through fdiv to find a squared sqrt adds c9c739b63fc [BinaryFormat] Update Mach-O ARM64E CPU subtype and dumping adds ac3709e19f5 [RuntimeDyld] Decouple RuntimeDyldChecker from RuntimeDyld. adds 9e1425568c2 [RuntimeDyld] Fix an ambiguous make_unique call. adds c7c71947e52 [InstCombine] add tests for negate+sdiv; NFC adds c840562c044 [X86] Derive ssmem and sdmem from X86MemOperand. NFCI adds 2accefaaf34 hwasan: Enable -hwasan-allow-ifunc by default. adds ed46a5f15d6 [PowerPC] initialize SchedModel according to platform. Diff [...] adds 0f50aefa77a AMDGPU/GlobalISel: Implement call lowering for shaders retu [...] adds 029dd82a552 [llvm-objdump] Migrate some functions from std::error_code [...] adds 1ba74f27cdb Include omitted word in comment. adds dbe7fdc24b9 [ValueTracking] Explicitly specify intersection type; NFC adds 0c1f56ed4eb [ValueTracking] Use ConstantRange methods; NFC adds 49d4f2cd688 [X86] Split the VEX_WPrefix in X86Inst tablegen class into [...] adds f8b5355aada [X86] Use VEX_WIG for VPINSRB/W and VPEXTRB/W to match what [...] adds b30723027be [X86] Have EVEX2VEX tablegenerator use HasVEX_L and HasEVEX [...] adds 5011b0f51bf [X86] Remove check on isAsmParserOnly from EVEX2VEX tablege [...] adds f19c9f4fa37 [DebugInfo] Remove redundant DebugLocEntry::MergeValues() f [...] adds b935402f9a0 [CMake] Move configuration of LLVM_CXX_STD to HandleLLVMOpt [...] adds 90935518323 [CMake] Fix accidentally swapped input/output parameters of [...] adds 3f451ea18e2 [PowerPC] fix trivial typos in comment, NFC adds b346aaa34a3 Fix Wdocumentation warning. NFCI. adds 5fe9706e7f3 [DebugInfo] Pass all values in DebugLocEntry's constructor, NFC adds 76b1cf8a46f [llvm-rtdyld] Fix missing include on MSVC builds. adds 6aaa856e179 [TargetLowering] SimplifyDemandedBits - call SimplifyDemand [...] adds 73f33775629 Improve hashing for time profiler adds f312d38896b [TargetLowering] SimplifyDemandedBits - Remove GetDemandedS [...] adds 6ea7e450234 [InstCombine] add more testcases for canonicalize (-X s/ Y) [...] adds c9acb1de281 NFC: Refactor library-specific mappings of scalar maths fun [...] adds 81527b31ce8 [InstCombine] add tests/comments for negate+sdiv; NFC adds 396f459f959 gn build: Fix Windows builds after r357797 adds 30ccf8222e1 [InstCombine] prevent possible miscompile with negate+sdiv [...] adds 45a20147470 [InstCombine] auto-generate complete test checks; NFC adds a5939ccf497 [InstCombine] add tests for sdiv-by-int-min; NFC adds 3b98d96a7a0 [InstCombine] add tests for sdiv with negated dividend and [...] adds a6a1dd0d314 [DWARF] DWARFDebugLine: replace Sequence::orderByLowPC with [...] adds 38daa71a61d [InstCombine] prevent possible miscompile with sdiv+negate [...] adds d3a2e85cd83 [ValueTracking] Use computeConstantRange() in signed add ov [...] adds f53ab9d6ab8 Revert LIS handling in MachineDCE adds c92ab7af6f8 [InstCombine] [InstCombine] Canonicalize (-X s/ Y) to -(X s/ Y). adds 0c7bc1e6bb7 [TargetLowering] SimplifyDemandedBits - add ISD::INSERT_SUB [...] adds 717cc44de65 [ValueTracking] Use computeConstantRange() for signed sub o [...] adds bdaa4b50871 Update modulemaps for Analysis/VecFuncs.def. adds 40b4c59816e [PDB Docs] Clarifications and fixes for DBI Stream. adds 3fea56d5de7 Remove the unit at a time option Removes the code from opt [...] adds b9767f7ec00 [InstCombine] Restructure OptimizeOverflowCheck; NFC adds 338bf21006b Revert "[InstCombine] [InstCombine] Canonicalize (-X s/ Y) [...] adds b77427871e5 [DAGCombiner][X86][SystemZ] Canonicalize SSUBO with immedia [...] adds 925a816fd43 [X86] Add support for {vex2}, {vex3}, and {evex} to the ass [...] adds c7145d65101 [AArch64] Add test case to show missed opportunity to remov [...] adds b182ab7d784 [InstCombine] Add with.overflow always overflow tests; NFC adds e5bb56cb3cb [GlobalISel][AArch64] Allow CallLowering to handle types wh [...] adds eea3146ce8b [AArch64][GlobalISel] Add legalization for some vector G_SH [...] adds 7e73c914ea3 [AArch64][GlobalISel] Legalize vector G_ICMP. adds e6e85671777 [AArch64][GlobalISel] Add isel support for vector G_ICMP an [...] adds da7a8456ae3 [X86] Fix a dangling StringRef issue introduced in r358029. adds f16fe4c53fd [LLVM-C] Add Section and Symbol Iterator Accessors for Obje [...] adds 5aa20826587 [LLVM-C] Add Bindings to Access an Instruction's DebugLoc adds 1642cf11e5c [LLVM-C] Correct The Current Debug Location Accessors adds c90f68822e5 [X86] Add VEX_LIG to scalar VEX/EVEX instructions that were [...] adds 75fc7ebb145 [X86] Support the EVEX versions vcvt(t)ss2si and vcvt(t)sd2 [...] adds b199e834732 [Sparc] Fix incorrect MI insertion position for spilling f128. adds 90bb2f79b20 [llvm-objdump] Accept and ignore --wide/-w adds 8d84ad66958 [llvm-objdump] Don't print trailing space in dumpBytes adds be304b73c90 [X86] Move the 2 byte VEX optimization for MOV instructions [...] adds 9eaa79da9e8 [ObjC][ARC] Convert the retainRV marker that is passed as a [...] adds 29ea2070bd6 [InstCombine] Canonicalize (-X s/ Y) to -(X s/ Y). adds ce684046786 [InstCombine] Directly call computeOverflow methods in Opti [...] adds b8b80606ab4 [InstCombine] Handle usubo always overflow adds a82146798c5 [DWARF] Simplify LineTable::findRowInSeq adds 9928b761ce4 [VPLAN] Minor improvement to testing and debug messages. adds 4fb7727e0d6 Add REQUIRES: asserts to test using -debug-only adds 1fa9e79ea13 [ScheduleDAG] Add statistics for maintaining the topologica [...] adds b4b762c5925 [DebugInfo] Make InstrRange into a class, NFC adds e2477cfa4b9 [DebugInfo] Rename DbgValueHistoryMap::{InstrRange -> Entry}, NFC adds 735eff80dd1 [ARM GlobalISel] Map G_FCONSTANT adds d8ccf753e3c [ARM GlobalISel] Select G_FCONSTANT into pools adds 8c8976533c6 [ARM GlobalISel] Select G_FCONSTANT for VFP3 adds 7357a6acd03 [ARM GlobalISel] Add some asserts. NFC. adds 0cf07d2e5ba Fixup r358063 adds 1d88b25399d MCDwarf: use write_zeroes for MCDwarfLineAddr::FixedEncode adds 6871d0a3303 MCSymbolicELF: simplify. (Flags & (x << s)) >> s is equival [...] adds dc11e109be5 [AsmPrinter] Delete unused RangeSpanList::addRange adds 677f061542a [TargetLowering] Move shouldFoldShiftPairToMask next to pre [...] adds 4281d3e410f [DebugInfo] Improve handling of clobbered fragments adds ceea708d56a [DebugInfo] Track multiple registers in DbgEntityHistoryCalculator adds 85ec8037b82 [llvm-exegesis] Fix error propagation from yaml writing (fr [...] adds add2ebdf9a6 [llvm-exegesis] YamlContext: fix some missing spaces/quotes [...] adds aa784af74da [llvm-readobj] Should declare `ListScope` for `verneed` entries. adds bfc0aa39dab [llvm-exegesis] Pacify bots - don't std::move() - prevents [...] adds 14b9e1a708d [NFC] Fix unused variable warning. adds ba3f83af6f4 [ARM] [FIX] Add missing f16 vector operations lowering adds 2cc343604ca Revert "[LLVM-C] Correct The Current Debug Location Accessors" adds 8f0a1e06893 [AArch64] Add lowering pattern for scalar fp16 facge and facgt adds e9dc5141ac2 [LLVM-C] Correct The Current Debug Location Accessors (Again) adds 5abf2be60cb [MachineOutliner] Replace ostringstream based string concat [...] adds 84f9adc6c9d Fix a typo adds 84db5e00282 [InstCombine] Handle saddo always overflow adds d4d582af7ca [X86][AVX] getTargetConstantBitsFromNode - extract bits fro [...] adds 1fdc6783d8d Improve compile-time performance in computeKnownBitsFromAssume. adds 7604f64a6f0 [InstCombine] ssubo X, C -> saddo X, -C adds bea42108cfa [InstCombine] Handle ssubo always overflow adds a943056482f [AsmPrinter] refactor to remove remove AsmVariant. NFC adds 8b8d171265e add FIXME: as per echristo adds 1963c0bccb5 GlobalISel: Handle odd breakdowns for bit ops adds dee372f3380 [AArch64] Teach getTestBitOperand to look through ANY_EXTENDS adds 9b419470200 GlobalISel: Support legalizing G_CONSTANT with irregular breakdown adds dc5d59bf21f GlobalISel: Fix invoke lowering creating invalid type registers adds fff0af42604 GlobalISel: Move computeValueLLTs adds 12041c1bc88 llvm-undname: Fix another crash-on-invalid adds 45a375eb6b1 Revert rL357745: [SelectionDAG] Compute known bits of CopyFromReg adds dd0be70559a [ARM] Add an extra constant hoisting test. NFC adds d146b937891 [kate] Add '!mul' operator that was introduced in D58775 adds 4e72ab8b660 [TableGen] Introduce !listsplat 'binary' operator adds 6649368bab2 [X86] X86ScheduleBdVer2: use !listsplat operator to cleanup [...] adds 091d3974ccd [PDB Docs] Start documenting CodeView Type Records. adds b7bce147ad2 [llvm] Non-functional change: declared a local variable as const. adds 0a9115aac13 [X86AsmPrinter] refactor to limit use of Modifier. NFC adds a14a434a08e [X86] Replace some if statements in isel address matching t [...] adds a8783de71bc [X86] Add test case for LEA formation regression seen with [...] adds 4975a7184f9 [ARM] Add an extra test for constant hoist. NFC adds 7276258ca99 [X86] Make _Int instructions the preferred instructon for t [...] adds b8a9dcf26b8 [X86] Teach foldMaskedShiftToScaledMask to look through an [...] adds e99a86d0a50 [X86] Autogenerate complete checks. NFC adds c5f25a94d87 [X86] Add SSE1 command line to atomic-fp.ll and atomic-non- [...] adds 250ffab4a28 [AArch64][GlobalISel] Scalarize vector SDIV. adds a0d08405e7a [AArch64][GlobalISel] Add legalizer support for <8 x s16> a [...] adds b2903912f8d [AArch64][GlobalISel] Make <2 x p0> = G_BUILD_VECTOR legal. adds f78c27b74d0 Fix a hang when lowering __builtin_dynamic_object_size adds ae328c30c0f [DWARF] Set discriminator to 0 for DW_LNS_copy adds 209d9a9a8d8 [RISCV] Put data smaller than eight bytes to small data section adds b3382d253f7 [llvm-exegesis] Fix serialization/deserialization of specia [...] adds 4c129f6e6cb Try to fix the shpinx build adds 69455d8a786 try to fix the sphinx build some more adds 287b2fefe47 [ADT] Fix template parameter names of llvm::{upper|lower}_bound adds 2a621877519 [MCA] Remove wrong comments from a test. NFC adds a5919957f1a Use llvm::lower_bound. NFC adds 07d85203312 Test commit access adds 3ee22de7485 [ValueTracking] Change if-else chain into switch in compute [...] adds ec7786cfeb0 [X86] SimplifyDemandedVectorElts - add VPPERM support adds e5d96fd9415 [X86][XOP] Add X86ISD::VPERMIL2 demandedelts test adds c4c427ffea8 [X86] SimplifyDemandedVectorElts - add X86ISD::VPERMIL2 mas [...] adds 491c5046445 [X86][AVX] Add X86ISD::VPERMILPV demandedelts tests adds 31e4f8550c6 [X86] SimplifyDemandedVectorElts - add X86ISD::VPERMILPV ma [...] adds 90dd83f8054 [AArch64] Add lowering pattern for llvm.aarch64.neon.vcvtfx [...] adds 8e4da35c4ae [DAGCombiner][x86] scalarize inserted vector FP ops adds 2d199db3b40 [X86][AVX] Add X86ISD::VPERMV demandedelts test adds 9078304a8e7 [X86] SimplifyDemandedVectorElts - add X86ISD::VPERMV mask support adds d0586349ae5 [X86][AVX] Add X86ISD::VPERMV3 demandedelts test adds a5a6353ba4f YAMLIO: Fix serialization of strings with embedded nuls adds f2af3ceff5f [llvm] [lit] Add target-x86* features adds 6a2f99a8dea [X86] Add MM register mapping from CodeView to MC register id adds 30bc60c9e3b [X86][AVX] Tweak X86ISD::VPERMV3 demandedelts test adds 700e61c5aa9 [RISCV] Diagnose invalid second input register operand when [...] adds e4706f2c5df Make llvm-nm -help great again adds 6b550bf3faa [X86] SimplifyDemandedVectorElts - add X86ISD::VPERMV3 mask [...] adds bc87fa30f7f [DAGCombiner] refactor narrowing of extracted vector binop; NFC adds ce2b63cf709 [ConstantFold] ExtractConstantBytes - handle shifts on larg [...] adds b3832039a9e New document skeleton describing how to add a constrained f [...] adds c4ffb0705d0 [PDB Docs] Add skeleton of documentation for CodeView symbols. adds d3de2ef7e76 Fix sphinx documentation warning. adds 8c653aebb34 Revert "Use llvm::lower_bound. NFC" adds f509674afe6 [X86] Pre-commit i64 volatile test case for D60156. NFC adds 27970a38959 [X86] Use FILD/FIST to implement i64 atomic load on 32-bit [...] adds d11a7fa9a6e Revert r358211 "[X86] Use FILD/FIST to implement i64 atomic [...] adds b5079b20d2e Recommit r358211 "[X86] Use FILD/FIST to implement i64 atom [...] adds 0bc1a86ddd6 [X86] Add patterns for using movss/movsd for atomic load/st [...] adds b0ed82c8f92 [X86] Add 32-bit command line to extractelement-fp.ll so I [...] adds 0a7c2b2b165 [X86] Restrict vselect handling in scalarizeExtEltFP to onl [...] adds ef13026b839 [DebugInfo] Combine Trivial and NonTrivial flags adds a5855780b92 [AArch64][GlobalISel] Legalization and ISel support for loa [...] adds 23c2f19a50d [AArch64][GlobalISel] Flesh out vector load/store support f [...] adds c2c97e63cc4 [PGO] Better handling of profile hash mismatch adds c932a25d56d [cmake] Fix dependency issue in TableGen adds 1bcb288c209 [ConstantRangeTest] Fix typos in test names; NFC adds d6ce6ef4db6 [ConstantRange] Add unsignedMulMayOverflow() adds 6eda2da8e56 [CVP] Generate full test checks for overflows.ll; NFC adds 0cd628a5aa1 [Pipeliner] Fix incorrect loop carried dependence calculation adds 0907e8aafad llvm-undname: Fix crash on invalid name in a template param [...] adds bfffca94649 [X86AsmPrinter] refactor static functions into private meth [...] adds 65c0092a7b0 llvm-undname: Fix crash on incomplete virtual this adjusts adds 54ee04c7097 llvm-undname: Don't crash on incomplete enum tag manglings adds 4b4fd781e20 llvm-undname: Fix out-of-bounds read on invalid intrinsic f [...] adds 0c94d6f746e llvm-undname: Name a bool param, no behavior change adds 42f5049fcee llvm-undname: Use UNREACHABLE after exhaustive switch retur [...] adds 2ff866e5e8b Remove a parameter that was being passed around that we had [...] adds 66987a8d19a Use llvm::lower_bound. NFC adds c77c3069497 [MC] Fix typo: .symtab_shndxr -> .symtab_shndx adds a588917c3b7 Move a couple of optional references to just optional to ma [...] adds 77dd066466e MCDwarfLineTableheader::tryGetFile : replace a loop with ll [...] adds 5268c8af529 [PowerPC] More precise exploitation of P9 maddld instructio [...] adds 0c40f6d1281 Include what's used in a few cpp files - these were getting [...] adds 7e7105bd034 Move addFrameInst out of line and remove the MCDwarf.h include. adds fe3f5c800fd [PowerPC] Add initialization for some ppc passes adds 3f8580a8657 [TargetLowering][X86] Teach SimplifyDemandedBits to use Shr [...] adds 5594c48b1c0 Move addInitialFrameState out of line and remove the MCDwar [...] adds 8192200388a [llvm-readobj] Change variables' name to match LLVM-style. NFC. adds 9b4c3643b3b Revert "[PowerPC] Add initialization for some ppc passes" adds a333049e174 [ConstantFold] Don't evaluate FP or FP vector casts or trun [...] adds d46ddf0061b Add explicit dependencies on MCSection.h and MCDwarf.h to t [...] adds 03d462db723 Move getNumFrameInfos and getDwarfFrameInfos out of line an [...] adds c895f8c934d Fix missing arguments in tutorial adds bcae242878f [DebugInfo] DW_OP_deref_size in PrologEpilogInserter. adds e049fdb84bd [DebugInfo] Fix pr41175 Dead Store Elimination missing debug loc adds 9c0652abaf6 [PowerPC] Add initialization for some ppc passes adds e6cd4757bf4 Use llvm::upper_bound. NFC adds ae2e11429b9 [llvm-objcopy] Fill .symtab_shndx section correctly adds 0366e3e1814 Revert r358268 "[DebugInfo] DW_OP_deref_size in PrologEpilo [...] adds dfff56a5b1a [X86][SSE] Recognise vXi1 boolean anyof/allof reduction patterns adds aae02cfe3c2 Add options for MaxLoadsPerMemcmp(OptSize). adds 324cbd6cc8b [PDB Docs] Add some prose describing public and global symbols. adds e5a55cebc1b [DAGCombiner] narrow shuffle of concatenated vectors adds cbf9870fbd3 [Hexagon] Fix reuse bug in Vector Loop Carried Reuse pass adds 6d65a798367 Simplify decoupling between RuntimeDyld/RuntimeDyldChecker, [...] adds bfc681fbdbd [Tests] Checkin a test demonstrating a miscompile so that p [...] adds 6c48db93600 [KnownBits] Add computeForAddCarry() adds 18746175864 [CVP] Set NSW/NUW flags when simplifying with.overflow adds 11c890ecc7d [InstCombine] Fix a nasty miscompile introduced w/masked.ga [...] adds 509313a4019 [MemorySSA] Small fix for the clobber limit. adds 3a08fe17897 [SCEV] Add option to forget everything in SCEV. adds e003b9c297d [ConstantRange] Clarify makeGuaranteedNoWrapRegion() guaran [...] adds 1be42d1507a [WebAssembly] Add mutable-globals to bleeding-edge CPU adds e95bdd94424 [AArch64][GlobalISel] Fix a crash when selecting shufflevec [...] adds 145d06055b9 [MemorySSA] Add previous def to cache when found, even if trivial. adds 4934dfffb04 [GlobalISel] Fix a crash when handling an invalid MVT durin [...] adds 9dcce983ad7 [WebAssembly] Add DataCount section to object files adds 5b35b3b0304 [AArch64][GlobalISel] Enable copy elision in the pre-legali [...] adds edc744d5be3 [StackMaps] Add explicit location size accessor to the stac [...] adds 2927d3c3238 [StackMaps] Remove format version from the class name [NFC] adds 2412dd05f1a [llvm-readobj] Minor style tweak for consistency sake [NFC] adds 63953aae1cc [StackMaps] Add location size to llvm-readobj -stackmap output adds dbbe581276a [StackMaps] Update llvm-readobj to parse V3 Stackmaps adds bd8056ef326 [InstCombine] [NFC] add testcases for canonicalizing (-X sr [...] adds 83034dffa4d [InstCombine] Canonicalize (-X srem Y) to -(X srem Y). adds 644b6da1983 [CVP] Add tests for with.overflow used as condition; NFC adds fb1e04ff3c5 [CVP] Fix inverted predicates in test; NFC adds 7dd4ca2ea23 [ADT] Fix OwningArrayRef's move ctor adds 5ddf7856a5d [Mem2Reg] Delete unused AllocaPointerVal adds a08823638ac [CallingConvLower] Use SmallVectorImpl::swap adds 1e9de495999 [WebAssembly] Use Function::hasOptSize() (NFC) adds 3f5d54bc7b3 [CommandLineParser] Add DefaultOption flag adds 6d337902ecb [X86] Use int64_t and isInt<N> instead of APInt operations [...] adds 360d0ef4980 [InstCombine] Remove redundant/bogus mul_with_overflow combines adds d8edeb6f892 [ConstantRange] Disallow NUW | NSW in makeGuaranteedNoWrapRegion() adds b0cf9ee322f [CVP] Add tests for range of with.overflow result; NFC adds 5c35460a15f [X86] Use PC-relative mode for the kernel code model adds 7e1fbc12173 [Tests] Add tests for D60659, and make adjustments to other [...] adds 37569f61189 [X86] Remove some unused tablegen multiclasses. NFC adds 1ac65e89832 [X86] Update bool_reduction_v8f32 test cases from vector-co [...] adds 1f9f94ca362 [ConstantRange] Delete unused getSetSize adds f446a274505 [ConstantRange] Fix unittest after rL358347 adds 1481cdaa58e [Mem2Reg] Simplify rewriteSingleStoreAlloca adds a526661d0f8 [Mem2Reg] Don't call LBI.deleteValue on AllocInst/DbgVariab [...] adds adb4c21c6de [Mem2Reg] Simplify and micro optimize adds 581b638b168 [Mem2Reg] Delete unused PointerAllocaValues adds 2b38b84a12f [ConstantRange] Simplify unittests after getSetSize was removed adds 9e5a8cbba13 [X86] Don't form masked vpcmp/vcmp/vptestm operations if th [...] adds fbcef4fae71 [X86] Move VPTESTM matching from the isel table to custom c [...] adds 34cf0f340d1 [X86] Change IMUL with immediate instruction order to ri8 i [...] adds 22fb1146ffc [X86] Put the locked mi8 instrutions above the locked mi/mi [...] adds 31fb1782bc6 [X86] Redefine KUNPCK instructions to take a narrower sourc [...] adds eaedc0223b8 llvm-undname: Fix another crash-on-invalid found by oss-fuzz adds 7ee0b2f5726 gn build: Merge r358272 adds 64b44dedca6 gn build: Merge r358243 adds 7fcf5b534e9 gn build: Merge r358297 adds 9fe9eec3d85 llvm-undname: Fix oss-fuzz-foudn crash-on-invalid with inco [...] adds 3d4f91d8d07 [GlobalISel] Introduce a CSEConfigBase class to allow targe [...] adds 040f61e1172 [GlobalISel] Enable CSE in the IRTranslator & legalizer for [...] adds 51c70c80cb9 [Sparc] Fix typo. NFC. adds 70ddf591597 [X86] Regenerate checks for domain-reassignment.mir adds e8116c4ea82 [SelectionDAG] Use KnownBits::computeForAddSub/computeForAddCarry adds 17425db0e31 [DWARF] Make DWARFDebugLine::ParsingState::RowNumber a loca [...] adds 1d49a21976f [DWARF] Fix DWARFVerifier::DieRangeInfo::intersects adds f59b8b01e46 [DWARF] Delete redundant check in DWARFAddressRange::intersects adds d6b200d547e [NewPM] Add Option handling for SimplifyCFG adds 04e1efbae22 [Transforms][ASan] Move findAllocaForValue() to Utils/Local [...] adds 460838586d8 Revert "[DWARF] Delete redundant check in DWARFAddressRange [...] adds 964976f9b89 Codegen: Fixed perf branch_weights in couple of tests. NFC. adds 24f9633dfe5 [DebugInfo][Docs] Document variable location metadata trans [...] adds b0014722fdd [DWARF] Fix DWARFVerifier::DieRangeInfo::contains adds 4159a62fd31 [Docs] Correct some indentation muppetry that trips buildbots adds a2f0069dea7 [TableGen] Include schedule model name in diagnostic. adds 7fb4d769b72 FileCheck [1/12]: Move variable table in new object adds 6ce3cbed7bf [Docs] Switch a code block from LLVM to text adds a5912ea9c69 [AMDGPU] Fixed incorrect test in vcnd/vcmp optimization adds 4432c834049 [llvm-readobj] Reapply: Improve error message for --string-dump adds 6085833aa63 [llvm-readelf] Correctly dump symbols whose section id is S [...] adds fa92040aa78 gn build: Merge r358390 adds e69580818fc DAG: propagate whether an arg is a pointer for CallingConv [...] adds 90597d4a3c4 DAG: propagate ConsecutiveRegs flags to returns too. adds 2ab4f529bb6 [InstCombine] canonicalize fdiv after fmul if reassociation [...] adds 24e71e6865d [llvm-objdump] Align instructions to a tab stop in disassem [...] adds 39cd9cb990b [EarlyCSE] regenerate test checks; NFC adds 14eebb87493 Revert r358337: "[CommandLineParser] Add DefaultOption flag" adds 24f35eb0fc0 [llvm-objdump] Reorganize cl::opt variables and move Mach-O [...] adds 399b42da404 [llvm-objdump] Delete unused forward declarations adds 0ea24701601 [llvm-objdump] Wrap things in namespace llvm adds 0eccb9c93ee [llvm-objdump] Simplify PrintHelpMessage() logic adds 7fe3ccfcdc4 [LoopPred] Hoist and of predicated checks where legal adds ebe43346ae6 [EarlyCSE] add tests for selects with commuted operands (PR [...] adds 6900134167b llvm-undname: Fix nullptr deref on invalid conversion opera [...] adds 7716d659688 [PGO] Profile guided code size optimization. adds 848abc34f51 Add slbfee instruction. adds 592ca89b48c [X86] Restore the pavg intrinsics. adds f944830706c [CommandLineParser] Add DefaultOption flag adds 2e4e76b7080 Fix header guard typo and build error. adds b575b771c7b Add explicit dependency to MCDwarf.h in ARC backend. adds 04f57483979 [DEBUGINFO] Prevent Instcombine from dropping debuginfo whe [...] adds a739132fd36 [x86] update test checks; NFC adds a1378078d89 [LoopPred] Stop passing around builders [NFC] adds b88655f4c40 [X86] Block i32/i64 for 'k' and 'Yk' in getRegForInlineAsmC [...] adds 995a17c619c [Tests] Add a few more tests for LoopPredication w/invariant loads adds 878c0a9d38c Revert r358418: "[llvm-objdump] Simplify PrintHelpMessage() logic" adds e18ca393e07 [EarlyCSE] add test for select condition double-negation; NFC adds c468ee92422 AMDGPU: Fix printed format of SReg_96 adds 91b4e08b810 AMDGPU: Fix unreachable when counting register usage of SGPR96 adds d601c8128bd Time profiler: small fixes and optimizations adds 27331403cf1 [X86] Fix a stack folding test to have a full xmm2-31 clobb [...] adds cc4577dd5da [X86] Limit the 'x' inline assembly constraint to zmm0-15 w [...] adds f37a63e419b [Support] Add a test for recursive response file expansion adds f04307cfc53 [Support] Fix recursive response file expansion guard adds 7c6fd7edbf9 [EarlyCSE] add more tests for double-negated select condition; NFC adds 3738635a11d Only use argv[0] as the main executable name if it exists. adds 9926db0eb8e [LSR] Rewrite misses some fixup locations if it splits crit [...] adds fc6686218a2 [AArch64][GlobalISel] Don't do extending loads combine for [...] adds a164cf508d1 Revert r358405: "[llvm-objdump] Align instructions to a tab [...] adds dda7663408d Revert [Support] Fix recursive response file expansion guard adds 7e279f798be Revert [Support] Add a test for recursive response file expansion adds 3fe0ed04c1e Reapply [Support] Add a test for recursive response file expansion adds 0ce6761594e Reapply [Support] Fix recursive response file expansion guard adds 5a75931d50a Remove some more unused headers from MachineFunction.h and [...] adds 57426150050 [CodeExtractor] Add a few debug lines to understand why a r [...] adds 1e6eb4cd509 [llvm-objdump] Simplify PrintHelpMessage() logic adds 078c887eb00 [llvm-objdump] Align instructions to a tab stop in disassem [...] adds 52536b57c44 Use native llvm JSON library for time profiler output adds 202ed574189 Asan use-after-scope: don't poison allocas if there were un [...] adds 7c29aa76245 Removed CMake cache upgrade code from 2011 adds a2389c7d86c Re-commit r357452: SimplifyCFG SinkCommonCodeFromPredecesso [...] adds b06fa34e3fb llvm-undname: Add a -raw-file flag to pass a raw buffer to [...] adds 354a46b7a0d gn build: Merge r358422 adds 647da9054d1 Fix llvm-undname tests after r358485 adds 05111de2522 llvm-undname: add a missing CHECK: to a passing test adds 82dee483975 llvm-undname: Tweak arena allocator adds 1d7046374b1 llvm-undname: Fix nullptr deref on invalid structor names i [...] adds 14a17d2dd5e llvm-undname: Consistently use "return nullptr" in function [...] adds 528877f8972 [llvm][Support] Provide interface to set thread priorities adds 394ea6522c6 [SystemZ] Add missing intrinsics to intrinsics-immarg.ll adds 2ce77c86aac [RISCV] Custom lower SHL_PARTS, SRA_PARTS, SRL_PARTS adds fccd1f0eb99 [OCaml] Update api to account for FNeg and CallBr instructions adds b980346e406 [DAGCombiner] Add missing flag to addressing mode check adds 91840363f4a [llvm-objdump] Test tabs in disassemble-align.s with a more [...] adds 286083a5c3b [Hexagon] Remove indeterministic traversal order adds 6afd9d5ae08 [Tests] Add branch_weights to latches so that test is not e [...] adds 50d2be30be9 [IR] Add WithOverflowInst class adds 577e9fbf52f [x86] add more tests for LEA formation; NFC adds 9d5a8ca8652 [InstCombine] Add tests for fshl/fshr with masked operands; NFC adds b5612d0a25a [InstCombine] Prune fshl/fshr with masked operands adds 91de08f0782 [X86][AVX] X86ISD::PERMV/PERMV3 node types can never fold i [...] adds c8dddc8fe03 [CVP] Add tests for non-overflowing mulo; NFC adds e7b71e08c1a [SLP] Refactoring of the operand reordering code. adds 981f0db5c18 [Support][JSON] Add reserve() to json Array adds 28e34c70efb [CVP] Simplify umulo and smulo that cannot overflow adds e7738cac23c Time profiler: optimize json output time adds 36bc2b7a7d3 [EarlyCSE] detect equivalence of selects with inverse condi [...] adds 29d0764b94e [TargetLowering] Rename preferShiftsToClearExtremeBits and [...] adds c387f2b3f2c [NVPTXAsmPrinter] clean up dead code. NFC adds 778b736247a Fix a typo in comments. [NFC] adds 22f6b59ebe6 [LLVM-C] Add Accessors For Global Variable Metadata Properties adds 12d487290a4 [x86] adjust LEA tests for better coverage; NFC adds 7d8cf48c8d1 [ADT] llvm::bsearch, binary search for mere mortals adds 309d941d2b0 Add basic loop fusion pass. adds 02cc44c1b91 Temporarily Revert "Add basic loop fusion pass." As it's ca [...] adds 7e3ba54932d Remove the run-slp-after-loop-vectorization option. adds 598198edbc2 Revert "Temporarily Revert "Add basic loop fusion pass."" adds b38916079b2 Revert "Add basic loop fusion pass." Per request. adds 430cf96dccd [MCA] Moved the bottleneck analysis to its own file. NFCI adds 6b3ddbeb7da [X86] In CopyToFromAsymmetricReg, use VR128 instead of FR32 [...] adds 12dfff8e72d [X86] Autogenerate complete checks. NFC adds 44940eda85f Fixed error message printing in write_cmake_config.py adds 5611a9e3ab1 [DWARF] Pass ReferenceToDIEOffsets elements by reference adds ec0d5b2a31a [CVP] processOverflowIntrinsic(): don't crash if constant-h [...] adds 6963206b332 [llvm-objcopy] Support full list of bfd targets that lld uses. adds 27f152b9a74 Change some llvm::{lower,upper}_bound to llvm::bsearch. NFC adds 3c5027808ad [DWARF] llvm::Error -> Error. NFC adds cd248aacbf2 [CostModel][X86] Add bool anyof/allof reduction costs adds 67f575b6a4f [LLVM-C] Add DIFile Field Accesssors adds da0ed1e7c8b gn build: Merge r358554 adds 1feaac41a0c [AMDGPU] Flag new raw/struct atomic ops as source of divergence adds 488f64fa631 [AMDGPU][MC] Corrected parsing of registers adds 94ebdffbc8c [ScheduleDAGRRList] Recompute topological ordering on demand. adds 3d0200eec28 [Support] Add LEB128 support to BinaryStreamReader/Writer. adds 03f53c0c4dc [DAGCombine] Add SimplifyDemandedBits helper that handles d [...] adds 2d05b980444 [LoopUnroll] Allow unrolling if the unrolled size does not [...] adds 78395fb2fe1 [ARM] make test checks more thorough; NFC adds 788a809b3cd AMDGPU: Force skip over SMRD, VMEM and s_waitcnt instructions adds ee018500abb [ARM] tighten test checks; NFC adds 1678c747181 [AMDGPU][MC] Corrected handling of "-" before expressions adds 9e6836a074c [LVI][CVP] Constrain values in with.overflow branches adds 36a87ca3648 [InstCombine] Factor out unreachable inst idiom creation [NFC] adds f8c4f81342c [ThinLTO] Fix ThinLTOCodegenerator to export llvm.used symbols adds 4fe807c8084 [AsmPrinter] defer %c to base class for ARM, PPC, and Hexagon. NFC adds ea4c7e531ca Add basic loop fusion pass. adds c85f346f999 [GlobalISel] Add legalization support for non-power-2 loads [...] adds aee02187cb3 Add a getSizeInBits() accessor to MachineMemOperand. NFC. adds 29c3a2ee754 [AsmPrinter] hoist %a output template to base class for ARM [...] adds 35f4a9f03b1 Test commit by Denis Bakhvalov adds 495f55e1725 [x86] try to widen 'shl' as part of LEA formation adds 42af05bfbc1 Fix formatting. NFC adds c7cadf83fff Implement sys::fs::copy_file using the macOS copyfile(3) AP [...] adds a6390fed2ff Revert Implement sys::fs::copy_file using the macOS copyfil [...] adds 8738b3dc1b1 Fix bad compare function over FusionCandidate. adds 2b4f2e542bc [GISel]:IRTranslator: Prefer a buidInstr form that allows C [...] adds aac8ffb5ffa Fix a typo in comments. [NFC] adds fed299e82d6 [AMDGPU] Avoid DAG combining assert with fneg(fadd(A,0)) adds 1d7ad3c0a6f Elaborate why we have an option on by default for enabling chr. adds 94148739fa0 [llvm-profdata] Fix one bad format in llvm-profdata Command [...] adds a2c8107c801 [PowerPC] Fix wrong ElemSIze when calling isConsecutiveLS() adds 2ab9b7521b5 [NewPM] Add Option handling for LoopVectorize adds bd2b7d923c7 Test commit access [NFC] adds 9bb70eb6817 [llvm-objcopy][llvm-strip] Add switch to allow removing ref [...] adds c858d530943 [X86][SSE] Lower ICMP EQ(AND(X,C),C) -> SRA(SHL(X,LOG2(C)), [...] adds f7dff4c501c [yaml2elf/obj2yaml] - Allow normal parsing/dumping of the . [...] adds 3de573b1c7c [llvm-objcopy] Add -B mips adds 39e5a21c6c9 gn build: Merge r358620 adds 556c106483e gn build: Merge r358633 adds f66a2647963 gn build: Merge r358607 adds efe33e64534 MinidumpYAML: Add support for ModuleList stream adds 93d23822187 MinidumpYAML: Fix ambiguity between std::make_unique and ll [...] adds 5cf89ede07c Fix a bug in SCEV's isSafeToExpand around speculation safety adds 830f94639da [SDA] Bug fix: Use IPD outside the loop as divergence bound adds 131a1e538eb [LoopPredication] Allow predication of loop invariant compu [...] adds 814e8a20582 [CMake] Allow custom extensions for externalized debug info adds 85c423e4bee [x86] add tests for improved insertelement to index 0 (PR41 [...] adds 382ffde1a12 [LoopPred] Fix a blatantly obvious bug in r358684 adds e3d0d4094be [X86] combineVectorTruncationWithPACKUS - remove split/conc [...] adds a86d83ad547 [PowerPC] Add some PPC vec cost tests to prep for D60160 NFC adds 2d26e7d78e9 [BlockExtractor] Extend the file format to support the grou [...] adds 278164f26f5 [NFC] FMF propagation for GlobalIsel adds dd4e3b41996 [GuardWidening] Wire up a NPM version of the LoopGuardWiden [...] adds 61c38154e11 llvm-undname: Fix two asserts-on-invalid adds a329ade88f9 llvm-undname: Fix two more asserts-on-invalid, found by oss-fuzz adds d49ac7f542c [GlobalISel][AArch64] Legalize v8s8 loads adds f3a030510b2 [GlobalISel][AArch64] Legalize/select G_(S/Z/ANY)_EXT for v8s8s adds e8c5427cd12 Implement sys::fs::copy_file using the macOS copyfile(3) AP [...] adds ad6b84eda82 [AArch64] add tests for mul-by-element; NFC adds 3cde9bb44e4 [LoopUnroll] Move list of params into a struct [NFCI]. adds 667d4f41076 MergeFunc: preserve COMDAT information when creating a thunk adds f238d270732 [APInt] Optimize umul_ov adds 0ee1200779f [llvm] Prevent duplicate files in debug line header in dwar [...] adds fd1dde1a2f7 [DWARF] Use hasFileAtIndex to properly verify DWARF 5 after [...] adds 44643c3bf23 [X86] Make sure we copy the HandleSDNode back to N before e [...] adds f4c37ecc647 [X86] Add test cases for turning (and (shl X, C1), C2) into [...] adds 9bb76189e69 [X86] Turn (and (shl X, C1), C2) into (shl (and X, (C1 >> C [...] adds 52331e06039 [MergeFunc] Use less_first() as the comparator of Schwartzi [...] adds 5c48ac91390 [CallSite removal] Move the legacy PM, call graph, and som [...] adds 659dbcd5789 [AMDGPU] Ignore non-SUnits edges adds 47ee8e14cc1 [MergeFunc] removeUsers: call remove() only on direct users adds f08f66dccb4 [MergeFunc] Delete unused FunctionNode::release() adds 1a1cf956cce [PATCH] [MachineScheduler] Check pending instructions when [...] adds bba2202bb17 [CodeGen] Add "const" to MachineInstr::mayAlias adds 2df0acd2ffd [AMDGPU] Regenerate extractelt->truncate test. adds cfefa04a680 [llvm-symbolizer] Make the output with -output-style=GNU cl [...] adds e78c62a4e59 [llvm-symbolizer] Unhide and document the "-output-style" option adds dac6480dfd0 [llvm-symbolizer] Add llvm-addr2line adds 719ff993247 Change \r\n -> \n for llvm-symbolizer/help.test after rL358749 adds 79b3f9b3084 [LTO] Add plumbing to save stats during LTO on Darwin. adds 5c6d8a9541a gn build: Merge r358691 adds bbf8cdf0938 gn build: Merge r358722 adds 6a946515b89 llvm-undname: Attempt to fix leak-on-invalid found by oss-fuzz adds 6c4fc48cdcd [SelectionDAG] soften splat mask assert/unreachable (PR41535) adds 507afa30b9c [dsymutil] DwarfLinker: delete unused parameter adds a837603c473 [NewPassManager] Adding pass tuning options: loop vectorize. adds 76a480bcb10 [GlobalISel][AArch64] Legalize vector G_FPOW adds c41225db524 Revert "[GlobalISel] Add legalization support for non-power [...] adds c50b9c40e64 [LICM & MemorySSA] Make limit flags pass tuning options. adds 4a926e0ed80 [gn] Support dots in CMake paths in the sync script adds 5631cdaf4ed [CMake] Pass monorepo build settings in cross compile adds d01dcc93080 [MS] Emit S_HEAPALLOCSITE debug info adds 2ed72ccbc3b [X86] Add test case for D60801. NFC adds b39bdec1f40 [GlobalISel] Add a G_FRINT opcode adds 1d1a3480403 Attempt to fix buildbot failure in commit 1bb57bac959ac163f [...] adds 2f0e14e02f7 [GlobalISel] Add IRTranslator support for G_FRINT adds 00af5211667 [AArch64] Fix checks for AArch64MCExpr::VK_SABS flag. adds 2a0fb965ac5 Remove the EnableEarlyCSEMemSSA set of options from the leg [...] adds b0b325969cb Update GN files to build with r358103 adds 116c7f3025e [GVN+LICM] Use line 0 locations for better crash attribution adds 5477ac97322 [WebAssembly] FastISel: Don't fallback to SelectionDAG afte [...] adds 6b81ae837b7 [GlobalISel][AArch64] Legalize + select G_FRINT adds acd8f7a0e55 Revert "Revert "[GlobalISel] Add legalization support for n [...] adds a1f46fe51cd [WebAssembly] Object: Improve error messages on invalid section adds 10f82c578ff [llvm-objdump] Simplify --{start,stop}-address adds 02d9cc1a8ee [X86] Turn (and (anyextend (shl X, C1), C2)) into (shl (and [...] adds 0428e2f2057 [X86] Don't turn (and (shl X, C1), C2) into (shl (and X, (C [...] adds b28f2143dfe [llvm-objdump] Don't disassemble symbols before SectionAddr adds 03d4298e866 [X86] Fix stack probing on x32 (PR41477) adds 9fc5e57dd8c [CVP] Add tests for sub nowrap inference; NFC adds 8eaf2a6f006 [llvm-objdump] Fix End in disassemblyObject after rL358806 adds de61763a6d4 [ADT] Avoid warning in bsearch testcase adds e886e07a6e3 [IndVarSimplify] Add tests for PR31181; NFC adds f925f4a471b [IndVarSimplify] Generate full checks for some LFTR tests; NFC adds a6744317c98 [llvm-symbolizer] Fix section index at the end of a section adds a1443772d6c [ExecutionDomainFix] Optimize a binary search insertion adds 6e5b564f917 [CorrelatedValuePropagation] Mark subs that we know not to [...] adds a5ce03ca595 [X86] Disable argument copy elision for arguments passed vi [...] adds 91c3f358142 Initial implementation of JITLink - A replacement for RuntimeDyld. adds 4396216e128 [JITLink] Fix a missing header and bad prototype. adds 6c66c715b13 [JITLink] Update BuildingAJIT tutorials to account for API [...] adds ff6a5905bb0 [JITLink] Silence a narrowing conversion warning. adds 1f07bff61eb [JITLink] Use memset instead of bzero. adds b9e1e5f6317 [JITLink] Add llvm-jitlink subdirectory to tools/LLVMBuild.txt adds 3117779b94d [JITLink] Silence some MSVC implicit cast warnings. adds 26be9b17bc8 [JITLink] Add check to JITLink unit test to bail out for un [...] adds 9c955201607 [JITLink] Add more detail to MachO/x86-64 "unsupported relo [...] adds fbdd3f379c4 [JITLink] Add BinaryFormat to JITLink's dependencies. adds b2c9d41bb3c [JITLink] Add llvm-jitlink to the list of available tools in lit. adds 6de3f3796cd Revert r358800. Breaks Obsequi from the test suite. adds e2326898216 [JITLink] Disable MachO/x86-64 regression test if the X86 t [...] adds 5ad46871c1f [JITLink] Fix a bad formatv format string. adds e165e55ce11 [JITLink][ORC] Add JITLink to the list of dependencies for ORC. adds b9674336a4d [JITLink] Add yet more detail to MachO/x86-64 unsupported r [...] adds 772d6f05f13 ftime-trace: Trace the name of the currently active pass as well. adds 594fc0d116f llvm-undname: Improve string literal demangling with embedd [...] adds ca962926fe9 [JITLink] Add dependencies on MCDissassembler and Target to [...] adds deabfea0bcf [gn] Move Features.inc to clangd, create a config for it adds 43a5825e0fe [JITLink] Factor basic common GOT and stub creation code in [...] adds 56839f1fbe9 [BinaryFormat] Fix bitfield-ordering of MachO::relocation_i [...] adds 66fbe58442f [JITLink] Remove an overly strict error check in JITLink's [...] adds b098c5b8bbb [X86] Don't form masked vfpclass instruction from and+vfpcl [...] adds 5f1b9ac4cc1 [JITLink] Add dependency on MCParser to unit test after rL358818 adds 9f787399f09 [CachePruning] Simplify comparator adds a83ee713941 [X86] Add the rounding control operand to the printing for [...] adds cc532a593e0 [ARM] Rewrite isLegalT2AddressImmediate adds a138d18baa9 gn build: Fix build after r358837 adds 2f10db760a4 llvm-undname: Fix stack overflow on invalid found by oss-fuzz adds e1f80841dda [AArch64] add tests with multiple binop+splat vals; NFC adds bfce43af72b [ConstantRange] Add getNonEmpty() constructor adds 66c5f5714a2 [ConstantRange] Add saturating add/sub methods adds f6b23dfdd44 llvm-undname: Fix stack overflow on almost-valid adds ecefdcd2b99 llvm-undname: Fix hex escapes in wchar_t, char16_t, char32_ [...] adds 203b6566a11 [cmake] Fix bug in r358779 - [CMake] Pass monorepo build se [...] adds e6ad146f24b gn build: Merge r358818 (JITLink) adds ccf549467d1 gn build: Merge r358749 adds 4247b8cf91c gn build: Re-run `git ls-files '*.gn' '*.gni' | xargs llvm/ [...] adds 9a138393ff9 [JITLink] Add an option to dump relocated section content. adds 909f6da0ace Attemp get llvm-jitlink building on Windows adds c13dba05ba5 [JITLink] Fix section start address calculation in eh-frame [...] adds 3d0829ea43d [cmake] Add llvm-jit to LLVM_TEST_DEPENDS adds 6ea61174c39 [JITLink] Remove a lot of reduntant 'JITLink_' prefixes. NFC. adds ed992c96ced [X86] Reject 512-bit types in getRegForInlineAsmConstraint [...] adds 09d24ddb891 [ConstantRange] Rename make{Guaranteed -> Exact}NoWrapRegion() NFC adds 4872512fe9c Revert "[ConstantRange] Rename make{Guaranteed -> Exact}NoW [...] adds a277430f59e [NewPM] Add dummy Test for LoopVectorize option parsing. adds 101d574bdb5 [AMDGPU] Regenerate uitofp i8 to float conversion tests. adds 0d3f47606cd [NewPM] Add Option handling for SimpleLoopUnswitch adds c82029e24ce [LLVM-C] Add accessors to the default floating-point metadata node adds f90f1ca6f1b [DAGCombiner] prepare shuffle-of-splat to handle more patte [...] adds 21db1aa77fa [DAGCombiner] make variable name less ambiguous; NFC adds 524491cf14a [TargetLowering][AMDGPU][X86] Improve SimplifyDemandedBits [...] adds 31bd08af2d5 [AMDGPU][MC] Corrected parsing of SP3 'neg' modifier adds 785d1f76449 AMDGPU: Fix not checking for copy when looking at copy src adds 6de91b31ce9 llvm-undname: Fix an assert-on-invalid, found by oss-fuzz adds 3a3f73cffa1 GlobalISel: Legalize scalar G_EXTRACT sources adds 28772f13e68 STLExtras: add stable_sort wrappers adds 4d1518d22a2 AMDGPU/GlobalISel: Fix non-power-of-2 G_EXTRACT sources adds 363521d9e53 Remove spurious semicolons; NFC. adds a736b962ff9 Use llvm::stable_sort. NFC adds 7a0ec3b9438 [PGO/SamplePGO][NFC] Move the function updateProfWeight fro [...] adds 0d5f6245e5e [LPM/BPI] Preserve BPI through trivial loop pass pipeline ( [...] adds 7fe0d9174e7 [IPSCCP] Add missing `AssumptionCacheTracker` dependency adds 3b5296b223c [Tests] Add a negative test for masked.gather part of D59703 adds fe022fd6209 [Tests] Revise a test as requested by reviewer in D59703 adds 22846997f56 AMDGPU: Skip debug instructions in assert adds d0f4144d2c3 Use const DebugLoc& adds aca745e756b gn build: Merge r358869 adds cc1224e64ef [InstSimplify] Move masked.gather w/no active lanes handlin [...] adds be18ec39d59 [Support] unflake TempFileCollisions test adds 4d4ecb16797 [InstCombine] Eliminate stores to constant memory adds 80d580cd44a [dsymutil] Collect parseable Swift interfaces in the .dSYM bundle. adds 77d3eb784a6 [AMDGPU] Fix an issue in `op_sel_hi` skipping. adds 984018e8ff1 Relax test to check for a valid number instead of a specifi [...] adds 7f65c13ecb9 Try to work around compile errors with older versions of GCC. adds 5e45666b12e [SelectionDAG] move splat util functions up from x86 lowering adds e9837b50ef2 DebugInfo: Emit only one kind of accelerated access/name table adds a550ed7e780 Fully qualify llvm::Optional, some compilers complain otherwise. adds 2bed43d4e50 [CMake] Replace the sanitizer support in runtimes build wit [...] adds 8126019320d Revert "Use const DebugLoc&" adds d2e1707318a add Qiu Chaofan (qiucf@cn.ibm.com) to the CREDITS.txt adds 140d73388b1 [WebAssembly] Bail out of fastisel earlier when computing P [...] adds c540d911845 [LSR] Limit the recursion for setup cost adds d0c7e1df707 [llvm-mc] - Properly set the the address align field of the [...] adds 4204ce0fa78 [ARM][FIX] Add missing f16.lane.vldN/vstN lowering adds e86c537628d [AArch64] Add support for MTE intrinsics adds 734bf57ca87 [DAGCombiner] Combine OR as ADD when no common bits are set adds 91902636932 Fix MSVC "32-bit shift implicitly converted to 64 bits" war [...] adds 2429cc586ef Fix MSVC "32-bit shift implicitly converted to 64 bits" war [...] adds decd03f0859 [ARM] Don't replicate instructions in Ifcvt at minsize adds 9a2fa4a0333 [ARM] Update check for CBZ in Ifcvt adds b33e0bfbd76 Removing the explicit specifier from some default construct [...] adds 8fe3ca13edc [CallSite removal] move InlineCost to CallBase usage adds f1c7e10a44d AMDGPU: Fix LCSSA phi lowering in SILowerI1Copies adds 4ef72253f18 [DAGCombiner] generalize binop-of-splats scalarization adds 6d4a3cda92c [Docs] ReleaseNotes: fixup markup in memcmp()->bcmp() entry adds 114570df08c ARM: disallow add/sub to sp unless Rn is also sp. adds 363e1da675c [X86] Pull out collectConcatOps helper. NFCI. adds 7dcce62314b gn build: Merge r358949 adds 5bc7b0c8560 [AMDGPU] Fix hidden argument metadata duplication for V3 adds b1c6cd2e143 gn build: Merge r358944 adds 06d0423cef9 [RISCV] Support assembling %tls_{ie,gd}_pcrel_hi modifiers adds 46622a59090 Use llvm::stable_sort adds aea341f4955 Revert "DebugInfo: Emit only one kind of accelerated access [...] adds 9d3d80ccad4 [SPARC] Use the correct register set for the "r" asm constraint. adds fcd06adc8e2 [x86] use psubus for more vsetcc lowering (PR39859) adds aab3c8c7b38 [InstCombine] Convert a masked.load of a dereferenceable ad [...] adds 17fed035fb7 [dsymutil] Fix use-after-free when sys::path::append grows [...] adds 2bf9685e96d Revert "[dsymutil] Fix use-after-free when sys::path::appen [...] adds 7d596b3b3d5 [dsymutil] Fix use-after-free when sys::path::append grows [...] adds a479f0531bd [x86] add tests for vector fdiv with splat divisor; NFC adds 29a5944cbfa llvm-undname: Support demangling the spaceship operator adds bd11c290c40 [x86] fix test checks for fdiv combine; NFC adds 9a942835667 [dsymutil] Put Swift interface files into a per-arch subdirectory. adds 806052b6943 [APSInt][OpenMP] Fix isNegative, etc. for unsigned types adds b6a93dc59cd [AArch64][GlobalISel] Add G_FMA to isPreISelGenericFloating [...] adds c8d498d36b6 [AliasAnalysis] AAResults preserves AAManager. adds dc75f7557dc [AArch64][GlobalISel] Legalize G_FMA for more vector types adds b4fad1ffbbc [AMDGPU] Fixed addReg() in SIOptimizeExecMaskingPreRA.cpp adds 63748dd992c [ConstantRangeTest] Move helper methods; NFC adds e2e04eaba9e [ConstantRange] Add urem support adds 606081bbc2a [AArch64][GlobalISel] Legalize G_INTRINSIC_TRUNC adds 7cea3739680 [AArch64][GlobalISel] Teach regbankselect about G_INTRINSIC_TRUNC adds b11561a7bff llvm-cvtres: Split addChild(ID) into two functions adds ca681154ce7 [ThinLTO] Pass down opt level to LTO backend and handle -O0 [...] adds a6030f2c0d9 Reapply: "DebugInfo: Emit only one kind of accelerated acce [...] adds 66aa9e14bd0 [ObjC][ARC] Check the basic block size before calling Domin [...] adds a5a971abe22 [AArch64][GlobalISel] Actually select G_INTRINSIC_TRUNC adds 2aee714ecd3 [X86] Autogenerate complete checks. NFC adds a7a3e6435dc [MemorySSA] LCSSA preserves MemorySSA. adds ad14805c43d [AArch64][GlobalISel] Legalize G_INTRINSIC_ROUND adds 320b0cfdcd7 Revert "[MS] Emit S_HEAPALLOCSITE debug info" because of To [...] adds 4febd59e1bd [WebAssembly] Make LBB markers not affected by test order adds 65db0de9a63 [WebAssembly] Emit br_table for most switch instructions adds 7f2f10be2af [X86] Add codegen prepare test exercising a bitcast + tail call adds a8196a8e047 [CGP] Look through bitcasts when duplicating returns for ta [...] adds 0734b610d6b [CMake] Use add_dependencies in add_llvm_install_targets adds b06d1c065f8 The error message for mismatched value sites is very crypti [...] adds aeabb060639 [AArch64][GlobalISel] Mark G_INTRINSIC_ROUND as a pre-isel [...] adds 7fa516f0eba [AArch64][GlobalISel] Select G_INTRINSIC_ROUND adds 07bbdf45645 [Lint] Permit aliasing noalias readonly arguments adds 04dcbb51652 [Remarks] Add string deduplication using a string table adds 2f2940ec9d2 [Remarks] Fix documentation indentation adds 20b802a0258 Revert [AliasAnalysis] AAResults preserves AAManager. adds 064cbbfc2ba gn build: Merge r359050 adds 4f431337c89 gn build: Merge r359050 more adds ebe37abc9ee llvm-cvtres: Accept /? as help flag, like cvtres.exe adds 8b0afcf334b [CommandLine] Provide parser<unsigned long> instantiation t [...] adds 685ae828447 [Mips][CodeGen] Remove MachineFunction::setSubtarget. Chang [...] adds a80a3919ff5 Add "const" in GetUnderlyingObjects. NFC adds 8b62c4ddd9d [X86][SSE] Add masked bit test cases for PR26697 adds 97ae15dc0f0 Let llvm-cvtres (and lld-link) report duplicate resources adds bae5fa7acbd [X86] Add shouldFoldConstantShiftPairToMask override placeh [...] adds 37c286fa0b4 [yaml2elf] - Replace a loop with write_zeros(). NFC. adds e5c799a6eaa [yaml2obj] Replace num_zeros with write_zeros adds eccf5bf0815 [LLVM-C] Use dyn_cast instead of unwrap in LLVMGetDebugLoc [...] adds 03f6e8657c4 [x86] make sure horizontal op and broadcast types match to [...] adds 3c53015c0fb [AMDGPU][MC] Parser cleanup and refactoring adds cf72ee0ee49 [llvm-objdump] errorToErrorCode+message -> toString adds 893591a76eb [obj2yamp] - Simplify and cleanup the code in ELFDumper<ELF [...] adds 25a01d9e01d [llvm-objdump] Delete redundant check adds ea4679cf0f4 [JITLink] Refer to FDE's CIE (not the most recent CIE) when [...] adds aae1f9f35a4 llvm-undname: Fix assert-on->4GiB-string-literal, found by [...] adds 1c93fd793ca Revert "[llvm-objdump] errorToErrorCode+message -> toString" adds 7847a7c9b09 [InstCombine][X86] Use generic expansion of PACKSS/PACKUS f [...] adds f43d543c450 [AMDGPU] Add gfx1010 target definitions adds f26b156fd2f [LLVM-C] Deprecate the LLVMValueRef-returning metadata crea [...] adds a104dee58e1 [JITLink] Add support for passing arguments to jit-linked code. adds be725587086 [X86][SSE] Add tests for bitcasting vXi1 bool vectors to no [...] adds e01c22c12ca [AMDGPU] gfx1010 sgpr register changes adds fc1e1596751 [X86] Remove dead nodes left after ReplaceAllUsesWith calls [...] adds d7f88bede7e DebugInfo: Emit only declarations (not whole definitions) o [...] adds c66f2ef76dd Revert using fcopyfile(3) to implement sys::fs::copy_file(T [...] adds 9d62c908358 llvm-cvtres: Remove a default argument. No behavior change. adds c28a81a948e [X86] Prevent folding a load into an AND if that AND is rea [...] adds a67600cb79c Add optional arg to profile count getters to filter synthet [...] adds 3b06e633b7c Try once more to ensure constant initializaton of ManagedStatics adds e4f3b1f2203 [SLP] Fix crash after r358519, by V. Porpodas. adds 3d167665188 [AMDGPU] gfx1010 SOP instructions adds 60dfd2cbae6 [X86] Attempt to fix use-after-poison from r359121. adds 4d4155f08ea Add period at end of comment. adds 4eb4e8f21e2 [PowerPC] Allow using initial-exec TLS with PIC adds 42ee3f57985 [DAGCombiner] scale repeated FP divisor by splat factor adds ec039c845f7 Recommitting r358783 and r358786 "[MS] Emit S_HEAPALLOCSITE [...] adds c10146f5952 Mark new jitlink test XFAIL for windows adds 7574f402403 posix_spawn should retry upon EINTR adds 4679ff91863 llvm-cvtres: Make new dupe resource error a bit friendlier adds 020519ba5c9 Fix spelling error. NFC adds da7391081a4 [utils] Add a lldb data formatter for llvm::SmallString. adds 3aaefe3c4fb [InstCombine] Be consistent w/handling of masked intrinsics [...] adds 811169a0d4c Fix unused variable warning in LoopFusion pass. adds bc60690d7c0 Consolidate existing utilities for interpreting vector pred [...] adds f73a9f2ea64 [llvm-objdump] errorToErrorCode+message -> toString adds 6ac87016ff5 Enable LoopVectorization by default. adds 6d952a8d10e [llvm-rtdyld] Add support for passing command line argument [...] adds d48017b0a18 [JITLink] Make the JITLink MachO/x86-64 eh-frame test work [...] adds c0edd71cfff [X86] Remove part of an if condition that should always be true. adds 36cbe77a6ee [MIPS] Use custom bitcast lowering to avoid excessive instructions adds 4dc16655bd0 [NFC][LoopIdiomRecognize] Some basic baseline tests for bcm [...] adds 4021ab72ee3 [Support] Add a GTest matcher for Optional<T> adds d6778e97e07 [X86][SSE] combineBitcastvxi1 - add support for bitcasting [...] adds 3919a663cf1 Fix include order. NFCI. adds 774be285dec [yaml2obj] - Don't crash on invalid inputs. adds 497e112ae76 [Testing] Move clangd::Annotations to llvm testing support adds 32986d30ff2 [ConstantRange] [a, b) udiv a full range is [0, umax(b)). adds 777fdf48449 [llvm-objdump] Prep for adding newlines before and after "D [...] adds 8e834b5cde5 Parallel: only allow the first TaskGroup to run tasks parallelly adds 4bc5e93aac0 [Support] Try to unbreak windows buildbot adds 50b4f7f5164 [InstCombine][X86] Add PACKSS/PACKUS tests for truncation w [...] adds 2802669519a [Support] Add JSON streaming output API, faster where the h [...] adds f1bbf582c4e gn build: Merge r359142 adds 3785277ee44 gn build: Merge r359174 adds 9be5d08cda7 gn build: Merge r359179 adds cce940f6102 [Support] json::OStream::flush(), which passes through to t [...] adds 9801d57f94a [InstCombine][X86] Tweak generic expansion of PACKSS/PACKUS [...] adds 02e74daab34 gn build: Make setting llvm_enable_dia_sdk=true work adds b750e532942 gn build: Document llvm_enable_dia_sdk variable better adds 205ee18e7bf Revert "[JITLink] Make the JITLink MachO/x86-64 eh-frame te [...] adds e0dc647b6b9 [GlobalISel] Add a G_FNEARBYINT opcode adds f702279be5d [GlobalISel] Add IRTranslator support for G_FNEARBYINT adds e6dbec3d993 [GlobalISel][AArch64] Legalize G_FNEARBYINT adds e5a6b5fca20 [Evaluator] Walk initial elements when handling load throug [...] adds 2d0f20640c8 [SelectionDAG][X86] Use stack load/store in PromoteIntRes_B [...] adds 194fea7ca5c [GlobalISel][AArch64] Add generic legalization rule for extends adds 6ae9485eb18 [AMDGPU] gfx1010 utility functions adds 85430e7ae4f [AMDGPU] gfx1010 VOP1 instructions adds 85656d2bc35 [ObjC][ARC] Let ARC optimizer bail out if the number of poi [...] adds 9629553b790 [GlobalISel][AArch64] Make G_EXTRACT_VECTOR_ELT legal for v8s16s adds 434bbb1a68d Assigning to a local object in a return statement prevents [...] adds 8f63d03e3a1 [x86] add tests for vector fdiv reciprocal estimate; NFC adds 334c00d1843 [AMDGPU] gfx1010 - fix ubsan failure adds 8d8655b728c [CMake][PowerPC] Recognize LLVM_NATIVE_TARGET="ppc64le" as PowerPC adds 2dd904abdbe [Object][XCOFF] Add intial support for section header table. adds 5100f1a2e03 [NVPTX] Refactor generation of MMA intrinsics and instructi [...] adds 5446c675c46 [NVPTX] generate correct MMA instruction mnemonics with PTX63+. adds 9e3c94a04ca PTX 6.3 extends `wmma` instruction to support s8/u8/s4/u4/b [...] adds 03f06f0ea67 [CUDA] Implemented _[bi]mma* builtins. adds 79fafc77f92 [ORC] Remove symbols from dependency lists when failing mat [...] adds baf32fac2bf [GlobalOpt] Swap the expensive check for cold calls with th [...] adds f0d90ddef56 [llvm-objcopy] Accept --long-option but not -long-option adds 15ec5331296 [NFC] Add baseline tests for int isKnownNonZero adds 81503f15aeb Fix typos: (re)?sor?uce -> (re)?source adds 3ab1cc18bb7 [GlobalISel] Fix inserting copies in the right position for [...] adds d51e7039947 Fix alignment in AArch64InstructionSelector::emitConstantPo [...] adds 75b3428a2d2 [InferAddressSpaces] Add AS parameter to the pass factory adds 8a0d120e526 [X86][AVX] Combine shuffles extracted from a common vector adds cc6487ed563 [X86][SSE] Disable shouldFoldConstantShiftPairToMask for bt [...] adds f52833fc113 caseFoldingDjbHash: simplify and make the US-ASCII fast pat [...] adds 0f088d27207 Minor formatting tweak, no behavior change adds edf11da4586 [X86][SSE] Pull out OR(EXTRACTELT(X,0),OR(EXTRACTELT(X,1),. [...] adds 8399432f4d8 [yaml2elf] - Cleanup the initSectionHeaders(). NFCI. adds c10ed4a9142 [yaml2obj] - Make the code to match the LLVM style. NFCI. adds e7abc631a80 Fix Wparentheses warning. NFCI. adds 99defed408c [yaml2obj] - Remove excessive variable. NFC. adds 8c64c7b7cce [yaml2obj] - Make implicitSectionNames() return std::vector [...] adds a60dd53ba44 Fix llvm-objcopy/ELF/preserve-segment-contents test on UTF- [...] adds d3cefe91ff7 [x86] add tests for fmin/fmax; NFC adds 1fca16d27ba s/Dwarf 5/DWARF v5/ NFC adds d6daf8ea6cc [llvm-nm][llvm-size] Use --double-dash options in tests adds 8f6c93d9586 [docs] Put DefaultOption bullet in alphabetical order. adds 249f7ff6189 [llvm-nm] Fix handling of symbol types 't' 'd' 'r' adds 242f845edf2 [llvm-nm] Generalize symbol types 'N', 'n' and '?' adds 61c60646999 [PowerPC] Update P9 vector costs for insert/extract element adds 46455ed8dee [ThinLTO] Fix X86/strong_non_prevailing.ll after llvm-nm 'r [...] adds 1fbc8d5ac0c [llvm-nm] Revert inadvertently committed 'i' change in r359314 adds 834873d34dc [AMDGPU] gfx1010 VOP2 changes adds 72692e8b5fc [X86] Segment registers should have i16 type not i32. adds 4027ba94cd5 [X86] Sink NoRegister creation for unused Base/Index regist [...] adds 0393ba9ec66 [ConstantRange] Add abs() support adds 47eab8f7fa1 [DAGCombine] Cleanup visitEXTRACT_SUBVECTOR. NFCI. adds 09f8a0f6a0c [AMDGPU] gfx1010 VOP3 and VOP3P implementation adds 05a31451d24 [AArch64][GlobalISel] Select G_BSWAP for vectors of s32 and s64 adds 4db70c21dc6 [X86][AVX] Fold extract_subvector(broadcast(x)) -> broadcas [...] adds b3cb8ab4512 [AsmPrinter] refactor to support %c w/ GlobalAddress' adds 2ee5a852296 [GlobalISel][AArch64] Use getConstantVRegValWithLookThrough [...] adds 357f4e4a0d0 [ORC] Add a 'plugin' interface to ObjectLinkingLayer for ev [...] adds ec58673cfdb [AMDGPU] gfx1010 VOPC implementation adds dfc7fb5622f Revert "AMDGPU: Split block for si_end_cf" adds bb63d993091 [X86] Use MOVQ for i64 atomic_stores when SSE2 is enabled adds 7047808b81b [cmake] Disable a GCC optimization when building LLVM for MIPS adds a90f8c6f4dd [MCA] Add field `IsEliminated` to class Instruction. NFCI adds 14033682e64 [X86][AVX] Merge mask select with shuffles across extract_s [...] adds 93fdfcf73b3 [X86][SSE] Add initial test case for subvector insert/extra [...] adds 8017e0f1ec4 [llvm-nm] Support section type 'u': STB_GNU_UNIQUE adds fc0f1f504b8 [DJB] Fix variable case after D61178 adds 5378974fbac Fix check-prefixes typo adds 89bcca25b48 [llvm-nm][llvm-readelf] Avoid single-dash -long-option in tests adds 59757b45361 [lli] Fix a typo in a cl::opt description. adds 416f89e2ccf [X86] Add vector boolean reduction tests (PR38840) adds 8c3e398a3c2 [X86][AVX512] Improve vector bool reductions adds 2060bec1eb6 [X86][AVX] Cleanup and add additional expandload and compre [...] adds df4ebd860c1 [X86][SSE] Add support for <64 x i1> bool reduction adds f0586753f10 [X86][AVX] Add additional SSE/AVX expandload and compressst [...] adds 723da7d3790 Revert rL359389: [X86][SSE] Add support for <64 x i1> bool [...] adds 2b887560b63 [X86] Remove (V)MOV64toSDrr/m and (V)MOVDI2SSrr/m. Use 128- [...] adds 1571d111a22 [X86][AVX] Add AVX512DQ coverage for masked memory ops test [...] adds 509a83cf303 [X86][SSE] Optimize llvm.experimental.vector.reduce.xor.vXi [...] adds 75bade7f3a5 [MCA] Fix typo in AVX2 gather tests. NFC adds 88f49fa5ef0 [DAGCombiner] try repeated fdiv divisor transform before bu [...] adds 750719fb74b [SelectionDAG] include FP min/max variants as binary operators adds a53eda72ec6 [X86][AVX] Combine non-lane crossing binary shuffles using [...] adds 2fa97aca166 [X86][AVX] Enabled AVX512F tests and add PR40815 test case adds 3547a7e64e6 [ConstantRange] Add makeExactNoWrapRegion() adds 1ea33c5f832 [X86][SSE] combineExtractVectorElt - add early-out to retur [...] adds b4966362f9a [X86] Add PR39936 HADD Tests adds f3be67d655e [X86][AVX] Add fast-hops target for add/fadd reduction tests adds b7310f53898 [X86] Add PR39921 HADD pairwise reduction test and AVX2 tes [...] adds 828c798b901 llvm-cvtres: Attempt to make llvm-cvtres/duplicate.test wor [...] adds 4b63c292e5d [llvm-nm] Simplify and fix a buffer overflow adds e600c4a42a2 [llvm-nm] -print-size => --print-size adds 7eeddf7b5a3 [X86] Remove some intel syntax aliases on (v)cvtpd2(u)dq, ( [...] adds 3dcb38043ef [DWARF] Delete a redundant check in getFileNameByIndex() adds ed6033f1119 [DWARF] Fix dump of local/foreign TU lists in .debug_names adds 74e964e3d17 [DebugInfo] Terminate more location-list ranges at the end [...] adds d73fac045a0 Try to use /proc on FreeBSD for getExecutablePath adds 7242b0b24e3 gn: Fix check-clang build after r359179 adds 6905c42d117 vs integration: Use llvm-lib for librarian adds bb84648816b [ARM] Add v4f16 and v8f16 types to the CallingConv adds 87ba52d9d83 [ARM] Add bitcast/extract_subvec. of fp16 vectors adds 23f2209524f [InstCombine][X86] Add PACKSS tests for truncation of sign- [...] adds ee8d96fcfbd [X86][SSE] Moved haddps test from phaddsub.ll to haddsub.ll [...] adds 984cea84b9d [yaml2obj] - Cleanup and simplify the code. NFCI. adds 9d44c8826a7 [yaml2obj] - Replace a loop with write_zeros(). NFCI. adds 2bd7c60ff75 [yaml2obj] - Simplify and reduce the code. NFC. adds e8fab5b74fa [LoopSimplifyCFG] Suppress expensive DomTree verification adds 4a42ca47715 FileCheck [2/12]: Stricter parsing of -D option adds 9043d57972c [X86][SSE] Add scalar horizontal add/sub tests for non-0/1 [...] adds f3de5a58e62 [AArch64][SVE] Asm: add aliases for unpredicated bitwise lo [...] adds 9a295623baa [X86] Remove duplicate string comparison adds e972c4e0da3 Add AVX support to this test. adds 7af7d4cc84b [BlockExtractor] Change the basic block separator from ',' to ';' adds 226fd2b61ab [BlockExtractor] Expose a constructor for the group extraction adds b90e8d33754 [llvm-extract] Expose the group extraction feature of the B [...] adds 0937a0dc774 Remove superfluous break from switch statement. NFCI. adds adf2773f0f3 Fix operator precedence warning. NFCI. adds 5a80baf3bc5 Move if() to newline to stop ambiguity over whether it shou [...] adds beaee00a16d Avoid "checking a pointer after dereferencing" warning. NFCI. adds 1c43195dbd2 [TableGen] Fix null pointer dereferencing. adds 11c60390e35 FileCheck [3/12]: Stricter parsing of @LINE expressions adds 57b216445b2 [DAG] Refactor DAGCombiner::ReassociateOps adds 0e061ed4b8a [llvm-mca][x86] Fix MMX PMOVMSKB test adds 825a67d1c43 [TextAPI] Fix Symbol::dump which was failing to append the [...] adds dcced60532b [X86] scaleShuffleMask - avoid potential signed overflow warning. adds 9054a63dc1d [CommandLine] Don't allow unlimitted dashes for options. Pa [...] adds 8488f421468 [globalisel] Improve Legalizer debug output adds e3da0d820a3 [InstCombine] visitFCmpInst - appease copy+paste pattern wa [...] adds f285d5529e5 Remove duplicate line. NFCI. adds 263756f949c Fix additional cases of more that two dashes for options in tests. adds c316d0f95bc [InstCombine] reduce code duplication; NFC adds 88a6655a2eb computePolynomialFromPointer - add missing early-out return [...] adds ec0f1aa3248 [llvm-pdbutil] FunctionDumper::dump(PDBSymbolTypeFunctionAr [...] adds 74390f6fa67 [X86][SSE] isHorizontalBinOp - add support for target shuffles adds de608b0409a Fix string UAF in new FileCheck test adds 88c3ba17c4c [gn] Use label_name rather than target_output_name for objects adds 5fbb9b38334 Fix one more case of passing options with too many dashes. adds 44e9471abc0 [X86] Run CFIInstrInserter on Windows if Dwarf is used adds 78733c026ea [UpdateTestChecks] Allow Lbegin_func without a leading period adds 9f1715e4231 [GlobalISel][AArch64] Select llvm.aarch64.crypto.sha1h adds 076a39af996 [PowerPC] Try harder to avoid load/move-to VSR for partial [...] adds 4f53d5f4e7d [WebAssembly] Define the signature for __stack_chk_fail adds 036707485e9 [ThinLTO] Adding architecture name into saved object filename adds 01da091f106 [WebAssembly] Make an assertion message prettier. NFC. adds 18a863c7e9c [JITLink] Move a typedef. adds 0b8468ca095 [ORC] Replace the LLJIT/LLLazyJIT Create methods with Build [...] adds 45db55e52e4 gn build: Merge r359252 adds 033bb22f798 [PDB] Fix hash function used to write /src/headerblock adds 50257f1a7ac Add __builtin_dcbf support for PPC adds a47aa18633d [MemorySSA] Invalidate MemorySSA if AA or DT are invalidated. adds 159303d49d1 [PDB] Fixed null pointer dereference adds 9a1c76870e4 [ORC] Allow JITDylib definition generators to return Errors. adds eb132e02b35 [CommandLine} Wire-up cl::list::setDefault() so it will wor [...] adds ffc144faab8 [clangd] Fix GN build adds f235e145c91 [ORC] Fix an ambiguous call in a unit test. adds 392c1020bc6 [DAGCombiner] Do not generate ISD::ADDE node if adde is not [...] adds 4e6d30850cf [NFC][PowerPC] Use -check-prefixes to simplify the check in [...] adds 6e99e91c292 [DebugInfo] DW_OP_deref_size in PrologEpilogInserter. adds a5ffeed7eff MSan: handle llvm.lifetime.start intrinsic adds 67c2691c8d8 [TargetLowering] Change getOptimalMemOpType to take a funct [...] adds 4f2449575fb [ARM GlobalISel] Be more careful about bailing out adds a74e48852fc [AsmPrinter] Make AsmPrinter::HandlerInfo::Handler a unique_ptr adds ec5cc76de0a [ARM GlobalISel] Widen small shift operands adds 88adfde7792 [TargetLowering] findOptimalMemOpLowering. NFCI. adds 303e8942609 Revert r359520 adds 157e3211894 Fix for bug 41512: lower INSERT_VECTOR_ELT(ZeroVec, 0, Elt) [...] adds 71dbcf0b111 [ARM] Implement TTI::getMemcpyCost adds a9a1e42b679 Update checks in an instcombine test, NFC adds b9ccf789ff0 [llvm-objcopy] - Check dynamic relocation sections for brok [...] adds f9c960409f5 [SLP] Lit test that cannot get vectorized due to lack of lo [...] adds 883da93f677 Revert rL359519 : [MemorySSA] Invalidate MemorySSA if AA or [...] adds 7c027b7c725 [cmake] Fix error message on simulated VS version check adds 876105e2532 vs integration: vs2019 support adds efd0651c27d [TableGen] Fix null pointer dereferencing in token parser. adds 491c3dc2ef0 [AArch64] add tests for fdiv/frem constant folding (PR41668); NFC adds 5a901e32bba gn build: Merge r359455 adds b6730a33abd [llvm-nm] Add --special-syms no-op flag adds b413eefa644 [SelectionDAG] remove div-by-zero constant folding restriction adds b1f70e75986 [llvm-objcopy] Add RISC-V support for -B/-O adds 46a00fa36f7 Add llvm-profdata to LLVM_TOOLCHAIN_TOOLS adds b0114c7fd8e gn build: Add check-clangd target after r3359424 adds ed4e4a5f8d3 Re-reland "[Option] Fix PR37006 prefix choice in findNearest" adds ac11bf55be4 [X86] Initial cleanups on the FixupLEAs pass. Separate Atom [...] adds 0da6fd7b2d9 [X86] If PreprocessISelDAG reorders a load before a call, m [...] adds a5e3bec5e4a [AArch64] add more tests for constant folding failures; NFC adds 37c4380fae8 [SimplifyLibCalls] Clean up code (NFC) adds 65f4024cf21 [X86] Remove if that's always true adds 8171cf2106b [WebAssembly] Support f16 libcalls adds f8e418c85a4 [WebAssembly] Support EXPLICIT_NAME symbols in llvm-readobj adds bb327bcc1eb Fix stack-use-after free after r359580 adds 555f5334afc [WebAssembly] Fix test after r359602 adds e575d78842a [X86][SSE] Fold extract_subvector(extend(x)) -> extend_vect [...] adds 7266bfef68c [NFC][InlineCost] cleanup - comments, overflow handling. adds 6967efe577e [llvm-profdata] Add overlap command to compute similarity b [...] adds 7f26fc050a4 [ORC][JITLink] Name in-memory compiled objects after their [...] adds ef6f977b4b0 [JITLink] Add debugging output to print resolved external atoms. adds 1e33097313a [PassManagerBuilder] Add option for interleaved loops, for [...] adds 6696a873d8a Fix a few -Werror warnings: - Remove a variable only used [...] adds c4dc3aaa99d Add an include of Module since we actually access it now an [...] adds 664a9b18283 [llvm-profdata] Fix indentation error. NFC adds 0b378026ac0 [AMDGPU] gfx1010 VMEM and SMEM implementation adds ddcc2ba1016 [AliasAnalysis/NewPassManager] Invalidate AAManager less often. adds c88c740bf65 [llvm-profdata] Fix indentation error in docs. NFC. adds 4c1872ad8fd [ORC] Move SimpleCompiler/ConcurrentIRCompiler definitions [...] adds c049743f982 [MemorySSA] Invalidate MemorySSA if AA or DT are invalidated. adds 15f67f93fcc [WebAssembly] Test the "wasm32-wasi" triple adds 93849fdc0d4 [InstCombine] Limit a vector demanded elts rule which was p [...] adds f437a9d225b [WebAssembly] Update expectations for gcc torture tests adds 61fd3a9c047 gn build: Merge r359626 adds 6afe82bf843 gn build: Fix build on macOS after r359570 / r359527 adds 7912c3276cc [llvm-objcopy] Simplify SHT_NOBITS -> SHT_PROGBITS promotion adds b404cbffb3a Make some comments that were meant to be for public documen [...] adds b78c93233b7 [JITLink] Make sure we explicitly deallocate memory on failure. adds 4e8c482aa12 Delete outdated comment about DISubprogram. NFC adds 9697ae39f6b Revert "[llvm] r359313 - [PowerPC] Update P9 vector costs f [...] adds a60f2167443 [llvm-readobj] Change -long-option to --long-option in tests. NFC adds e15998ba201 [llvm-readobj] llvm-readobj --elf-output-style=GNU => llvm- [...] adds 6a1ce946d76 Fix test/tools/llvm-readobj/mips-plt.test adds 570034ca114 [X86FixupLEAs] Hoist the calls to isLEA out of the 3 separa [...] adds 530166f5386 [gold] Fix two readelf tests after rL359649 adds fceaf762c0f [llvm-readobj] Change -t to --symbols in tests. NFC adds 7845a5f0b1c [yaml2obj] - Report when unknown section is referenced from [...] adds 7aac3dc1f7f [X86][SSE] Extract i1 elements from vXi1 bool vectors adds dcae8cc3053 [X86] SimplifyDemandedVectorEltsForTargetNode - pull out ve [...] adds 2a774bf95f8 [llvm-objdump] Print newlines before and after "Disassembly [...] adds 10164fd0af4 [X86][SSE] Move extract_subvector(pshufb) fold to SimplifyD [...] adds 2514755c379 [X86][SSE] Add X86ISD::UNPCKL\UNPCK to SimplifyDemandedVect [...] adds d99b5efaf03 [X86][SSE] Add scalar horizontal add/sub tests for element [...] adds 789617d109d [X86][SSE] Add X86ISD::PACKSS\PACKUS to SimplifyDemandedVec [...] adds 32c7e441d61 DAG: allow DAG pointer size different from memory representation. adds 2fca0afb560 [X86][SSE] Add 512-bit vector support to SimplifyDemandedVe [...] adds 4d65e3204f4 [X86][SSE] Split 512-bit -> 128-bit vector directly in Simp [...] adds 9f35ee5b0fa Wrap to 80 columns, no behavior change adds 8dd2ffc9c56 [X86][SSE] Add SSE vector shift support to SimplifyDemanded [...] adds f880a637c43 [LoopInfo] Faster implementation of setLoopID. NFC. adds 28a57e37b20 Fix OptTable::findNearest() adding delimiter for free adds d6a2755daa3 [X86][SSE] Add demanded elts support X86ISD::PMULDQ\PMULUDQ adds 34408e058a0 [llvm-ar][llvm-nm][llvm-size] Change -long-option to --long [...] adds 4a06880a6be [tests] Add host-byteorder-*-endian; update XFAILs of big-e [...] adds 92bb3811f28 [lit][tests][AIX] Update expected form of diagnostic messag [...] adds f951f157709 [SCEV] Use isKnownViaNonRecursiveReasoning for smax simplification adds 01f30d23609 Fix 80 column violation. NFCI. adds 99f07c223c3 Revert "[DAGCombiner] try repeated fdiv divisor transform b [...] adds 6cfe68df52a [AMDGPU] gfx1010 DS implementation adds 506313c1cd7 [ThinLTO] Fix unreachable code when parsing summary entries. adds 542de76c159 [AMDGPU] gfx1010 MIMG implementation adds 1c29f9f7f50 [AMDGPU] gfx1010 GCNNSAReassign pass adds 24da1864838 Option spell checking: Penalize delimiter flags if input ha [...] adds 791e0e1dab0 [AMDGPU] gfx1010 GCNRegBankReassign pass adds 41f17d51ca3 [globalisel] Update the legalizer documentation adds d2b54b2dcfd [X86][SSE] Fold scalar horizontal add/sub for non-0/1 eleme [...] adds bb390d4f07f [PowerPC] add test that could infinite loop with reordered [...] adds 52810e6419b Convert PDB docs to unix line endings. No other changes. adds a27c90973c8 Minor tweaks to PDB docs adds 38278e6ec75 Make check-clang depend on the clang-check binary always adds 97aed04cd16 Try to unbreak sphinx bot after r359714 adds 534153e0e51 [AArch64] Add tests for bool vector reductions; NFC adds f488f84a49d [GlobalISel][AArch64] Use fmov for G_FCONSTANT when possible adds 5fb18b5a09e [ORC] Pass object buffer ownership back in NotifyEmitted. adds ff700028d6e [PGO][CHR] A bug fix. adds 7ca366e7ad1 Fix erroneous flag in GISel line for arm64-fast-isel-materi [...] adds 3ce957556e9 Revert r359717, "Make check-clang depend on the clang-check [...] adds 3abee1bcf33 FileCheck [4/12]: Introduce @LINE numeric expressions adds 70d009dbe3f [FileCheck] Fix line-count.txt test adds 5993a0e6f3d remove inalloca parameters in globalopt and simplify argpromotion adds d49213afe09 lld-link: Make "duplicate resource" error message a bit mor [...] adds 6031ec5a281 [X86] Remove the redundant suffix in vfpclassp[d,s]'s broad [...] adds 2090ec980a8 [AMDGPU] gfx1010 constant bus limit adds ffc5401cfb9 [AMDGPU] gfx1010 allows VOP3 to have a literal adds aaa381547b0 [AMDGPU] gfx1010 lost VOP2 forms of some add/sub adds a65cc965dba [Support] Don't check MAP_ANONYMOUS, just use MAP_ANON adds c69acccf970 Object/Minidump: Add support for the ThreadList stream adds de63356ef33 [NFC][PowerPC] Return early if the element type is not byte [...] adds 5827f9803fd [ARM GlobalISel] Legalize extensions to < 32 bits adds 1e513e8bae8 [ARM GlobalISel] Rename some inst selector tests. NFC adds b4dded67c1c [ARM GlobalISel] Select extensions to < 32 bits adds 1cdcccce015 [ARM GlobalISel] Fixup r359768 adds 61afdad9ff3 [Object] Change getSectionName() to return Expected<StringRef> adds 5a5132a8f60 [llvm-readobj] Delete and inline relocAddressLess adds 5d21e156553 [LTO] Migrate typedef to using adds efbb95e52b2 [llvm-strip]Add --no-strip-all to disable --strip-all behav [...] adds b79c73bd103 [X86][SSE] Move shouldUseHorizontalOp inside isHorizontalBi [...] adds 3314e6578bf [X86][SSE] lowerAddSubToHorizontalOp - enable ymm extraction+fold adds 14debde13b4 [SelectionDAG] remove constant folding limitations based on [...] adds fdad1772495 [DAGCombiner] try repeated fdiv divisor transform before bu [...] adds 6f0a807eb66 [gn] Support for building libunwind adds d0fed051738 [gn] Support for building libcxxabi adds e1e3e97c88e [gn] Support for building libc++ adds 2513bdea075 [gn] Include libcxx configuration file adds d86591e1d1f [yaml2obj] - Make interface of `NameToIdxMap` class be huma [...] adds 86b49e2b741 build: add option to disable unwind tables adds 38333049114 Typo Functino->Function. adds e7742fbc215 [gn] Update the clangd test lit site configuration adds e3fd85dbc9b [gn] Include the missing BUILD.gn file for libcxxabi includes adds 22e5490c8c6 lld-link: Add /force:multipleres extension to make dupe res [...] adds a29d0581e92 Revert [llvm-nm] Fix handling of symbol types + [llvm-nm] G [...] adds bc336f7800e Revert [ThinLTO] Fix X86/strong_non_prevailing.ll after llv [...] adds 8ee6c576e4f [X86] Remove string literal from an if. NFC adds 74ddb12afb4 [AArch64] Update for Exynos adds a49df1725a4 [SelectionDAG] Add asserts to verify the vectorness of inpu [...] adds 5d32e7e45e4 [X86] Correct the register class for specific mask register [...] adds 05dfbb61376 [X86] Remove LEA16r references from X86FixupLEAs. NFCI adds fa0da850cf0 [MemorySSA] Refactor removing multiple trivial phis [NFC]. adds 15bfdc5aa55 [MemorySSA] Check that block is reachable when adding phis. adds 55e1924e110 [AArch64][Windows] Compute function length correctly in unw [...] adds e4ea2878b89 Tidy up a comment, fix a typo, remove a comment that's obsolete. adds 5fef53737ef [AArch64][MC] Reject "add x0, x1, w2, lsl #1" etc. adds cd3a6717de3 [IRTranslator] Use the alloc size instead of the store size [...] adds a3ca2fac7a2 [docs] Add support for Markdown documentation when creating [...] adds 2ce4ce4f925 [X86] Add more one checks to masked compare patterns that w [...] adds 88f274d0c01 Reduce variable scope to just the if() block its actually u [...] adds cc60a82400c [MIR] Add simple PRE pass to MachineCSE adds e7a9035e5a9 [X86] LowerMULH - remove unused Lo/Hi vector indices. NFCI. adds f220841ba9d [SelectionDAG] computeKnownBits - remove some duplicate/sha [...] adds c9e3d6eb7ca [SelectionDAG] Use INT_MIN as (1 << 31) is UB for signed in [...] adds c4825211ba1 Revert "[MIR] Add simple PRE pass to MachineCSE" adds e6913f371ac [TargetLowering] expandUnalignedStore - cleanup EVT variabl [...] adds c0bc443a7f6 [Object][XCOFF] Add an XCOFF dumper for llvm-readobj. adds 866bc92c5d6 [CodeGenPrepare] limit overflow intrinsic matching to a sin [...] adds 81b9a7ea319 [LICM] auto-generate complete test checks; NFC adds 0c09729c672 AMDGPU: Fix test verification adds 8edcece164a AMDGPU: Fix incorrect commute with sub when folding immediates adds a5aaefa640f Avoid cppcheck operator precedence warnings. NFCI. adds ed547e5c992 AMDGPU: Forgot to commit test file for r358890 adds 5ad1beb265c [X86] Add X64 common prefixes and regenerate mul i64 tests adds cd541eae98f Let --discard-all imply --strip-debug. adds 1c83fcd2eb1 gn build: Merge r359878 adds 78b8beba129 [X86] Remove repeated variables. NFCI. adds 88cd80cbfaa [TargetLowering] ShrinkDemandedConstant - reduce scope of T [...] adds 6db8359b59f AMDGPU: Replace shrunk instruction with dummy implicit_def adds 87b83a5a91c AMDGPU: Add baseline test for future patch adds 21fecfed0d5 AMDGPU: Remove redundant patterns for sub adds c79eef95e31 AMDGPU: Remove redundant patterns for shifts adds 4ecc6104fe5 [x86] add tests for fneg with undefs; NFC adds fe774a05f6b Revert r359549 - incorrect update of test checks. NFC adds bec96285e22 AMDGPU: Support shrinking add with FI in SIFoldOperands adds 7b6c63da6c7 AMDGPU: Select VOP3 form of sub adds 1bd3f5a7f47 [SelectionDAG] CreateTopologicalOrder - don't use iterator adds a3b81fe4c3b [X86] LowerToHorizontalOp - Tidyup calls to getHopForBuildV [...] adds b5f456a009d [llvm] Revert r231274: "Devirtualize ~parser<T> by making i [...] adds 00136e6ee26 [X86] Allow assembly parser to accept x/y/z suffixes on non [...] adds c6f864f3dd5 [Docs][CodeGenerator][eBPF] Correct the values for BPF_X and BPF_K adds 3823edb806c [hexagon] change AsmParser assertion to error adds ca31476482f RegAllocFast: Add heuristic to detect values not live-out o [...] adds ff2899148ab Revert "[CodeGenPrepare] limit overflow intrinsic matching [...] adds 0eff58c79b6 [CommandLine] Change help output to prefix long options wit [...] adds f6c50a2804e [TargetLowering] SimplifySetCC - remove repeated variable. NFCI. adds 53c6ce1a39c Revert r359906, "RegAllocFast: Add heuristic to detect valu [...] adds 660a1eaf65f [DAGCombine] Remove repeated variables. NFCI. adds 1b473158caf [CommandLine] Enable Grouping for short options by default. [...] adds edc4b499375 Reapply r359906, "RegAllocFast: Add heuristic to detect val [...] adds 40bcb88e84e [COFF, ARM64] Fix ABI implementation of struct returns adds 6b1290a4aef [AMDGPU] gfx1010 loop alignment adds 5cc88b4c521 Update PatternMatcher for FNeg adds c08c654e2bd [AMDGPU] gfx1010 s_code_end generation adds dbda053c6a6 [AMDGPU] gfx1010 wait count insertion adds 26506e182a2 Make the git-llvm script work on older git versions that do [...] adds 7bd3baab03a [AArch64][GlobalISel] Use fcsel instead of csel for G_SELEC [...] adds 6bbf836d66c [x86] add tests for fneg IR with undef; NFC adds 966c1da7e6c [JITLink] Add two useful Section operations: find by name, [...] adds 7f5f3184316 [AMDGPU] gfx1010: use fmac instructions adds eaed68f0e50 AMDGPU] gfx1010 hazard recognizer adds 229e72a7bbd [AMDGPU] Fixed asan error after D61536 adds ca61b388158 [llvm-nm] Convert weak.test to use yaml2obj and fix unntested 'v' adds addf0bb7c54 [CodeGenPrepare] limit overflow intrinsic matching to a sin [...] adds 02b892331ca Add InstCombine tests for FNeg instruction. adds 3118c88eb80 Move Value *RHSCIOp def into the scope where its actually u [...] adds 6d334130f69 [SelectionDAG] Use any_of/all_of where possible. NFCI. adds e181a08aa98 [SLPVectorizer] Make getSpillCost() const. NFCI. adds 9f29d014cc6 [X86] Fix some cppcheck "Local variable name shadows outer [...] adds 07745b7d6a9 [X86] Make X86RegisterInfo(const Triple &TT) constructor explicit. adds ed1ec3ab254 Add FNeg IR constant folding support adds 3055634df9b [MCA] Notify event listeners when instructions transition t [...] adds d92dfb01fb6 [Constants] Simplify type checking switch in ConstantExpr::get. adds 06329d8c0a7 [LLParser] Simplify type checking in ParseArithmetic and Pa [...] adds 192935978d7 [LLParser] Remove unnecessary error check making sure NUW/N [...] adds 56b34911f35 [LLParser] Remove unused variable after r359987. NFC adds 24ceb56a154 [SLPVectorizer] Prefer pre-increments. NFCI. adds d16e0561726 Precommit an FNeg InstructionSimplify test. adds 937feb0cb0a Move getOpcode() call into if statement. NFCI. adds 14a15e16352 [NFC][Utils] deleteDeadLoop(): add an assert that exit bloc [...] adds bd7d65fb0aa [NFC] Instruction: introduce replaceSuccessorWith() functio [...] adds 14d59d23ed0 [NFC] PHINode: introduce replaceIncomingBlockWith() functio [...] adds fb75d573291 [NFC] BasicBlock: refactor changePhiUses() out of replacePh [...] adds 261aa93b1b4 [NFC] BasicBlock: generalize replaceSuccessorsPhiUsesWith() [...] adds abf63388b0d [TTI][X86] Make getAddressComputationCost cost value const. NFCI. adds 9d10770f15b [TargetLowering] getValueType - use dyn_cast directly to fi [...] adds dca684aae6c [X86] Pull out repeated Subtarget feature tests. NFCI. adds f3d0806ca54 [libcxx] Don't use -fvisibility-global-new-delete-hidden wh [...] adds add267ee8b2 [libcxxabi] Don't use -fvisibility-global-new-delete-hidden [...] adds 898a57b6f70 [SelectionDAG] Replace llvm_unreachable at the end of getCo [...] adds 30cb0a380c4 [llvm-c] Make LLVMGetStringErrorTypeId a proper prototype adds e2e5db42702 [DebugInfo] GlobalOpt DW_OP_deref_size instead of DW_OP_deref. adds 0d9a164240e DWARF v5: fix directory index in the line table adds 0e258a059f0 Enable AVX512_BF16 instructions, which are supported for BF [...] adds bf07beb7a0d [NFC] This is a test for the commit access. adds 137f7dfd510 [SimplifyLibCalls] Simplify bcmp too. adds 318f4ec372e [X86] Move files to correct directories after D60552 adds 6c0b0214bb6 [NFC] Update memcpy tests adds 80c8cbf2665 [Analysis] Remove duplicated std::move from LocRange constructor adds b09bb10c44f [X86] lowerVectorShuffle - use any_of to detect out of boun [...] adds 14f718c33ff [X86] X86InstrInfo::findThreeSrcCommutedOpIndices - fix unr [...] adds 4ca52ef5db5 [CodeGen] Move X86 tests under the X86 directory adds 0fc49e75a43 [LoadStoreVectorizer] vectorizeStoreChain - ensure we find [...] adds ad658270ef1 [llvm-c-test] Make include-all.c do what its name says it does adds 7532c70f193 Try fix Windows bot after rL360015 adds d4bd8706de5 Try fix Windows bot after rL360015 adds 4602240d20d [test] Remove redundant bracket in rL360035 adds 004df2ab002 X86DAGToDAGISel::tryVPTESTM - fix uninitialized variable wa [...] adds 8d416103aa9 [PowerPC] Fix erroneous condition for converting uint-to-fp [...] adds 059c038861e Fix compilation warnings when compiling with GCC 7.3 adds b8b62917a15 Fix CMake Invalid Escape Sequence adds 6839a18a045 [X86] Fix uninitialized members in constructor warnings. NFCI. adds b6888d2b1dd gn build: Merge r360018 adds 05783c1b047 Modernize repmovsb implementation of x86 memcpy and allow r [...] adds fb0402e8092 [InstCombine] reduce code duplication; NFCI adds 0f6bb4c8066 [InstCombine] regenerate test checks; NFC adds a0a00583bde Add FNeg support to InstructionSimplify adds 68567bed6e0 [SDAG][AArch64] Boolean and/or reduce to umax/min reduce (PR41635) adds c686868a5ef [ConstantRange] Add srem() support adds c964cd58b3f gn build: Update TODO now that libcxx libcxxabi libunwind c [...] adds 2b1dde63b7c gn build: More TODO tweaking adds b671419b088 [InstCombine] add tests for fneg+sel; NFC adds f8e9cda8fc7 [InstCombine] reduce code duplication; NFC adds 92576a984ea Add libc++ to link XRay test cases if libc++ is used to bui [...] adds 2b5a3dcc3bf Remove duplicate assignments. NFCI. adds ce031c4986a Fix more Windows bots after r360015. Depending on the envir [...] adds 577c662984b Revert r359392 and r358887 adds 4ad9ccc7ee2 [GlobalISel] Handle <1 x T> vector return types properly. adds 6b9cd72c1b5 [SelectionDAG][X86] Support inline assembly returning an mm [...] adds 20c6b7a70e3 Pull out repeated CI->getCalledFunction() calls. NFCI. adds 08fde8af369 gn build: Merge r360063. adds fe9414d0ccb [InstCombine] sink FP negation of operands through select adds ae58e02d394 [AArch64] Default to SEH exception handling on MinGW adds 8816e4b5356 [X86] Remove the suffix on vcvt[u]si2ss/sd register variant [...] adds c8792bba0a8 Revert "Re-commit r357452: SimplifyCFG SinkCommonCodeFromPr [...] adds 17ff07813bb [AMDGPU] gfx1010 memory legalizer adds c2f2a95a8ab [X86] Add more test cases for fast-isel handling of fneg. adds ca13910a6c9 Fix pr33010, a 2 year old crashing regression adds 96ebfdf0edb [Tests] Autogen a test in advance of updates adds 6ea1089e5d4 [Tests] Rename tests before adding new ones adds db1fed765e2 [Tests] Add tests for optimized lowerings of element.unorde [...] adds 116060bd7d6 [AMDGPU] gfx1010: prefer V_MUL_LO_U32 over V_MUL_LO_I32 adds 99c7e3c0329 [AMDGPU] gfx1010 verifier changes adds ccb55c763ac [X86] Add test case to show that we don't set the kill flag [...] adds fb9e306bf19 [FastISel] Pass the fneg input operand to hasTrivialKill in [...] adds 69b042c01dc [ARM] Glue register copies to tail calls. adds 1f72a0337f0 Fix bug in getCompleteTypeIndex in codeview debug info adds cd6ffd67498 [X86] Use extended vector register classes in getRegForInli [...] adds 352106fe145 Refactor UnaryOperator class new 0b7752e3229 Creating branches/google/stable and tags/google/stable/2019 [...]

The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference.

Summary of changes: .clang-tidy | 2 +- .gitignore | 2 + CMakeLists.txt | 124 +- CREDITS.TXT | 23 +- LICENSE.TXT | 261 +- LLVMBuild.txt | 7 +- README.txt | 1 - bindings/LLVMBuild.txt | 7 +- bindings/go/llvm/IRBindings.cpp | 11 +- bindings/go/llvm/IRBindings.h | 11 +- bindings/go/llvm/InstrumentationBindings.cpp | 10 +- bindings/go/llvm/InstrumentationBindings.h | 7 +- bindings/go/llvm/SupportBindings.cpp | 7 +- bindings/go/llvm/SupportBindings.h | 7 +- bindings/go/llvm/analysis.go | 7 +- bindings/go/llvm/bitreader.go | 7 +- bindings/go/llvm/bitwriter.go | 7 +- bindings/go/llvm/dibuilder.go | 7 +- bindings/go/llvm/executionengine.go | 7 +- bindings/go/llvm/executionengine_test.go | 7 +- bindings/go/llvm/ir.go | 13 +- bindings/go/llvm/ir_test.go | 11 +- bindings/go/llvm/linker.go | 7 +- bindings/go/llvm/llvm_dep.go | 7 +- bindings/go/llvm/string.go | 7 +- bindings/go/llvm/string_test.go | 7 +- bindings/go/llvm/support.go | 7 +- bindings/go/llvm/target.go | 7 +- bindings/go/llvm/transforms_coroutines.go | 7 +- bindings/go/llvm/transforms_instrumentation.go | 7 +- bindings/go/llvm/transforms_ipo.go | 7 +- bindings/go/llvm/transforms_pmbuilder.go | 7 +- bindings/go/llvm/transforms_scalar.go | 7 +- bindings/go/llvm/version.go | 7 +- bindings/ocaml/all_backends/all_backends_ocaml.c | 8 +- bindings/ocaml/all_backends/llvm_all_backends.ml | 7 +- bindings/ocaml/all_backends/llvm_all_backends.mli | 7 +- bindings/ocaml/analysis/analysis_ocaml.c | 8 +- bindings/ocaml/analysis/llvm_analysis.ml | 7 +- bindings/ocaml/analysis/llvm_analysis.mli | 7 +- bindings/ocaml/backends/backend_ocaml.c | 8 +- bindings/ocaml/backends/llvm_backend.ml.in | 7 +- bindings/ocaml/backends/llvm_backend.mli.in | 7 +- bindings/ocaml/bitreader/bitreader_ocaml.c | 8 +- bindings/ocaml/bitreader/llvm_bitreader.ml | 7 +- bindings/ocaml/bitreader/llvm_bitreader.mli | 7 +- bindings/ocaml/bitwriter/bitwriter_ocaml.c | 8 +- bindings/ocaml/bitwriter/llvm_bitwriter.ml | 7 +- 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lib/Target/ARM/MCTargetDesc/ARMTargetStreamer.cpp | 7 +- lib/Target/ARM/MCTargetDesc/ARMUnwindOpAsm.cpp | 7 +- lib/Target/ARM/MCTargetDesc/ARMUnwindOpAsm.h | 7 +- .../ARM/MCTargetDesc/ARMWinCOFFObjectWriter.cpp | 7 +- lib/Target/ARM/MCTargetDesc/ARMWinCOFFStreamer.cpp | 7 +- lib/Target/ARM/MCTargetDesc/LLVMBuild.txt | 7 +- lib/Target/ARM/MLxExpansionPass.cpp | 7 +- lib/Target/ARM/TargetInfo/ARMTargetInfo.cpp | 7 +- lib/Target/ARM/TargetInfo/LLVMBuild.txt | 7 +- lib/Target/ARM/Thumb1FrameLowering.cpp | 7 +- lib/Target/ARM/Thumb1FrameLowering.h | 7 +- lib/Target/ARM/Thumb1InstrInfo.cpp | 7 +- lib/Target/ARM/Thumb1InstrInfo.h | 7 +- lib/Target/ARM/Thumb2ITBlockPass.cpp | 7 +- lib/Target/ARM/Thumb2InstrInfo.cpp | 11 +- lib/Target/ARM/Thumb2InstrInfo.h | 7 +- lib/Target/ARM/Thumb2SizeReduction.cpp | 13 +- lib/Target/ARM/ThumbRegisterInfo.cpp | 7 +- lib/Target/ARM/ThumbRegisterInfo.h | 7 +- lib/Target/ARM/Utils/ARMBaseInfo.cpp | 7 +- lib/Target/ARM/Utils/ARMBaseInfo.h | 7 +- lib/Target/ARM/Utils/LLVMBuild.txt | 7 +- lib/Target/AVR/AVR.h | 7 +- lib/Target/AVR/AVR.td | 7 +- lib/Target/AVR/AVRAsmPrinter.cpp | 26 +- lib/Target/AVR/AVRCallingConv.td | 7 +- lib/Target/AVR/AVRExpandPseudoInsts.cpp | 17 +- lib/Target/AVR/AVRFrameLowering.cpp | 7 +- lib/Target/AVR/AVRFrameLowering.h | 7 +- lib/Target/AVR/AVRISelDAGToDAG.cpp | 7 +- lib/Target/AVR/AVRISelLowering.cpp | 49 +- lib/Target/AVR/AVRISelLowering.h | 15 +- lib/Target/AVR/AVRInstrFormats.td | 7 +- lib/Target/AVR/AVRInstrInfo.cpp | 10 +- lib/Target/AVR/AVRInstrInfo.h | 7 +- lib/Target/AVR/AVRInstrInfo.td | 45 +- lib/Target/AVR/AVRMCInstLower.cpp | 7 +- lib/Target/AVR/AVRMCInstLower.h | 7 +- lib/Target/AVR/AVRMachineFunctionInfo.h | 7 +- lib/Target/AVR/AVRRegisterInfo.cpp | 7 +- lib/Target/AVR/AVRRegisterInfo.h | 7 +- lib/Target/AVR/AVRRegisterInfo.td | 7 +- lib/Target/AVR/AVRRelaxMemOperations.cpp | 7 +- lib/Target/AVR/AVRSelectionDAGInfo.h | 7 +- lib/Target/AVR/AVRSubtarget.cpp | 19 +- lib/Target/AVR/AVRSubtarget.h | 12 +- lib/Target/AVR/AVRTargetMachine.cpp | 7 +- lib/Target/AVR/AVRTargetMachine.h | 7 +- lib/Target/AVR/AVRTargetObjectFile.cpp | 7 +- lib/Target/AVR/AVRTargetObjectFile.h | 7 +- lib/Target/AVR/AsmParser/AVRAsmParser.cpp | 23 +- lib/Target/AVR/AsmParser/LLVMBuild.txt | 7 +- lib/Target/AVR/Disassembler/AVRDisassembler.cpp | 7 +- lib/Target/AVR/Disassembler/LLVMBuild.txt | 7 +- lib/Target/AVR/InstPrinter/AVRInstPrinter.cpp | 7 +- lib/Target/AVR/InstPrinter/AVRInstPrinter.h | 7 +- lib/Target/AVR/InstPrinter/LLVMBuild.txt | 7 +- lib/Target/AVR/LLVMBuild.txt | 7 +- lib/Target/AVR/MCTargetDesc/AVRAsmBackend.cpp | 7 +- lib/Target/AVR/MCTargetDesc/AVRAsmBackend.h | 7 +- lib/Target/AVR/MCTargetDesc/AVRELFObjectWriter.cpp | 7 +- lib/Target/AVR/MCTargetDesc/AVRELFStreamer.h | 7 +- lib/Target/AVR/MCTargetDesc/AVRFixupKinds.h | 7 +- lib/Target/AVR/MCTargetDesc/AVRMCAsmInfo.cpp | 8 +- lib/Target/AVR/MCTargetDesc/AVRMCAsmInfo.h | 7 +- lib/Target/AVR/MCTargetDesc/AVRMCCodeEmitter.cpp | 7 +- lib/Target/AVR/MCTargetDesc/AVRMCCodeEmitter.h | 7 +- lib/Target/AVR/MCTargetDesc/AVRMCELFStreamer.cpp | 7 +- lib/Target/AVR/MCTargetDesc/AVRMCELFStreamer.h | 7 +- lib/Target/AVR/MCTargetDesc/AVRMCExpr.cpp | 7 +- lib/Target/AVR/MCTargetDesc/AVRMCExpr.h | 7 +- lib/Target/AVR/MCTargetDesc/AVRMCTargetDesc.cpp | 7 +- lib/Target/AVR/MCTargetDesc/AVRMCTargetDesc.h | 7 +- lib/Target/AVR/MCTargetDesc/AVRTargetStreamer.cpp | 7 +- lib/Target/AVR/MCTargetDesc/AVRTargetStreamer.h | 7 +- lib/Target/AVR/MCTargetDesc/LLVMBuild.txt | 7 +- lib/Target/AVR/TargetInfo/AVRTargetInfo.cpp | 7 +- lib/Target/AVR/TargetInfo/LLVMBuild.txt | 7 +- lib/Target/BPF/AsmParser/BPFAsmParser.cpp | 9 +- lib/Target/BPF/AsmParser/LLVMBuild.txt | 7 +- lib/Target/BPF/BPF.h | 7 +- lib/Target/BPF/BPF.td | 8 +- lib/Target/BPF/BPFAsmPrinter.cpp | 24 +- lib/Target/BPF/BPFCallingConv.td | 7 +- lib/Target/BPF/BPFFrameLowering.cpp | 7 +- lib/Target/BPF/BPFFrameLowering.h | 7 +- lib/Target/BPF/BPFISelDAGToDAG.cpp | 7 +- lib/Target/BPF/BPFISelLowering.cpp | 64 +- lib/Target/BPF/BPFISelLowering.h | 11 +- lib/Target/BPF/BPFInstrFormats.td | 8 +- lib/Target/BPF/BPFInstrInfo.cpp | 7 +- lib/Target/BPF/BPFInstrInfo.h | 7 +- lib/Target/BPF/BPFInstrInfo.td | 111 +- lib/Target/BPF/BPFMCInstLower.cpp | 7 +- lib/Target/BPF/BPFMCInstLower.h | 7 +- lib/Target/BPF/BPFMIChecking.cpp | 104 +- lib/Target/BPF/BPFMIPeephole.cpp | 7 +- lib/Target/BPF/BPFRegisterInfo.cpp | 7 +- lib/Target/BPF/BPFRegisterInfo.h | 7 +- lib/Target/BPF/BPFRegisterInfo.td | 7 +- lib/Target/BPF/BPFSelectionDAGInfo.cpp | 7 +- lib/Target/BPF/BPFSelectionDAGInfo.h | 7 +- lib/Target/BPF/BPFSubtarget.cpp | 13 +- lib/Target/BPF/BPFSubtarget.h | 12 +- lib/Target/BPF/BPFTargetMachine.cpp | 7 +- lib/Target/BPF/BPFTargetMachine.h | 7 +- lib/Target/BPF/BTF.def | 9 +- lib/Target/BPF/BTF.h | 35 +- lib/Target/BPF/BTFDebug.cpp | 286 +- lib/Target/BPF/BTFDebug.h | 69 +- lib/Target/BPF/Disassembler/BPFDisassembler.cpp | 12 +- lib/Target/BPF/Disassembler/LLVMBuild.txt | 7 +- lib/Target/BPF/InstPrinter/BPFInstPrinter.cpp | 7 +- lib/Target/BPF/InstPrinter/BPFInstPrinter.h | 7 +- lib/Target/BPF/InstPrinter/LLVMBuild.txt | 7 +- lib/Target/BPF/LLVMBuild.txt | 7 +- lib/Target/BPF/MCTargetDesc/BPFAsmBackend.cpp | 19 +- lib/Target/BPF/MCTargetDesc/BPFELFObjectWriter.cpp | 7 +- lib/Target/BPF/MCTargetDesc/BPFMCAsmInfo.h | 7 +- lib/Target/BPF/MCTargetDesc/BPFMCCodeEmitter.cpp | 14 +- lib/Target/BPF/MCTargetDesc/BPFMCTargetDesc.cpp | 7 +- lib/Target/BPF/MCTargetDesc/BPFMCTargetDesc.h | 7 +- lib/Target/BPF/MCTargetDesc/LLVMBuild.txt | 7 +- lib/Target/BPF/TargetInfo/BPFTargetInfo.cpp | 7 +- lib/Target/BPF/TargetInfo/LLVMBuild.txt | 7 +- lib/Target/Hexagon/AsmParser/HexagonAsmParser.cpp | 27 +- lib/Target/Hexagon/AsmParser/LLVMBuild.txt | 7 +- lib/Target/Hexagon/BitTracker.cpp | 7 +- lib/Target/Hexagon/BitTracker.h | 7 +- .../Hexagon/Disassembler/HexagonDisassembler.cpp | 9 +- lib/Target/Hexagon/Disassembler/LLVMBuild.txt | 7 +- lib/Target/Hexagon/Hexagon.h | 7 +- lib/Target/Hexagon/Hexagon.td | 7 +- lib/Target/Hexagon/HexagonAsmPrinter.cpp | 19 +- lib/Target/Hexagon/HexagonAsmPrinter.h | 13 +- lib/Target/Hexagon/HexagonBitSimplify.cpp | 7 +- lib/Target/Hexagon/HexagonBitTracker.cpp | 7 +- lib/Target/Hexagon/HexagonBitTracker.h | 7 +- lib/Target/Hexagon/HexagonBlockRanges.cpp | 7 +- lib/Target/Hexagon/HexagonBlockRanges.h | 7 +- lib/Target/Hexagon/HexagonBranchRelaxation.cpp | 7 +- lib/Target/Hexagon/HexagonCFGOptimizer.cpp | 7 +- lib/Target/Hexagon/HexagonCallingConv.td | 7 +- lib/Target/Hexagon/HexagonCommonGEP.cpp | 24 +- lib/Target/Hexagon/HexagonConstExtenders.cpp | 7 +- lib/Target/Hexagon/HexagonConstPropagation.cpp | 7 +- lib/Target/Hexagon/HexagonCopyToCombine.cpp | 7 +- lib/Target/Hexagon/HexagonDepArch.h | 7 +- lib/Target/Hexagon/HexagonDepArch.td | 7 +- lib/Target/Hexagon/HexagonDepDecoders.h | 79 - lib/Target/Hexagon/HexagonDepDecoders.inc | 78 + lib/Target/Hexagon/HexagonDepIICHVX.td | 7 +- lib/Target/Hexagon/HexagonDepIICScalar.td | 7 +- lib/Target/Hexagon/HexagonDepITypes.h | 7 +- lib/Target/Hexagon/HexagonDepITypes.td | 7 +- lib/Target/Hexagon/HexagonDepInstrFormats.td | 7 +- lib/Target/Hexagon/HexagonDepInstrInfo.td | 7 +- lib/Target/Hexagon/HexagonDepMapAsm2Intrin.td | 7 +- lib/Target/Hexagon/HexagonDepMappings.td | 7 +- lib/Target/Hexagon/HexagonDepOperands.td | 7 +- lib/Target/Hexagon/HexagonDepTimingClasses.h | 7 +- lib/Target/Hexagon/HexagonEarlyIfConv.cpp | 7 +- lib/Target/Hexagon/HexagonExpandCondsets.cpp | 9 +- lib/Target/Hexagon/HexagonFixupHwLoops.cpp | 7 +- lib/Target/Hexagon/HexagonFrameLowering.cpp | 15 +- lib/Target/Hexagon/HexagonFrameLowering.h | 7 +- lib/Target/Hexagon/HexagonGenExtract.cpp | 9 +- lib/Target/Hexagon/HexagonGenInsert.cpp | 7 +- lib/Target/Hexagon/HexagonGenMux.cpp | 7 +- lib/Target/Hexagon/HexagonGenPredicate.cpp | 7 +- lib/Target/Hexagon/HexagonHardwareLoops.cpp | 7 +- lib/Target/Hexagon/HexagonHazardRecognizer.cpp | 7 +- lib/Target/Hexagon/HexagonHazardRecognizer.h | 7 +- lib/Target/Hexagon/HexagonIICHVX.td | 19 +- lib/Target/Hexagon/HexagonIICScalar.td | 7 +- lib/Target/Hexagon/HexagonISelDAGToDAG.cpp | 12 +- lib/Target/Hexagon/HexagonISelDAGToDAG.h | 7 +- lib/Target/Hexagon/HexagonISelDAGToDAGHVX.cpp | 7 +- lib/Target/Hexagon/HexagonISelLowering.cpp | 41 +- lib/Target/Hexagon/HexagonISelLowering.h | 12 +- lib/Target/Hexagon/HexagonISelLoweringHVX.cpp | 9 +- lib/Target/Hexagon/HexagonInstrFormats.td | 7 +- lib/Target/Hexagon/HexagonInstrFormatsV5.td | 7 +- lib/Target/Hexagon/HexagonInstrFormatsV60.td | 7 +- lib/Target/Hexagon/HexagonInstrFormatsV65.td | 7 +- lib/Target/Hexagon/HexagonInstrInfo.cpp | 46 +- lib/Target/Hexagon/HexagonInstrInfo.h | 13 +- lib/Target/Hexagon/HexagonIntrinsics.td | 7 +- lib/Target/Hexagon/HexagonIntrinsicsV5.td | 7 +- lib/Target/Hexagon/HexagonIntrinsicsV60.td | 7 +- lib/Target/Hexagon/HexagonLoopIdiomRecognition.cpp | 19 +- lib/Target/Hexagon/HexagonMCInstLower.cpp | 7 +- lib/Target/Hexagon/HexagonMachineFunctionInfo.cpp | 7 +- lib/Target/Hexagon/HexagonMachineFunctionInfo.h | 7 +- lib/Target/Hexagon/HexagonMachineScheduler.cpp | 9 +- lib/Target/Hexagon/HexagonMachineScheduler.h | 7 +- lib/Target/Hexagon/HexagonMapAsm2IntrinV62.gen.td | 7 +- lib/Target/Hexagon/HexagonMapAsm2IntrinV65.gen.td | 7 +- lib/Target/Hexagon/HexagonNewValueJump.cpp | 7 +- lib/Target/Hexagon/HexagonOperands.td | 7 +- lib/Target/Hexagon/HexagonOptAddrMode.cpp | 7 +- lib/Target/Hexagon/HexagonOptimizeSZextends.cpp | 7 +- lib/Target/Hexagon/HexagonPatterns.td | 11 +- lib/Target/Hexagon/HexagonPatternsV65.td | 7 +- lib/Target/Hexagon/HexagonPeephole.cpp | 7 +- lib/Target/Hexagon/HexagonPseudo.td | 12 +- lib/Target/Hexagon/HexagonRDFOpt.cpp | 7 +- lib/Target/Hexagon/HexagonRegisterInfo.cpp | 7 +- lib/Target/Hexagon/HexagonRegisterInfo.h | 7 +- lib/Target/Hexagon/HexagonRegisterInfo.td | 7 +- lib/Target/Hexagon/HexagonSchedule.td | 7 +- lib/Target/Hexagon/HexagonScheduleV5.td | 7 +- lib/Target/Hexagon/HexagonScheduleV55.td | 7 +- lib/Target/Hexagon/HexagonScheduleV60.td | 7 +- lib/Target/Hexagon/HexagonScheduleV62.td | 7 +- lib/Target/Hexagon/HexagonScheduleV65.td | 7 +- lib/Target/Hexagon/HexagonScheduleV66.td | 7 +- lib/Target/Hexagon/HexagonSelectionDAGInfo.cpp | 7 +- lib/Target/Hexagon/HexagonSelectionDAGInfo.h | 7 +- .../Hexagon/HexagonSplitConst32AndConst64.cpp | 7 +- lib/Target/Hexagon/HexagonSplitDouble.cpp | 11 +- lib/Target/Hexagon/HexagonStoreWidening.cpp | 7 +- lib/Target/Hexagon/HexagonSubtarget.cpp | 7 +- lib/Target/Hexagon/HexagonSubtarget.h | 7 +- lib/Target/Hexagon/HexagonTargetMachine.cpp | 7 +- lib/Target/Hexagon/HexagonTargetMachine.h | 7 +- lib/Target/Hexagon/HexagonTargetObjectFile.cpp | 7 +- lib/Target/Hexagon/HexagonTargetObjectFile.h | 7 +- lib/Target/Hexagon/HexagonTargetStreamer.h | 7 +- lib/Target/Hexagon/HexagonTargetTransformInfo.cpp | 7 +- lib/Target/Hexagon/HexagonTargetTransformInfo.h | 7 +- lib/Target/Hexagon/HexagonVExtract.cpp | 7 +- lib/Target/Hexagon/HexagonVLIWPacketizer.cpp | 7 +- lib/Target/Hexagon/HexagonVLIWPacketizer.h | 7 +- .../Hexagon/HexagonVectorLoopCarriedReuse.cpp | 20 +- lib/Target/Hexagon/HexagonVectorPrint.cpp | 7 +- lib/Target/Hexagon/LLVMBuild.txt | 7 +- .../Hexagon/MCTargetDesc/HexagonAsmBackend.cpp | 7 +- lib/Target/Hexagon/MCTargetDesc/HexagonBaseInfo.h | 7 +- .../MCTargetDesc/HexagonELFObjectWriter.cpp | 7 +- .../Hexagon/MCTargetDesc/HexagonFixupKinds.h | 7 +- .../Hexagon/MCTargetDesc/HexagonInstPrinter.cpp | 7 +- .../Hexagon/MCTargetDesc/HexagonInstPrinter.h | 7 +- .../Hexagon/MCTargetDesc/HexagonMCAsmInfo.cpp | 7 +- lib/Target/Hexagon/MCTargetDesc/HexagonMCAsmInfo.h | 7 +- .../Hexagon/MCTargetDesc/HexagonMCChecker.cpp | 7 +- lib/Target/Hexagon/MCTargetDesc/HexagonMCChecker.h | 7 +- .../Hexagon/MCTargetDesc/HexagonMCCodeEmitter.cpp | 9 +- .../Hexagon/MCTargetDesc/HexagonMCCodeEmitter.h | 14 +- .../Hexagon/MCTargetDesc/HexagonMCCompound.cpp | 7 +- .../Hexagon/MCTargetDesc/HexagonMCDuplexInfo.cpp | 7 +- .../Hexagon/MCTargetDesc/HexagonMCELFStreamer.cpp | 9 +- .../Hexagon/MCTargetDesc/HexagonMCELFStreamer.h | 10 +- lib/Target/Hexagon/MCTargetDesc/HexagonMCExpr.cpp | 7 +- lib/Target/Hexagon/MCTargetDesc/HexagonMCExpr.h | 7 +- .../Hexagon/MCTargetDesc/HexagonMCInstrInfo.cpp | 7 +- .../Hexagon/MCTargetDesc/HexagonMCInstrInfo.h | 7 +- .../Hexagon/MCTargetDesc/HexagonMCShuffler.cpp | 7 +- .../Hexagon/MCTargetDesc/HexagonMCShuffler.h | 7 +- .../Hexagon/MCTargetDesc/HexagonMCTargetDesc.cpp | 7 +- .../Hexagon/MCTargetDesc/HexagonMCTargetDesc.h | 7 +- .../Hexagon/MCTargetDesc/HexagonShuffler.cpp | 7 +- lib/Target/Hexagon/MCTargetDesc/HexagonShuffler.h | 7 +- lib/Target/Hexagon/MCTargetDesc/LLVMBuild.txt | 7 +- lib/Target/Hexagon/RDFCopy.cpp | 7 +- lib/Target/Hexagon/RDFCopy.h | 7 +- lib/Target/Hexagon/RDFDeadCode.cpp | 7 +- lib/Target/Hexagon/RDFDeadCode.h | 7 +- lib/Target/Hexagon/RDFGraph.cpp | 29 +- lib/Target/Hexagon/RDFGraph.h | 34 +- lib/Target/Hexagon/RDFLiveness.cpp | 8 +- lib/Target/Hexagon/RDFLiveness.h | 9 +- lib/Target/Hexagon/RDFRegisters.cpp | 7 +- lib/Target/Hexagon/RDFRegisters.h | 7 +- .../Hexagon/TargetInfo/HexagonTargetInfo.cpp | 7 +- lib/Target/Hexagon/TargetInfo/LLVMBuild.txt | 7 +- lib/Target/LLVMBuild.txt | 7 +- lib/Target/Lanai/AsmParser/LLVMBuild.txt | 7 +- lib/Target/Lanai/AsmParser/LanaiAsmParser.cpp | 7 +- lib/Target/Lanai/Disassembler/LLVMBuild.txt | 7 +- .../Lanai/Disassembler/LanaiDisassembler.cpp | 7 +- lib/Target/Lanai/Disassembler/LanaiDisassembler.h | 7 +- lib/Target/Lanai/InstPrinter/LLVMBuild.txt | 7 +- lib/Target/Lanai/InstPrinter/LanaiInstPrinter.cpp | 7 +- lib/Target/Lanai/InstPrinter/LanaiInstPrinter.h | 7 +- lib/Target/Lanai/LLVMBuild.txt | 7 +- lib/Target/Lanai/Lanai.h | 7 +- lib/Target/Lanai/Lanai.td | 7 +- lib/Target/Lanai/LanaiAluCode.h | 7 +- lib/Target/Lanai/LanaiAsmPrinter.cpp | 13 +- lib/Target/Lanai/LanaiCallingConv.td | 7 +- lib/Target/Lanai/LanaiDelaySlotFiller.cpp | 7 +- lib/Target/Lanai/LanaiFrameLowering.cpp | 7 +- lib/Target/Lanai/LanaiFrameLowering.h | 7 +- lib/Target/Lanai/LanaiISelDAGToDAG.cpp | 7 +- lib/Target/Lanai/LanaiISelLowering.cpp | 7 +- lib/Target/Lanai/LanaiISelLowering.h | 7 +- lib/Target/Lanai/LanaiInstrFormats.td | 7 +- lib/Target/Lanai/LanaiInstrInfo.cpp | 18 +- lib/Target/Lanai/LanaiInstrInfo.h | 16 +- lib/Target/Lanai/LanaiInstrInfo.td | 7 +- lib/Target/Lanai/LanaiMCInstLower.cpp | 7 +- lib/Target/Lanai/LanaiMCInstLower.h | 7 +- lib/Target/Lanai/LanaiMachineFunctionInfo.cpp | 7 +- lib/Target/Lanai/LanaiMachineFunctionInfo.h | 7 +- lib/Target/Lanai/LanaiMemAluCombiner.cpp | 10 +- lib/Target/Lanai/LanaiRegisterInfo.cpp | 7 +- lib/Target/Lanai/LanaiRegisterInfo.h | 7 +- lib/Target/Lanai/LanaiRegisterInfo.td | 7 +- lib/Target/Lanai/LanaiSchedule.td | 7 +- lib/Target/Lanai/LanaiSelectionDAGInfo.cpp | 7 +- lib/Target/Lanai/LanaiSelectionDAGInfo.h | 7 +- lib/Target/Lanai/LanaiSubtarget.cpp | 7 +- lib/Target/Lanai/LanaiSubtarget.h | 7 +- lib/Target/Lanai/LanaiTargetMachine.cpp | 7 +- lib/Target/Lanai/LanaiTargetMachine.h | 7 +- lib/Target/Lanai/LanaiTargetObjectFile.cpp | 7 +- lib/Target/Lanai/LanaiTargetObjectFile.h | 7 +- lib/Target/Lanai/LanaiTargetTransformInfo.h | 7 +- lib/Target/Lanai/MCTargetDesc/LLVMBuild.txt | 7 +- lib/Target/Lanai/MCTargetDesc/LanaiAsmBackend.cpp | 7 +- lib/Target/Lanai/MCTargetDesc/LanaiBaseInfo.h | 7 +- .../Lanai/MCTargetDesc/LanaiELFObjectWriter.cpp | 7 +- lib/Target/Lanai/MCTargetDesc/LanaiFixupKinds.h | 7 +- lib/Target/Lanai/MCTargetDesc/LanaiMCAsmInfo.cpp | 7 +- lib/Target/Lanai/MCTargetDesc/LanaiMCAsmInfo.h | 7 +- .../Lanai/MCTargetDesc/LanaiMCCodeEmitter.cpp | 7 +- lib/Target/Lanai/MCTargetDesc/LanaiMCExpr.cpp | 7 +- lib/Target/Lanai/MCTargetDesc/LanaiMCExpr.h | 7 +- .../Lanai/MCTargetDesc/LanaiMCTargetDesc.cpp | 7 +- lib/Target/Lanai/MCTargetDesc/LanaiMCTargetDesc.h | 7 +- lib/Target/Lanai/TargetInfo/LLVMBuild.txt | 7 +- lib/Target/Lanai/TargetInfo/LanaiTargetInfo.cpp | 7 +- lib/Target/MSP430/AsmParser/LLVMBuild.txt | 7 +- lib/Target/MSP430/AsmParser/MSP430AsmParser.cpp | 7 +- lib/Target/MSP430/Disassembler/LLVMBuild.txt | 7 +- .../MSP430/Disassembler/MSP430Disassembler.cpp | 7 +- lib/Target/MSP430/InstPrinter/LLVMBuild.txt | 7 +- .../MSP430/InstPrinter/MSP430InstPrinter.cpp | 7 +- lib/Target/MSP430/InstPrinter/MSP430InstPrinter.h | 7 +- lib/Target/MSP430/LLVMBuild.txt | 7 +- lib/Target/MSP430/MCTargetDesc/LLVMBuild.txt | 7 +- .../MSP430/MCTargetDesc/MSP430AsmBackend.cpp | 7 +- .../MSP430/MCTargetDesc/MSP430ELFObjectWriter.cpp | 7 +- .../MSP430/MCTargetDesc/MSP430ELFStreamer.cpp | 7 +- lib/Target/MSP430/MCTargetDesc/MSP430FixupKinds.h | 7 +- lib/Target/MSP430/MCTargetDesc/MSP430MCAsmInfo.cpp | 8 +- lib/Target/MSP430/MCTargetDesc/MSP430MCAsmInfo.h | 7 +- .../MSP430/MCTargetDesc/MSP430MCCodeEmitter.cpp | 7 +- .../MSP430/MCTargetDesc/MSP430MCTargetDesc.cpp | 7 +- .../MSP430/MCTargetDesc/MSP430MCTargetDesc.h | 7 +- lib/Target/MSP430/MSP430.h | 7 +- lib/Target/MSP430/MSP430.td | 7 +- lib/Target/MSP430/MSP430AsmPrinter.cpp | 82 +- lib/Target/MSP430/MSP430BranchSelector.cpp | 7 +- lib/Target/MSP430/MSP430CallingConv.td | 7 +- lib/Target/MSP430/MSP430FrameLowering.cpp | 7 +- lib/Target/MSP430/MSP430FrameLowering.h | 7 +- lib/Target/MSP430/MSP430ISelDAGToDAG.cpp | 7 +- lib/Target/MSP430/MSP430ISelLowering.cpp | 7 +- lib/Target/MSP430/MSP430ISelLowering.h | 7 +- lib/Target/MSP430/MSP430InstrFormats.td | 7 +- lib/Target/MSP430/MSP430InstrInfo.cpp | 10 +- lib/Target/MSP430/MSP430InstrInfo.h | 7 +- lib/Target/MSP430/MSP430InstrInfo.td | 7 +- lib/Target/MSP430/MSP430MCInstLower.cpp | 7 +- lib/Target/MSP430/MSP430MCInstLower.h | 7 +- lib/Target/MSP430/MSP430MachineFunctionInfo.cpp | 7 +- lib/Target/MSP430/MSP430MachineFunctionInfo.h | 7 +- lib/Target/MSP430/MSP430RegisterInfo.cpp | 7 +- lib/Target/MSP430/MSP430RegisterInfo.h | 7 +- lib/Target/MSP430/MSP430RegisterInfo.td | 7 +- lib/Target/MSP430/MSP430Subtarget.cpp | 7 +- lib/Target/MSP430/MSP430Subtarget.h | 7 +- lib/Target/MSP430/MSP430TargetMachine.cpp | 7 +- lib/Target/MSP430/MSP430TargetMachine.h | 7 +- lib/Target/MSP430/TargetInfo/LLVMBuild.txt | 7 +- lib/Target/MSP430/TargetInfo/MSP430TargetInfo.cpp | 7 +- lib/Target/Mips/AsmParser/LLVMBuild.txt | 7 +- lib/Target/Mips/AsmParser/MipsAsmParser.cpp | 48 +- lib/Target/Mips/Disassembler/LLVMBuild.txt | 7 +- lib/Target/Mips/Disassembler/MipsDisassembler.cpp | 7 +- lib/Target/Mips/InstPrinter/LLVMBuild.txt | 7 +- lib/Target/Mips/InstPrinter/MipsInstPrinter.cpp | 7 +- lib/Target/Mips/InstPrinter/MipsInstPrinter.h | 7 +- lib/Target/Mips/LLVMBuild.txt | 7 +- lib/Target/Mips/MCTargetDesc/LLVMBuild.txt | 7 +- .../Mips/MCTargetDesc/MipsABIFlagsSection.cpp | 7 +- lib/Target/Mips/MCTargetDesc/MipsABIFlagsSection.h | 7 +- lib/Target/Mips/MCTargetDesc/MipsABIInfo.cpp | 14 +- lib/Target/Mips/MCTargetDesc/MipsABIInfo.h | 7 +- lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp | 7 +- lib/Target/Mips/MCTargetDesc/MipsAsmBackend.h | 7 +- lib/Target/Mips/MCTargetDesc/MipsBaseInfo.h | 12 +- .../Mips/MCTargetDesc/MipsELFObjectWriter.cpp | 7 +- lib/Target/Mips/MCTargetDesc/MipsELFStreamer.cpp | 9 +- lib/Target/Mips/MCTargetDesc/MipsELFStreamer.h | 10 +- lib/Target/Mips/MCTargetDesc/MipsFixupKinds.h | 7 +- lib/Target/Mips/MCTargetDesc/MipsMCAsmInfo.cpp | 7 +- lib/Target/Mips/MCTargetDesc/MipsMCAsmInfo.h | 7 +- lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp | 12 +- lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.h | 7 +- lib/Target/Mips/MCTargetDesc/MipsMCExpr.cpp | 21 +- lib/Target/Mips/MCTargetDesc/MipsMCExpr.h | 7 +- lib/Target/Mips/MCTargetDesc/MipsMCNaCl.h | 7 +- lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.cpp | 7 +- lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.h | 7 +- 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lib/Target/Mips/MipsSEISelLowering.h | 8 +- lib/Target/Mips/MipsSEInstrInfo.cpp | 10 +- lib/Target/Mips/MipsSEInstrInfo.h | 7 +- lib/Target/Mips/MipsSERegisterInfo.cpp | 7 +- lib/Target/Mips/MipsSERegisterInfo.h | 7 +- lib/Target/Mips/MipsSchedule.td | 7 +- lib/Target/Mips/MipsScheduleGeneric.td | 7 +- lib/Target/Mips/MipsScheduleP5600.td | 7 +- lib/Target/Mips/MipsSubtarget.cpp | 16 +- lib/Target/Mips/MipsSubtarget.h | 11 +- lib/Target/Mips/MipsTargetMachine.cpp | 16 +- lib/Target/Mips/MipsTargetMachine.h | 13 +- lib/Target/Mips/MipsTargetObjectFile.cpp | 7 +- lib/Target/Mips/MipsTargetObjectFile.h | 7 +- lib/Target/Mips/MipsTargetStreamer.h | 7 +- lib/Target/Mips/TargetInfo/LLVMBuild.txt | 7 +- lib/Target/Mips/TargetInfo/MipsTargetInfo.cpp | 7 +- lib/Target/NVPTX/InstPrinter/LLVMBuild.txt | 7 +- lib/Target/NVPTX/InstPrinter/NVPTXInstPrinter.cpp | 21 +- lib/Target/NVPTX/InstPrinter/NVPTXInstPrinter.h | 9 +- lib/Target/NVPTX/LLVMBuild.txt | 7 +- lib/Target/NVPTX/MCTargetDesc/LLVMBuild.txt | 7 +- lib/Target/NVPTX/MCTargetDesc/NVPTXBaseInfo.h | 7 +- lib/Target/NVPTX/MCTargetDesc/NVPTXMCAsmInfo.cpp | 16 +- lib/Target/NVPTX/MCTargetDesc/NVPTXMCAsmInfo.h | 7 +- .../NVPTX/MCTargetDesc/NVPTXMCTargetDesc.cpp | 7 +- lib/Target/NVPTX/MCTargetDesc/NVPTXMCTargetDesc.h | 7 +- .../NVPTX/MCTargetDesc/NVPTXTargetStreamer.cpp | 26 +- .../NVPTX/MCTargetDesc/NVPTXTargetStreamer.h | 10 +- lib/Target/NVPTX/ManagedStringPool.h | 7 +- lib/Target/NVPTX/NVPTX.h | 7 +- lib/Target/NVPTX/NVPTX.td | 9 +- lib/Target/NVPTX/NVPTXAllocaHoisting.cpp | 7 +- lib/Target/NVPTX/NVPTXAllocaHoisting.h | 7 +- lib/Target/NVPTX/NVPTXAsmPrinter.cpp | 80 +- lib/Target/NVPTX/NVPTXAsmPrinter.h | 18 +- lib/Target/NVPTX/NVPTXAssignValidGlobalNames.cpp | 7 +- lib/Target/NVPTX/NVPTXFrameLowering.cpp | 7 +- lib/Target/NVPTX/NVPTXFrameLowering.h | 7 +- lib/Target/NVPTX/NVPTXGenericToNVVM.cpp | 7 +- lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp | 13 +- lib/Target/NVPTX/NVPTXISelDAGToDAG.h | 7 +- lib/Target/NVPTX/NVPTXISelLowering.cpp | 277 +- lib/Target/NVPTX/NVPTXISelLowering.h | 11 +- lib/Target/NVPTX/NVPTXImageOptimizer.cpp | 7 +- lib/Target/NVPTX/NVPTXInstrFormats.td | 7 +- lib/Target/NVPTX/NVPTXInstrInfo.cpp | 7 +- lib/Target/NVPTX/NVPTXInstrInfo.h | 7 +- lib/Target/NVPTX/NVPTXInstrInfo.td | 23 +- lib/Target/NVPTX/NVPTXIntrinsics.td | 628 +- lib/Target/NVPTX/NVPTXLowerAggrCopies.cpp | 7 +- lib/Target/NVPTX/NVPTXLowerAggrCopies.h | 7 +- lib/Target/NVPTX/NVPTXLowerAlloca.cpp | 7 +- lib/Target/NVPTX/NVPTXLowerArgs.cpp | 10 +- lib/Target/NVPTX/NVPTXMCExpr.cpp | 7 +- lib/Target/NVPTX/NVPTXMCExpr.h | 7 +- lib/Target/NVPTX/NVPTXMachineFunctionInfo.h | 7 +- lib/Target/NVPTX/NVPTXPeephole.cpp | 7 +- lib/Target/NVPTX/NVPTXPrologEpilogPass.cpp | 7 +- lib/Target/NVPTX/NVPTXProxyRegErasure.cpp | 7 +- lib/Target/NVPTX/NVPTXRegisterInfo.cpp | 7 +- lib/Target/NVPTX/NVPTXRegisterInfo.h | 7 +- lib/Target/NVPTX/NVPTXRegisterInfo.td | 7 +- lib/Target/NVPTX/NVPTXReplaceImageHandles.cpp | 7 +- lib/Target/NVPTX/NVPTXSubtarget.cpp | 7 +- lib/Target/NVPTX/NVPTXSubtarget.h | 7 +- lib/Target/NVPTX/NVPTXTargetMachine.cpp | 26 +- lib/Target/NVPTX/NVPTXTargetMachine.h | 7 +- lib/Target/NVPTX/NVPTXTargetObjectFile.h | 7 +- lib/Target/NVPTX/NVPTXTargetTransformInfo.cpp | 7 +- lib/Target/NVPTX/NVPTXTargetTransformInfo.h | 7 +- lib/Target/NVPTX/NVPTXUtilities.cpp | 7 +- lib/Target/NVPTX/NVPTXUtilities.h | 7 +- lib/Target/NVPTX/NVVMIntrRange.cpp | 7 +- lib/Target/NVPTX/NVVMReflect.cpp | 7 +- lib/Target/NVPTX/TargetInfo/LLVMBuild.txt | 7 +- lib/Target/NVPTX/TargetInfo/NVPTXTargetInfo.cpp | 7 +- lib/Target/PowerPC/AsmParser/LLVMBuild.txt | 7 +- lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp | 11 +- lib/Target/PowerPC/CMakeLists.txt | 2 + lib/Target/PowerPC/Disassembler/LLVMBuild.txt | 7 +- .../PowerPC/Disassembler/PPCDisassembler.cpp | 15 +- lib/Target/PowerPC/InstPrinter/LLVMBuild.txt | 7 +- lib/Target/PowerPC/InstPrinter/PPCInstPrinter.cpp | 31 +- lib/Target/PowerPC/InstPrinter/PPCInstPrinter.h | 7 +- lib/Target/PowerPC/LLVMBuild.txt | 7 +- lib/Target/PowerPC/MCTargetDesc/LLVMBuild.txt | 7 +- lib/Target/PowerPC/MCTargetDesc/PPCAsmBackend.cpp | 7 +- .../PowerPC/MCTargetDesc/PPCELFObjectWriter.cpp | 7 +- lib/Target/PowerPC/MCTargetDesc/PPCFixupKinds.h | 7 +- lib/Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.cpp | 7 +- lib/Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.h | 7 +- .../PowerPC/MCTargetDesc/PPCMCCodeEmitter.cpp | 7 +- lib/Target/PowerPC/MCTargetDesc/PPCMCCodeEmitter.h | 14 +- lib/Target/PowerPC/MCTargetDesc/PPCMCExpr.cpp | 7 +- lib/Target/PowerPC/MCTargetDesc/PPCMCExpr.h | 7 +- .../PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp | 7 +- lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.h | 7 +- .../PowerPC/MCTargetDesc/PPCMachObjectWriter.cpp | 7 +- lib/Target/PowerPC/MCTargetDesc/PPCPredicates.cpp | 7 +- lib/Target/PowerPC/MCTargetDesc/PPCPredicates.h | 7 +- lib/Target/PowerPC/P9InstrResources.td | 14 +- lib/Target/PowerPC/PPC.h | 21 +- lib/Target/PowerPC/PPC.td | 23 +- lib/Target/PowerPC/PPCAsmPrinter.cpp | 82 +- lib/Target/PowerPC/PPCBoolRetToInt.cpp | 7 +- lib/Target/PowerPC/PPCBranchCoalescing.cpp | 11 +- lib/Target/PowerPC/PPCBranchSelector.cpp | 262 +- lib/Target/PowerPC/PPCCCState.cpp | 7 +- lib/Target/PowerPC/PPCCCState.h | 7 +- lib/Target/PowerPC/PPCCTRLoops.cpp | 23 +- lib/Target/PowerPC/PPCCallingConv.cpp | 108 + lib/Target/PowerPC/PPCCallingConv.h | 36 +- lib/Target/PowerPC/PPCCallingConv.td | 14 +- lib/Target/PowerPC/PPCEarlyReturn.cpp | 11 +- lib/Target/PowerPC/PPCExpandISEL.cpp | 7 +- lib/Target/PowerPC/PPCFastISel.cpp | 101 +- lib/Target/PowerPC/PPCFrameLowering.cpp | 176 +- lib/Target/PowerPC/PPCFrameLowering.h | 30 +- lib/Target/PowerPC/PPCHazardRecognizers.cpp | 7 +- lib/Target/PowerPC/PPCHazardRecognizers.h | 7 +- lib/Target/PowerPC/PPCISelDAGToDAG.cpp | 31 +- lib/Target/PowerPC/PPCISelLowering.cpp | 489 +- lib/Target/PowerPC/PPCISelLowering.h | 49 +- lib/Target/PowerPC/PPCInstr64Bit.td | 21 +- lib/Target/PowerPC/PPCInstrAltivec.td | 11 +- lib/Target/PowerPC/PPCInstrBuilder.h | 7 +- lib/Target/PowerPC/PPCInstrFormats.td | 21 +- lib/Target/PowerPC/PPCInstrHTM.td | 7 +- lib/Target/PowerPC/PPCInstrInfo.cpp | 205 +- lib/Target/PowerPC/PPCInstrInfo.h | 55 +- lib/Target/PowerPC/PPCInstrInfo.td | 33 +- lib/Target/PowerPC/PPCInstrQPX.td | 7 +- lib/Target/PowerPC/PPCInstrSPE.td | 7 +- lib/Target/PowerPC/PPCInstrVSX.td | 275 +- lib/Target/PowerPC/PPCLoopPreIncPrep.cpp | 13 +- lib/Target/PowerPC/PPCMCInstLower.cpp | 7 +- lib/Target/PowerPC/PPCMIPeephole.cpp | 7 +- lib/Target/PowerPC/PPCMachineFunctionInfo.cpp | 7 +- lib/Target/PowerPC/PPCMachineFunctionInfo.h | 7 +- lib/Target/PowerPC/PPCMachineScheduler.cpp | 30 + lib/Target/PowerPC/PPCMachineScheduler.h | 42 + lib/Target/PowerPC/PPCPerfectShuffle.h | 7 +- lib/Target/PowerPC/PPCPfmCounters.td | 7 +- lib/Target/PowerPC/PPCPreEmitPeephole.cpp | 7 +- lib/Target/PowerPC/PPCQPXLoadSplat.cpp | 11 +- lib/Target/PowerPC/PPCReduceCRLogicals.cpp | 11 +- lib/Target/PowerPC/PPCRegisterInfo.cpp | 69 +- lib/Target/PowerPC/PPCRegisterInfo.h | 11 +- lib/Target/PowerPC/PPCRegisterInfo.td | 7 +- lib/Target/PowerPC/PPCSchedule.td | 8 +- lib/Target/PowerPC/PPCSchedule440.td | 7 +- lib/Target/PowerPC/PPCScheduleA2.td | 7 +- lib/Target/PowerPC/PPCScheduleE500.td | 7 +- lib/Target/PowerPC/PPCScheduleE500mc.td | 7 +- lib/Target/PowerPC/PPCScheduleE5500.td | 7 +- lib/Target/PowerPC/PPCScheduleG3.td | 7 +- lib/Target/PowerPC/PPCScheduleG4.td | 7 +- lib/Target/PowerPC/PPCScheduleG4Plus.td | 7 +- lib/Target/PowerPC/PPCScheduleG5.td | 7 +- lib/Target/PowerPC/PPCScheduleP7.td | 7 +- lib/Target/PowerPC/PPCScheduleP8.td | 7 +- lib/Target/PowerPC/PPCScheduleP9.td | 7 +- lib/Target/PowerPC/PPCSubtarget.cpp | 13 +- lib/Target/PowerPC/PPCSubtarget.h | 13 +- lib/Target/PowerPC/PPCTLSDynamicCall.cpp | 11 +- lib/Target/PowerPC/PPCTOCRegDeps.cpp | 11 +- lib/Target/PowerPC/PPCTargetMachine.cpp | 63 +- lib/Target/PowerPC/PPCTargetMachine.h | 11 +- lib/Target/PowerPC/PPCTargetObjectFile.cpp | 7 +- lib/Target/PowerPC/PPCTargetObjectFile.h | 7 +- lib/Target/PowerPC/PPCTargetStreamer.h | 7 +- lib/Target/PowerPC/PPCTargetTransformInfo.cpp | 66 +- lib/Target/PowerPC/PPCTargetTransformInfo.h | 8 +- lib/Target/PowerPC/PPCVSXCopy.cpp | 11 +- lib/Target/PowerPC/PPCVSXFMAMutate.cpp | 7 +- lib/Target/PowerPC/PPCVSXSwapRemoval.cpp | 11 +- lib/Target/PowerPC/TargetInfo/LLVMBuild.txt | 7 +- .../PowerPC/TargetInfo/PowerPCTargetInfo.cpp | 7 +- lib/Target/RISCV/AsmParser/LLVMBuild.txt | 7 +- lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp | 330 +- lib/Target/RISCV/Disassembler/LLVMBuild.txt | 7 +- .../RISCV/Disassembler/RISCVDisassembler.cpp | 19 +- lib/Target/RISCV/InstPrinter/LLVMBuild.txt | 7 +- lib/Target/RISCV/InstPrinter/RISCVInstPrinter.cpp | 7 +- lib/Target/RISCV/InstPrinter/RISCVInstPrinter.h | 7 +- lib/Target/RISCV/LLVMBuild.txt | 7 +- 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| 7 +- lib/Target/RISCV/RISCVRegisterInfo.td | 9 +- lib/Target/RISCV/RISCVSubtarget.cpp | 22 +- lib/Target/RISCV/RISCVSubtarget.h | 21 +- lib/Target/RISCV/RISCVSystemOperands.td | 9 +- lib/Target/RISCV/RISCVTargetMachine.cpp | 11 +- lib/Target/RISCV/RISCVTargetMachine.h | 7 +- lib/Target/RISCV/RISCVTargetObjectFile.cpp | 103 +- lib/Target/RISCV/RISCVTargetObjectFile.h | 31 +- lib/Target/RISCV/TargetInfo/LLVMBuild.txt | 7 +- lib/Target/RISCV/TargetInfo/RISCVTargetInfo.cpp | 7 +- lib/Target/RISCV/Utils/LLVMBuild.txt | 7 +- lib/Target/RISCV/Utils/RISCVBaseInfo.cpp | 71 + lib/Target/RISCV/Utils/RISCVBaseInfo.h | 37 +- lib/Target/RISCV/Utils/RISCVMatInt.cpp | 7 +- lib/Target/RISCV/Utils/RISCVMatInt.h | 7 +- lib/Target/Sparc/AsmParser/LLVMBuild.txt | 7 +- lib/Target/Sparc/AsmParser/SparcAsmParser.cpp | 10 +- lib/Target/Sparc/DelaySlotFiller.cpp | 7 +- lib/Target/Sparc/Disassembler/LLVMBuild.txt | 7 +- .../Sparc/Disassembler/SparcDisassembler.cpp | 7 +- lib/Target/Sparc/InstPrinter/LLVMBuild.txt | 7 +- lib/Target/Sparc/InstPrinter/SparcInstPrinter.cpp | 7 +- lib/Target/Sparc/InstPrinter/SparcInstPrinter.h | 7 +- lib/Target/Sparc/LLVMBuild.txt | 7 +- lib/Target/Sparc/LeonFeatures.td | 7 +- lib/Target/Sparc/LeonPasses.cpp | 7 +- lib/Target/Sparc/LeonPasses.h | 7 +- lib/Target/Sparc/MCTargetDesc/LLVMBuild.txt | 7 +- lib/Target/Sparc/MCTargetDesc/SparcAsmBackend.cpp | 7 +- .../Sparc/MCTargetDesc/SparcELFObjectWriter.cpp | 7 +- lib/Target/Sparc/MCTargetDesc/SparcFixupKinds.h | 7 +- lib/Target/Sparc/MCTargetDesc/SparcMCAsmInfo.cpp | 7 +- lib/Target/Sparc/MCTargetDesc/SparcMCAsmInfo.h | 7 +- .../Sparc/MCTargetDesc/SparcMCCodeEmitter.cpp | 14 +- lib/Target/Sparc/MCTargetDesc/SparcMCExpr.cpp | 7 +- lib/Target/Sparc/MCTargetDesc/SparcMCExpr.h | 7 +- .../Sparc/MCTargetDesc/SparcMCTargetDesc.cpp | 7 +- lib/Target/Sparc/MCTargetDesc/SparcMCTargetDesc.h | 7 +- .../Sparc/MCTargetDesc/SparcTargetStreamer.cpp | 7 +- .../Sparc/MCTargetDesc/SparcTargetStreamer.h | 7 +- lib/Target/Sparc/Sparc.h | 7 +- lib/Target/Sparc/Sparc.td | 7 +- lib/Target/Sparc/SparcAsmPrinter.cpp | 20 +- lib/Target/Sparc/SparcCallingConv.td | 7 +- lib/Target/Sparc/SparcFrameLowering.cpp | 7 +- lib/Target/Sparc/SparcFrameLowering.h | 7 +- lib/Target/Sparc/SparcISelDAGToDAG.cpp | 12 +- lib/Target/Sparc/SparcISelLowering.cpp | 10 +- lib/Target/Sparc/SparcISelLowering.h | 7 +- lib/Target/Sparc/SparcInstr64Bit.td | 7 +- lib/Target/Sparc/SparcInstrAliases.td | 7 +- lib/Target/Sparc/SparcInstrFormats.td | 7 +- lib/Target/Sparc/SparcInstrInfo.cpp | 7 +- lib/Target/Sparc/SparcInstrInfo.h | 7 +- lib/Target/Sparc/SparcInstrInfo.td | 7 +- lib/Target/Sparc/SparcInstrVIS.td | 7 +- lib/Target/Sparc/SparcMCInstLower.cpp | 7 +- lib/Target/Sparc/SparcMachineFunctionInfo.cpp | 7 +- lib/Target/Sparc/SparcMachineFunctionInfo.h | 7 +- lib/Target/Sparc/SparcRegisterInfo.cpp | 13 +- lib/Target/Sparc/SparcRegisterInfo.h | 7 +- lib/Target/Sparc/SparcRegisterInfo.td | 7 +- lib/Target/Sparc/SparcSchedule.td | 7 +- lib/Target/Sparc/SparcSubtarget.cpp | 7 +- lib/Target/Sparc/SparcSubtarget.h | 7 +- lib/Target/Sparc/SparcTargetMachine.cpp | 7 +- lib/Target/Sparc/SparcTargetMachine.h | 7 +- lib/Target/Sparc/SparcTargetObjectFile.cpp | 7 +- lib/Target/Sparc/SparcTargetObjectFile.h | 7 +- lib/Target/Sparc/TargetInfo/LLVMBuild.txt | 7 +- lib/Target/Sparc/TargetInfo/SparcTargetInfo.cpp | 7 +- lib/Target/SystemZ/AsmParser/LLVMBuild.txt | 7 +- lib/Target/SystemZ/AsmParser/SystemZAsmParser.cpp | 32 +- lib/Target/SystemZ/Disassembler/LLVMBuild.txt | 7 +- .../SystemZ/Disassembler/SystemZDisassembler.cpp | 7 +- lib/Target/SystemZ/InstPrinter/LLVMBuild.txt | 7 +- .../SystemZ/InstPrinter/SystemZInstPrinter.cpp | 7 +- .../SystemZ/InstPrinter/SystemZInstPrinter.h | 7 +- lib/Target/SystemZ/LLVMBuild.txt | 7 +- lib/Target/SystemZ/MCTargetDesc/LLVMBuild.txt | 7 +- .../SystemZ/MCTargetDesc/SystemZMCAsmBackend.cpp | 7 +- .../SystemZ/MCTargetDesc/SystemZMCAsmInfo.cpp | 7 +- lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmInfo.h | 7 +- .../SystemZ/MCTargetDesc/SystemZMCCodeEmitter.cpp | 14 +- lib/Target/SystemZ/MCTargetDesc/SystemZMCFixups.h | 7 +- .../SystemZ/MCTargetDesc/SystemZMCObjectWriter.cpp | 7 +- .../SystemZ/MCTargetDesc/SystemZMCTargetDesc.cpp | 8 +- .../SystemZ/MCTargetDesc/SystemZMCTargetDesc.h | 7 +- lib/Target/SystemZ/SystemZ.h | 7 +- lib/Target/SystemZ/SystemZ.td | 7 +- lib/Target/SystemZ/SystemZAsmPrinter.cpp | 26 +- lib/Target/SystemZ/SystemZAsmPrinter.h | 13 +- lib/Target/SystemZ/SystemZCallingConv.cpp | 7 +- lib/Target/SystemZ/SystemZCallingConv.h | 7 +- lib/Target/SystemZ/SystemZCallingConv.td | 7 +- lib/Target/SystemZ/SystemZConstantPoolValue.cpp | 7 +- lib/Target/SystemZ/SystemZConstantPoolValue.h | 7 +- lib/Target/SystemZ/SystemZElimCompare.cpp | 10 +- lib/Target/SystemZ/SystemZExpandPseudo.cpp | 7 +- lib/Target/SystemZ/SystemZFeatures.td | 7 +- lib/Target/SystemZ/SystemZFrameLowering.cpp | 7 +- lib/Target/SystemZ/SystemZFrameLowering.h | 7 +- lib/Target/SystemZ/SystemZHazardRecognizer.cpp | 7 +- lib/Target/SystemZ/SystemZHazardRecognizer.h | 7 +- lib/Target/SystemZ/SystemZISelDAGToDAG.cpp | 92 +- lib/Target/SystemZ/SystemZISelLowering.cpp | 442 +- lib/Target/SystemZ/SystemZISelLowering.h | 33 +- lib/Target/SystemZ/SystemZInstrBuilder.h | 7 +- lib/Target/SystemZ/SystemZInstrDFP.td | 7 +- lib/Target/SystemZ/SystemZInstrFP.td | 7 +- lib/Target/SystemZ/SystemZInstrFormats.td | 7 +- lib/Target/SystemZ/SystemZInstrHFP.td | 7 +- lib/Target/SystemZ/SystemZInstrInfo.cpp | 88 +- lib/Target/SystemZ/SystemZInstrInfo.h | 13 +- lib/Target/SystemZ/SystemZInstrInfo.td | 34 +- lib/Target/SystemZ/SystemZInstrSystem.td | 7 +- lib/Target/SystemZ/SystemZInstrVector.td | 7 +- lib/Target/SystemZ/SystemZLDCleanup.cpp | 7 +- lib/Target/SystemZ/SystemZLongBranch.cpp | 7 +- lib/Target/SystemZ/SystemZMCInstLower.cpp | 7 +- lib/Target/SystemZ/SystemZMCInstLower.h | 7 +- lib/Target/SystemZ/SystemZMachineFunctionInfo.cpp | 7 +- lib/Target/SystemZ/SystemZMachineFunctionInfo.h | 7 +- lib/Target/SystemZ/SystemZMachineScheduler.cpp | 7 +- lib/Target/SystemZ/SystemZMachineScheduler.h | 7 +- lib/Target/SystemZ/SystemZOperands.td | 27 +- lib/Target/SystemZ/SystemZOperators.td | 35 +- lib/Target/SystemZ/SystemZPatterns.td | 7 +- lib/Target/SystemZ/SystemZProcessors.td | 7 +- lib/Target/SystemZ/SystemZRegisterInfo.cpp | 60 +- lib/Target/SystemZ/SystemZRegisterInfo.h | 7 +- lib/Target/SystemZ/SystemZRegisterInfo.td | 7 +- lib/Target/SystemZ/SystemZSchedule.td | 7 +- lib/Target/SystemZ/SystemZScheduleZ13.td | 7 +- lib/Target/SystemZ/SystemZScheduleZ14.td | 7 +- lib/Target/SystemZ/SystemZScheduleZ196.td | 7 +- lib/Target/SystemZ/SystemZScheduleZEC12.td | 7 +- lib/Target/SystemZ/SystemZSelectionDAGInfo.cpp | 25 +- lib/Target/SystemZ/SystemZSelectionDAGInfo.h | 7 +- lib/Target/SystemZ/SystemZShortenInst.cpp | 7 +- lib/Target/SystemZ/SystemZSubtarget.cpp | 7 +- lib/Target/SystemZ/SystemZSubtarget.h | 7 +- lib/Target/SystemZ/SystemZTDC.cpp | 11 +- lib/Target/SystemZ/SystemZTargetMachine.cpp | 7 +- lib/Target/SystemZ/SystemZTargetMachine.h | 7 +- lib/Target/SystemZ/SystemZTargetTransformInfo.cpp | 7 +- lib/Target/SystemZ/SystemZTargetTransformInfo.h | 7 +- lib/Target/SystemZ/TargetInfo/LLVMBuild.txt | 7 +- .../SystemZ/TargetInfo/SystemZTargetInfo.cpp | 7 +- lib/Target/Target.cpp | 7 +- lib/Target/TargetIntrinsicInfo.cpp | 7 +- lib/Target/TargetLoweringObjectFile.cpp | 7 +- lib/Target/TargetMachine.cpp | 9 +- lib/Target/TargetMachineC.cpp | 7 +- lib/Target/WebAssembly/AsmParser/LLVMBuild.txt | 7 +- .../WebAssembly/AsmParser/WebAssemblyAsmParser.cpp | 96 +- lib/Target/WebAssembly/CMakeLists.txt | 1 - lib/Target/WebAssembly/Disassembler/LLVMBuild.txt | 9 +- .../Disassembler/WebAssemblyDisassembler.cpp | 57 +- lib/Target/WebAssembly/InstPrinter/LLVMBuild.txt | 7 +- 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+- lib/Target/WebAssembly/WebAssemblyArgumentMove.cpp | 7 +- lib/Target/WebAssembly/WebAssemblyAsmPrinter.cpp | 179 +- lib/Target/WebAssembly/WebAssemblyAsmPrinter.h | 16 +- lib/Target/WebAssembly/WebAssemblyCFGSort.cpp | 54 +- lib/Target/WebAssembly/WebAssemblyCFGStackify.cpp | 930 +- .../WebAssembly/WebAssemblyCallIndirectFixup.cpp | 17 +- .../WebAssembly/WebAssemblyDebugValueManager.cpp | 7 +- .../WebAssembly/WebAssemblyDebugValueManager.h | 7 +- .../WebAssemblyEHRestoreStackPointer.cpp | 87 - .../WebAssembly/WebAssemblyExceptionInfo.cpp | 21 +- lib/Target/WebAssembly/WebAssemblyExceptionInfo.h | 7 +- .../WebAssembly/WebAssemblyExplicitLocals.cpp | 27 +- lib/Target/WebAssembly/WebAssemblyFastISel.cpp | 132 +- .../WebAssembly/WebAssemblyFixFunctionBitcasts.cpp | 79 +- .../WebAssemblyFixIrreducibleControlFlow.cpp | 616 +- .../WebAssembly/WebAssemblyFrameLowering.cpp | 11 +- lib/Target/WebAssembly/WebAssemblyFrameLowering.h | 7 +- lib/Target/WebAssembly/WebAssemblyISD.def | 13 +- lib/Target/WebAssembly/WebAssemblyISelDAGToDAG.cpp | 14 +- lib/Target/WebAssembly/WebAssemblyISelLowering.cpp | 457 +- lib/Target/WebAssembly/WebAssemblyISelLowering.h | 12 +- lib/Target/WebAssembly/WebAssemblyInstrAtomics.td | 544 +- .../WebAssembly/WebAssemblyInstrBulkMemory.td | 71 + lib/Target/WebAssembly/WebAssemblyInstrCall.td | 100 +- lib/Target/WebAssembly/WebAssemblyInstrControl.td | 91 +- lib/Target/WebAssembly/WebAssemblyInstrConv.td | 7 +- .../WebAssembly/WebAssemblyInstrExceptRef.td | 7 +- lib/Target/WebAssembly/WebAssemblyInstrFloat.td | 7 +- lib/Target/WebAssembly/WebAssemblyInstrFormats.td | 10 +- lib/Target/WebAssembly/WebAssemblyInstrInfo.cpp | 60 +- lib/Target/WebAssembly/WebAssemblyInstrInfo.h | 16 +- lib/Target/WebAssembly/WebAssemblyInstrInfo.td | 97 +- lib/Target/WebAssembly/WebAssemblyInstrInteger.td | 14 +- lib/Target/WebAssembly/WebAssemblyInstrMemory.td | 95 +- lib/Target/WebAssembly/WebAssemblyInstrSIMD.td | 183 +- .../WebAssembly/WebAssemblyLateEHPrepare.cpp | 468 +- .../WebAssembly/WebAssemblyLowerBrUnless.cpp | 7 +- .../WebAssemblyLowerEmscriptenEHSjLj.cpp | 88 +- .../WebAssembly/WebAssemblyLowerGlobalDtors.cpp | 30 +- lib/Target/WebAssembly/WebAssemblyMCInstLower.cpp | 112 +- lib/Target/WebAssembly/WebAssemblyMCInstLower.h | 12 +- .../WebAssembly/WebAssemblyMachineFunctionInfo.cpp | 40 +- .../WebAssembly/WebAssemblyMachineFunctionInfo.h | 47 +- .../WebAssembly/WebAssemblyMemIntrinsicResults.cpp | 19 +- .../WebAssemblyOptimizeLiveIntervals.cpp | 13 +- .../WebAssembly/WebAssemblyOptimizeReturned.cpp | 17 +- lib/Target/WebAssembly/WebAssemblyPeephole.cpp | 35 +- .../WebAssemblyPrepareForLiveIntervals.cpp | 15 +- lib/Target/WebAssembly/WebAssemblyRegColoring.cpp | 31 +- lib/Target/WebAssembly/WebAssemblyRegNumbering.cpp | 7 +- lib/Target/WebAssembly/WebAssemblyRegStackify.cpp | 169 +- lib/Target/WebAssembly/WebAssemblyRegisterInfo.cpp | 20 +- lib/Target/WebAssembly/WebAssemblyRegisterInfo.h | 7 +- lib/Target/WebAssembly/WebAssemblyRegisterInfo.td | 7 +- .../WebAssembly/WebAssemblyReplacePhysRegs.cpp | 7 +- .../WebAssemblyRuntimeLibcallSignatures.cpp | 110 +- .../WebAssemblyRuntimeLibcallSignatures.h | 11 +- .../WebAssembly/WebAssemblySelectionDAGInfo.cpp | 49 +- .../WebAssembly/WebAssemblySelectionDAGInfo.h | 22 +- .../WebAssembly/WebAssemblySetP2AlignOperands.cpp | 123 +- lib/Target/WebAssembly/WebAssemblySubtarget.cpp | 12 +- lib/Target/WebAssembly/WebAssemblySubtarget.h | 17 +- .../WebAssembly/WebAssemblyTargetMachine.cpp | 224 +- lib/Target/WebAssembly/WebAssemblyTargetMachine.h | 18 +- .../WebAssembly/WebAssemblyTargetObjectFile.cpp | 7 +- .../WebAssembly/WebAssemblyTargetObjectFile.h | 7 +- .../WebAssembly/WebAssemblyTargetTransformInfo.cpp | 9 +- .../WebAssembly/WebAssemblyTargetTransformInfo.h | 7 +- lib/Target/WebAssembly/WebAssemblyUtilities.cpp | 94 +- lib/Target/WebAssembly/WebAssemblyUtilities.h | 17 +- lib/Target/WebAssembly/known_gcc_test_failures.txt | 13 +- lib/Target/X86/AsmParser/CMakeLists.txt | 1 - lib/Target/X86/AsmParser/LLVMBuild.txt | 7 +- lib/Target/X86/AsmParser/X86AsmInstrumentation.cpp | 1089 -- lib/Target/X86/AsmParser/X86AsmInstrumentation.h | 68 - lib/Target/X86/AsmParser/X86AsmParser.cpp | 400 +- lib/Target/X86/AsmParser/X86AsmParserCommon.h | 7 +- lib/Target/X86/AsmParser/X86Operand.h | 7 +- lib/Target/X86/CMakeLists.txt | 1 - lib/Target/X86/Disassembler/LLVMBuild.txt | 7 +- lib/Target/X86/Disassembler/X86Disassembler.cpp | 215 +- .../X86/Disassembler/X86DisassemblerDecoder.cpp | 13 +- .../X86/Disassembler/X86DisassemblerDecoder.h | 7 +- lib/Target/X86/InstPrinter/LLVMBuild.txt | 7 +- lib/Target/X86/InstPrinter/X86ATTInstPrinter.cpp | 295 +- lib/Target/X86/InstPrinter/X86ATTInstPrinter.h | 42 +- lib/Target/X86/InstPrinter/X86InstComments.cpp | 8 +- lib/Target/X86/InstPrinter/X86InstComments.h | 7 +- .../X86/InstPrinter/X86InstPrinterCommon.cpp | 237 +- lib/Target/X86/InstPrinter/X86InstPrinterCommon.h | 12 +- lib/Target/X86/InstPrinter/X86IntelInstPrinter.cpp | 293 +- lib/Target/X86/InstPrinter/X86IntelInstPrinter.h | 51 +- lib/Target/X86/LLVMBuild.txt | 7 +- lib/Target/X86/MCTargetDesc/LLVMBuild.txt | 7 +- lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp | 42 +- lib/Target/X86/MCTargetDesc/X86BaseInfo.h | 94 +- lib/Target/X86/MCTargetDesc/X86ELFObjectWriter.cpp | 14 +- lib/Target/X86/MCTargetDesc/X86FixupKinds.h | 7 +- lib/Target/X86/MCTargetDesc/X86MCAsmInfo.cpp | 7 +- lib/Target/X86/MCTargetDesc/X86MCAsmInfo.h | 7 +- lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp | 77 +- lib/Target/X86/MCTargetDesc/X86MCExpr.h | 7 +- lib/Target/X86/MCTargetDesc/X86MCTargetDesc.cpp | 17 +- lib/Target/X86/MCTargetDesc/X86MCTargetDesc.h | 7 +- .../X86/MCTargetDesc/X86MachObjectWriter.cpp | 7 +- lib/Target/X86/MCTargetDesc/X86TargetStreamer.h | 7 +- .../X86/MCTargetDesc/X86WinCOFFObjectWriter.cpp | 7 +- lib/Target/X86/MCTargetDesc/X86WinCOFFStreamer.cpp | 7 +- .../X86/MCTargetDesc/X86WinCOFFTargetStreamer.cpp | 7 +- lib/Target/X86/README-SSE.txt | 12 - lib/Target/X86/ShadowCallStack.cpp | 322 - lib/Target/X86/TargetInfo/LLVMBuild.txt | 7 +- lib/Target/X86/TargetInfo/X86TargetInfo.cpp | 7 +- lib/Target/X86/Utils/LLVMBuild.txt | 7 +- lib/Target/X86/Utils/X86ShuffleDecode.cpp | 9 +- lib/Target/X86/Utils/X86ShuffleDecode.h | 7 +- lib/Target/X86/X86.h | 14 +- lib/Target/X86/X86.td | 1199 +- lib/Target/X86/X86AsmPrinter.cpp | 271 +- lib/Target/X86/X86AsmPrinter.h | 25 +- lib/Target/X86/X86AvoidStoreForwardingBlocks.cpp | 7 +- lib/Target/X86/X86CallFrameOptimization.cpp | 7 +- lib/Target/X86/X86CallLowering.cpp | 15 +- lib/Target/X86/X86CallLowering.h | 7 +- lib/Target/X86/X86CallingConv.cpp | 162 +- lib/Target/X86/X86CallingConv.h | 104 +- lib/Target/X86/X86CallingConv.td | 21 +- lib/Target/X86/X86CmovConversion.cpp | 28 +- lib/Target/X86/X86CondBrFolding.cpp | 22 +- lib/Target/X86/X86DiscriminateMemOps.cpp | 21 +- lib/Target/X86/X86DomainReassignment.cpp | 8 +- lib/Target/X86/X86EvexToVex.cpp | 7 +- lib/Target/X86/X86ExpandPseudo.cpp | 36 +- lib/Target/X86/X86FastISel.cpp | 115 +- lib/Target/X86/X86FixupBWInsts.cpp | 9 +- lib/Target/X86/X86FixupLEAs.cpp | 230 +- lib/Target/X86/X86FixupSetCC.cpp | 37 +- lib/Target/X86/X86FlagsCopyLowering.cpp | 46 +- lib/Target/X86/X86FloatingPoint.cpp | 16 +- lib/Target/X86/X86FrameLowering.cpp | 42 +- lib/Target/X86/X86FrameLowering.h | 7 +- lib/Target/X86/X86GenRegisterBankInfo.def | 7 +- lib/Target/X86/X86ISelDAGToDAG.cpp | 1040 +- lib/Target/X86/X86ISelLowering.cpp | 6968 ++++--- lib/Target/X86/X86ISelLowering.h | 177 +- lib/Target/X86/X86IndirectBranchTracking.cpp | 7 +- lib/Target/X86/X86InsertPrefetch.cpp | 10 +- lib/Target/X86/X86Instr3DNow.td | 11 +- lib/Target/X86/X86InstrAVX512.td | 2378 +-- lib/Target/X86/X86InstrArithmetic.td | 86 +- lib/Target/X86/X86InstrBuilder.h | 7 +- lib/Target/X86/X86InstrCMovSetCC.td | 176 +- lib/Target/X86/X86InstrCompiler.td | 313 +- lib/Target/X86/X86InstrControl.td | 64 +- lib/Target/X86/X86InstrExtension.td | 11 +- lib/Target/X86/X86InstrFMA.td | 13 +- lib/Target/X86/X86InstrFMA3Info.cpp | 7 +- lib/Target/X86/X86InstrFMA3Info.h | 7 +- lib/Target/X86/X86InstrFPStack.td | 341 +- lib/Target/X86/X86InstrFoldTables.cpp | 102 +- lib/Target/X86/X86InstrFoldTables.h | 7 +- lib/Target/X86/X86InstrFormats.td | 33 +- lib/Target/X86/X86InstrFragmentsSIMD.td | 235 +- lib/Target/X86/X86InstrInfo.cpp | 700 +- lib/Target/X86/X86InstrInfo.h | 76 +- lib/Target/X86/X86InstrInfo.td | 354 +- lib/Target/X86/X86InstrMMX.td | 13 +- lib/Target/X86/X86InstrMPX.td | 7 +- lib/Target/X86/X86InstrSGX.td | 7 +- lib/Target/X86/X86InstrSSE.td | 1042 +- lib/Target/X86/X86InstrSVM.td | 7 +- lib/Target/X86/X86InstrShiftRotate.td | 98 +- lib/Target/X86/X86InstrSystem.td | 26 +- lib/Target/X86/X86InstrTSX.td | 7 +- lib/Target/X86/X86InstrVMX.td | 7 +- lib/Target/X86/X86InstrVecCompiler.td | 11 +- lib/Target/X86/X86InstrXOP.td | 33 +- lib/Target/X86/X86InstructionSelector.cpp | 72 +- lib/Target/X86/X86InterleavedAccess.cpp | 27 +- lib/Target/X86/X86IntrinsicsInfo.h | 781 +- lib/Target/X86/X86LegalizerInfo.cpp | 30 +- lib/Target/X86/X86LegalizerInfo.h | 7 +- lib/Target/X86/X86MCInstLower.cpp | 67 +- lib/Target/X86/X86MachineFunctionInfo.cpp | 7 +- lib/Target/X86/X86MachineFunctionInfo.h | 7 +- lib/Target/X86/X86MacroFusion.cpp | 164 +- lib/Target/X86/X86MacroFusion.h | 7 +- lib/Target/X86/X86OptimizeLEAs.cpp | 9 +- lib/Target/X86/X86PadShortFunction.cpp | 9 +- lib/Target/X86/X86PfmCounters.td | 7 +- lib/Target/X86/X86RegisterBankInfo.cpp | 25 +- lib/Target/X86/X86RegisterBankInfo.h | 7 +- lib/Target/X86/X86RegisterBanks.td | 7 +- lib/Target/X86/X86RegisterInfo.cpp | 20 +- lib/Target/X86/X86RegisterInfo.h | 10 +- lib/Target/X86/X86RegisterInfo.td | 32 +- lib/Target/X86/X86RetpolineThunks.cpp | 7 +- lib/Target/X86/X86SchedBroadwell.td | 82 +- lib/Target/X86/X86SchedHaswell.td | 108 +- lib/Target/X86/X86SchedPredicates.td | 31 +- lib/Target/X86/X86SchedSandyBridge.td | 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test/CodeGen/AArch64/wineh6.mir | 2 +- test/CodeGen/AArch64/wineh7.mir | 2 +- test/CodeGen/AArch64/wineh8.mir | 225 + .../AMDGPU/GlobalISel/artifact-combiner-anyext.mir | 70 + .../GlobalISel/artifact-combiner-extract.mir | 470 + .../AMDGPU/GlobalISel/artifact-combiner-sext.mir | 99 + .../AMDGPU/GlobalISel/artifact-combiner-zext.mir | 90 + .../AMDGPU/GlobalISel/combine-ext-legalizer.mir | 41 + .../GlobalISel/inst-select-amdgcn.cvt.pkrtz.mir | 8 +- .../CodeGen/AMDGPU/GlobalISel/inst-select-ashr.mir | 4 +- .../AMDGPU/GlobalISel/inst-select-bitcast.mir | 4 +- .../AMDGPU/GlobalISel/inst-select-constant.mir | 20 +- .../CodeGen/AMDGPU/GlobalISel/inst-select-copy.mir | 6 +- .../AMDGPU/GlobalISel/inst-select-extract.mir | 77 + .../CodeGen/AMDGPU/GlobalISel/inst-select-fadd.mir | 2 +- .../CodeGen/AMDGPU/GlobalISel/inst-select-fmul.mir | 8 +- .../AMDGPU/GlobalISel/inst-select-fptoui.mir | 2 +- .../AMDGPU/GlobalISel/inst-select-implicit-def.mir | 32 +- .../AMDGPU/GlobalISel/inst-select-insert.mir | 49 + .../AMDGPU/GlobalISel/inst-select-load-smrd.mir | 43 +- .../AMDGPU/GlobalISel/inst-select-maxnum.mir | 2 +- .../AMDGPU/GlobalISel/inst-select-minnum.mir | 2 +- test/CodeGen/AMDGPU/GlobalISel/inst-select-or.mir | 4 +- .../AMDGPU/GlobalISel/inst-select-sitofp.mir | 2 +- .../AMDGPU/GlobalISel/irtranslator-amdgpu_vs.ll | 21 + .../irtranslator-struct-return-intrinsics.ll | 27 + test/CodeGen/AMDGPU/GlobalISel/legalize-add.mir | 26 +- .../AMDGPU/GlobalISel/legalize-addrspacecast.mir | 383 + test/CodeGen/AMDGPU/GlobalISel/legalize-and.mir | 473 +- test/CodeGen/AMDGPU/GlobalISel/legalize-anyext.mir | 188 + test/CodeGen/AMDGPU/GlobalISel/legalize-ashr.mir | 1510 +- .../CodeGen/AMDGPU/GlobalISel/legalize-bitcast.mir | 174 +- .../AMDGPU/GlobalISel/legalize-block-addr.mir | 4 +- test/CodeGen/AMDGPU/GlobalISel/legalize-bswap.mir | 125 + .../AMDGPU/GlobalISel/legalize-constant.mir | 175 +- .../AMDGPU/GlobalISel/legalize-ctlz-zero-undef.mir | 214 + test/CodeGen/AMDGPU/GlobalISel/legalize-ctlz.mir | 214 + test/CodeGen/AMDGPU/GlobalISel/legalize-ctpop.mir | 201 + .../AMDGPU/GlobalISel/legalize-cttz-zero-undef.mir | 201 + test/CodeGen/AMDGPU/GlobalISel/legalize-cttz.mir | 210 + .../GlobalISel/legalize-extract-vector-elt.mir | 124 +- .../CodeGen/AMDGPU/GlobalISel/legalize-extract.mir | 906 +- test/CodeGen/AMDGPU/GlobalISel/legalize-fabs.mir | 304 +- test/CodeGen/AMDGPU/GlobalISel/legalize-fadd.mir | 419 +- .../AMDGPU/GlobalISel/legalize-fcanonicalize.mir | 300 + test/CodeGen/AMDGPU/GlobalISel/legalize-fcmp.mir | 146 +- .../AMDGPU/GlobalISel/legalize-fconstant.mir | 51 + test/CodeGen/AMDGPU/GlobalISel/legalize-fexp.mir | 54 + test/CodeGen/AMDGPU/GlobalISel/legalize-fexp2.mir | 54 + test/CodeGen/AMDGPU/GlobalISel/legalize-flog.mir | 54 + test/CodeGen/AMDGPU/GlobalISel/legalize-flog10.mir | 54 + test/CodeGen/AMDGPU/GlobalISel/legalize-flog2.mir | 54 + test/CodeGen/AMDGPU/GlobalISel/legalize-fma.mir | 504 +- test/CodeGen/AMDGPU/GlobalISel/legalize-fmul.mir | 419 +- test/CodeGen/AMDGPU/GlobalISel/legalize-fneg.mir | 302 +- test/CodeGen/AMDGPU/GlobalISel/legalize-fpext.mir | 168 + test/CodeGen/AMDGPU/GlobalISel/legalize-fpow.mir | 62 + test/CodeGen/AMDGPU/GlobalISel/legalize-fptosi.mir | 58 +- test/CodeGen/AMDGPU/GlobalISel/legalize-fptoui.mir | 60 +- .../CodeGen/AMDGPU/GlobalISel/legalize-fptrunc.mir | 60 +- test/CodeGen/AMDGPU/GlobalISel/legalize-fsqrt.mir | 307 + test/CodeGen/AMDGPU/GlobalISel/legalize-fsub.mir | 464 +- test/CodeGen/AMDGPU/GlobalISel/legalize-icmp.mir | 323 +- .../AMDGPU/GlobalISel/legalize-implicit-def.mir | 559 +- test/CodeGen/AMDGPU/GlobalISel/legalize-insert.mir | 1066 +- .../AMDGPU/GlobalISel/legalize-intrinsic-round.mir | 50 +- .../AMDGPU/GlobalISel/legalize-intrinsic-trunc.mir | 50 +- .../AMDGPU/GlobalISel/legalize-inttoptr.mir | 189 +- test/CodeGen/AMDGPU/GlobalISel/legalize-load.mir | 341 +- test/CodeGen/AMDGPU/GlobalISel/legalize-lshr.mir | 1476 ++ .../AMDGPU/GlobalISel/legalize-merge-values.mir | 149 + test/CodeGen/AMDGPU/GlobalISel/legalize-mul.mir | 51 +- test/CodeGen/AMDGPU/GlobalISel/legalize-or.mir | 473 +- test/CodeGen/AMDGPU/GlobalISel/legalize-phi.mir | 1384 ++ .../AMDGPU/GlobalISel/legalize-ptrtoint.mir | 162 + test/CodeGen/AMDGPU/GlobalISel/legalize-select.mir | 1185 +- test/CodeGen/AMDGPU/GlobalISel/legalize-sext.mir | 193 + .../AMDGPU/GlobalISel/legalize-sextload-flat.mir | 140 + .../AMDGPU/GlobalISel/legalize-sextload-global.mir | 93 + .../AMDGPU/GlobalISel/legalize-sextload-local.mir | 92 + .../GlobalISel/legalize-sextload-private.mir | 94 + test/CodeGen/AMDGPU/GlobalISel/legalize-shl.mir | 1545 +- test/CodeGen/AMDGPU/GlobalISel/legalize-sitofp.mir | 58 +- test/CodeGen/AMDGPU/GlobalISel/legalize-smulh.mir | 40 + test/CodeGen/AMDGPU/GlobalISel/legalize-store.mir | 319 +- test/CodeGen/AMDGPU/GlobalISel/legalize-sub.mir | 40 + test/CodeGen/AMDGPU/GlobalISel/legalize-uaddo.mir | 91 + test/CodeGen/AMDGPU/GlobalISel/legalize-uitofp.mir | 33 + test/CodeGen/AMDGPU/GlobalISel/legalize-umulh.mir | 40 + .../GlobalISel/legalize-unmerge-values-xfail.mir | 14 + .../AMDGPU/GlobalISel/legalize-unmerge-values.mir | 406 +- test/CodeGen/AMDGPU/GlobalISel/legalize-usubo.mir | 91 + test/CodeGen/AMDGPU/GlobalISel/legalize-xor.mir | 473 +- test/CodeGen/AMDGPU/GlobalISel/legalize-zext.mir | 190 +- .../AMDGPU/GlobalISel/legalize-zextload-flat.mir | 135 + .../AMDGPU/GlobalISel/legalize-zextload-global.mir | 93 + .../AMDGPU/GlobalISel/legalize-zextload-local.mir | 92 + .../GlobalISel/legalize-zextload-private.mir | 93 + .../AMDGPU/GlobalISel/no-legalize-atomic.mir | 46 + .../AMDGPU/GlobalISel/regbankselect-and.mir | 490 +- .../AMDGPU/GlobalISel/regbankselect-ashr.mir | 68 + .../AMDGPU/GlobalISel/regbankselect-block-addr.mir | 4 +- .../AMDGPU/GlobalISel/regbankselect-default.mir | 5 +- .../regbankselect-extract-vector-elt.mir | 148 +- .../AMDGPU/GlobalISel/regbankselect-fpext.mir | 31 + .../AMDGPU/GlobalISel/regbankselect-fsqrt.mir | 35 + .../AMDGPU/GlobalISel/regbankselect-gep.mir | 90 + .../GlobalISel/regbankselect-insert-vector-elt.mir | 140 +- .../AMDGPU/GlobalISel/regbankselect-lshr.mir | 65 + .../GlobalISel/regbankselect-merge-values.mir | 8 +- .../CodeGen/AMDGPU/GlobalISel/regbankselect-or.mir | 622 +- .../AMDGPU/GlobalISel/regbankselect-phi.mir | 1434 ++ .../AMDGPU/GlobalISel/regbankselect-ptrtoint.mir | 16 +- .../GlobalISel/regbankselect-reg-sequence.mir | 140 + .../AMDGPU/GlobalISel/regbankselect-sadde.mir | 12 +- .../AMDGPU/GlobalISel/regbankselect-select.mir | 832 +- .../AMDGPU/GlobalISel/regbankselect-smulh.mir | 67 + .../AMDGPU/GlobalISel/regbankselect-ssube.mir | 12 +- .../AMDGPU/GlobalISel/regbankselect-uadde.mir | 12 +- .../AMDGPU/GlobalISel/regbankselect-umulh.mir | 67 + .../AMDGPU/GlobalISel/regbankselect-usube.mir | 12 +- .../AMDGPU/GlobalISel/regbankselect-xor.mir | 622 +- test/CodeGen/AMDGPU/GlobalISel/todo.ll | 10 - test/CodeGen/AMDGPU/add3.ll | 14 +- test/CodeGen/AMDGPU/amdgcn-ieee.ll | 188 + test/CodeGen/AMDGPU/amdgpu-alias-analysis.ll | 40 + .../CodeGen/AMDGPU/amdgpu-function-calls-option.ll | 27 + test/CodeGen/AMDGPU/amdgpu-inline.ll | 4 +- test/CodeGen/AMDGPU/amdpal-msgpack-cs.ll | 16 + test/CodeGen/AMDGPU/amdpal-msgpack-es.ll | 15 + test/CodeGen/AMDGPU/amdpal-msgpack-gs.ll | 16 + test/CodeGen/AMDGPU/amdpal-msgpack-hs.ll | 16 + test/CodeGen/AMDGPU/amdpal-msgpack-ls.ll | 15 + test/CodeGen/AMDGPU/amdpal-msgpack-ps.ll | 36 + test/CodeGen/AMDGPU/amdpal-msgpack-psenable.ll | 27 + test/CodeGen/AMDGPU/amdpal-msgpack-vs.ll | 16 + test/CodeGen/AMDGPU/amdpal.ll | 7 +- test/CodeGen/AMDGPU/and.ll | 20 +- .../AMDGPU/annotate-kernel-features-hsa-call.ll | 50 +- .../CodeGen/AMDGPU/are-loads-from-same-base-ptr.ll | 17 + test/CodeGen/AMDGPU/atomic_optimizations_buffer.ll | 28 +- .../AMDGPU/atomic_optimizations_global_pointer.ll | 20 +- .../AMDGPU/atomic_optimizations_local_pointer.ll | 16 +- .../AMDGPU/atomic_optimizations_pixelshader.ll | 7 +- .../AMDGPU/atomic_optimizations_raw_buffer.ll | 8 +- .../AMDGPU/atomic_optimizations_struct_buffer.ll | 8 +- test/CodeGen/AMDGPU/atomicrmw-nand.ll | 4 +- .../AMDGPU/attr-amdgpu-flat-work-group-size.ll | 2 +- test/CodeGen/AMDGPU/bitcast-vector-extract.ll | 8 +- test/CodeGen/AMDGPU/bitreverse.ll | 969 +- .../CodeGen/AMDGPU/branch-relaxation-debug-info.ll | 56 + test/CodeGen/AMDGPU/break-smem-soft-clauses.mir | 320 +- test/CodeGen/AMDGPU/break-vmem-soft-clauses.mir | 446 +- test/CodeGen/AMDGPU/bswap.ll | 746 +- test/CodeGen/AMDGPU/bug-vopc-commute.ll | 6 +- .../AMDGPU/build-vector-insert-elt-infloop.ll | 3 +- test/CodeGen/AMDGPU/byval-frame-setup.ll | 4 +- test/CodeGen/AMDGPU/call-argument-types.ll | 269 +- test/CodeGen/AMDGPU/call-constexpr.ll | 8 +- test/CodeGen/AMDGPU/call-graph-register-usage.ll | 17 +- test/CodeGen/AMDGPU/call-preserved-registers.ll | 6 +- test/CodeGen/AMDGPU/call-return-types.ll | 38 +- test/CodeGen/AMDGPU/call-to-kernel-undefined.ll | 20 + test/CodeGen/AMDGPU/call-to-kernel.ll | 18 + test/CodeGen/AMDGPU/calling-conventions.ll | 103 +- test/CodeGen/AMDGPU/cgp-addressing-modes.ll | 2 +- test/CodeGen/AMDGPU/chain-hi-to-lo.ll | 302 + test/CodeGen/AMDGPU/clamp-omod-special-case.mir | 60 +- test/CodeGen/AMDGPU/clamp.ll | 6 +- test/CodeGen/AMDGPU/cluster-flat-loads-postra.mir | 10 +- test/CodeGen/AMDGPU/cluster-flat-loads.mir | 4 +- .../AMDGPU/coalescer-extend-pruned-subrange.mir | 12 +- ...coalescer-subranges-another-copymi-not-live.mir | 4 +- .../coalescer-subranges-another-prune-error.mir | 10 +- test/CodeGen/AMDGPU/coalescer-subreg-join.mir | 8 +- .../AMDGPU/coalescer-subregjoin-fullcopy.mir | 10 +- .../coalescer-with-subregs-bad-identical.mir | 8 +- .../AMDGPU/coalescing-with-subregs-in-loop-bug.mir | 4 +- test/CodeGen/AMDGPU/code-object-v3.ll | 14 +- test/CodeGen/AMDGPU/collapse-endcf-broken.mir | 49 + test/CodeGen/AMDGPU/collapse-endcf.ll | 49 +- test/CodeGen/AMDGPU/collapse-endcf.mir | 882 + test/CodeGen/AMDGPU/combine-cond-add-sub.ll | 28 + test/CodeGen/AMDGPU/comdat.ll | 2 +- test/CodeGen/AMDGPU/constant-fold-imm-immreg.mir | 130 +- test/CodeGen/AMDGPU/couldnt-join-subrange-3.mir | 6 +- .../AMDGPU/cross-block-use-is-not-abi-copy.ll | 10 +- test/CodeGen/AMDGPU/cvt_f32_ubyte.ll | 890 +- test/CodeGen/AMDGPU/dce-disjoint-intervals.mir | 38 + test/CodeGen/AMDGPU/dead-lane.mir | 18 + test/CodeGen/AMDGPU/dead-mi-use-same-intr.mir | 55 + test/CodeGen/AMDGPU/dead_copy.mir | 2 +- .../CodeGen/AMDGPU/debug-value-scheduler-crash.mir | 135 + test/CodeGen/AMDGPU/debugger-emit-prologue.ll | 81 - test/CodeGen/AMDGPU/debugger-insert-nops.ll | 80 - test/CodeGen/AMDGPU/directive-amdgcn-target.ll | 10 +- test/CodeGen/AMDGPU/dpp_combine.ll | 185 - test/CodeGen/AMDGPU/dpp_combine.mir | 472 + test/CodeGen/AMDGPU/dpp_combine_subregs.mir | 143 - test/CodeGen/AMDGPU/ds-combine-with-dependence.ll | 130 + test/CodeGen/AMDGPU/ds-sub-offset.ll | 32 + test/CodeGen/AMDGPU/early-if-convert-cost.ll | 8 +- test/CodeGen/AMDGPU/early-if-convert.ll | 6 +- test/CodeGen/AMDGPU/elf-header-flags-mach.ll | 101 +- test/CodeGen/AMDGPU/elf-header-flags-sram-ecc.ll | 14 +- test/CodeGen/AMDGPU/elf-header-flags-xnack.ll | 4 +- test/CodeGen/AMDGPU/elf-header-osabi.ll | 27 +- test/CodeGen/AMDGPU/elf-notes.ll | 9 +- test/CodeGen/AMDGPU/elf.ll | 8 +- test/CodeGen/AMDGPU/elf.metadata.ll | 2 +- test/CodeGen/AMDGPU/elf.r600.ll | 2 +- test/CodeGen/AMDGPU/endpgm-dce.mir | 77 +- test/CodeGen/AMDGPU/extractelt-to-trunc.ll | 144 +- test/CodeGen/AMDGPU/fcanonicalize-elimination.ll | 2 +- test/CodeGen/AMDGPU/fdiv.f16.ll | 119 +- test/CodeGen/AMDGPU/fix-sgpr-copies.mir | 18 + test/CodeGen/AMDGPU/fix-wwm-liveness.mir | 185 - test/CodeGen/AMDGPU/fix-wwm-vgpr-copy.ll | 47 + .../AMDGPU/flat-error-unsupported-gpu-hsa.ll | 15 + test/CodeGen/AMDGPU/flat-load-clustering.mir | 14 +- test/CodeGen/AMDGPU/flat-offset-bug.ll | 85 + test/CodeGen/AMDGPU/flat_atomics.ll | 10 + test/CodeGen/AMDGPU/flat_atomics_i64.ll | 9 + test/CodeGen/AMDGPU/fmac.sdwa.ll | 76 + test/CodeGen/AMDGPU/fmin3.ll | 26 + test/CodeGen/AMDGPU/fmuladd.f16.ll | 266 +- test/CodeGen/AMDGPU/fneg-combines.ll | 24 +- test/CodeGen/AMDGPU/fold-cndmask.mir | 8 +- test/CodeGen/AMDGPU/fold-fi-operand-shrink.mir | 230 + test/CodeGen/AMDGPU/fold-imm-copy.mir | 8 +- test/CodeGen/AMDGPU/fold-imm-f16-f32.mir | 96 +- .../fold-immediate-operand-shrink-with-carry.mir | 34 +- .../AMDGPU/fold-immediate-operand-shrink.mir | 186 +- test/CodeGen/AMDGPU/fold-immediate-output-mods.mir | 56 +- test/CodeGen/AMDGPU/fold-implicit-operand.mir | 4 +- test/CodeGen/AMDGPU/fold-multiple.mir | 4 +- .../force-alwaysinline-lds-global-address.ll | 4 +- test/CodeGen/AMDGPU/frame-index-elimination.ll | 6 +- test/CodeGen/AMDGPU/function-args.ll | 6 +- test/CodeGen/AMDGPU/function-call-relocs.ll | 51 + test/CodeGen/AMDGPU/function-returns.ll | 2 +- test/CodeGen/AMDGPU/global-load-store-atomics.mir | 116 +- test/CodeGen/AMDGPU/global_atomics.ll | 11 + test/CodeGen/AMDGPU/global_atomics_i64.ll | 11 + test/CodeGen/AMDGPU/half.ll | 9 +- .../AMDGPU/hazard-buffer-store-v-interp.mir | 4 +- test/CodeGen/AMDGPU/hazard-inlineasm.mir | 4 +- test/CodeGen/AMDGPU/hazard-kill.mir | 32 + test/CodeGen/AMDGPU/hazard.mir | 6 +- test/CodeGen/AMDGPU/hsa-fp-mode.ll | 24 +- test/CodeGen/AMDGPU/hsa-func-align.ll | 2 +- test/CodeGen/AMDGPU/hsa-func.ll | 4 +- .../AMDGPU/hsa-metadata-deduce-ro-arg-v3.ll | 42 +- test/CodeGen/AMDGPU/hsa-metadata-deduce-ro-arg.ll | 2 +- .../AMDGPU/hsa-metadata-enqueu-kernel-v3.ll | 101 - .../AMDGPU/hsa-metadata-enqueue-kernel-v3.ll | 101 + test/CodeGen/AMDGPU/hsa-metadata-enqueue-kernel.ll | 2 +- .../AMDGPU/hsa-metadata-from-llvm-ir-full-v3.ll | 2502 +-- .../AMDGPU/hsa-metadata-from-llvm-ir-full.ll | 20 +- test/CodeGen/AMDGPU/hsa-metadata-hidden-args-v3.ll | 322 +- test/CodeGen/AMDGPU/hsa-metadata-hidden-args.ll | 6 +- test/CodeGen/AMDGPU/hsa-metadata-images-v3.ll | 146 +- test/CodeGen/AMDGPU/hsa-metadata-images.ll | 6 +- .../hsa-metadata-invalid-ocl-version-1-v3.ll | 2 +- .../AMDGPU/hsa-metadata-invalid-ocl-version-1.ll | 2 +- .../hsa-metadata-invalid-ocl-version-2-v3.ll | 2 +- .../AMDGPU/hsa-metadata-invalid-ocl-version-2.ll | 2 +- .../hsa-metadata-invalid-ocl-version-3-v3.ll | 2 +- .../AMDGPU/hsa-metadata-invalid-ocl-version-3.ll | 2 +- .../AMDGPU/hsa-metadata-kernel-code-props-v3.ll | 31 +- .../AMDGPU/hsa-metadata-kernel-code-props.ll | 6 +- .../AMDGPU/hsa-metadata-kernel-debug-props.ll | 67 - test/CodeGen/AMDGPU/hsa-note-no-func.ll | 2 + test/CodeGen/AMDGPU/hsa.ll | 4 +- test/CodeGen/AMDGPU/idiv-licm.ll | 8 +- test/CodeGen/AMDGPU/idot2.ll | 40 +- test/CodeGen/AMDGPU/idot4.ll | 2907 --- test/CodeGen/AMDGPU/idot4s.ll | 965 + test/CodeGen/AMDGPU/idot4u.ll | 1897 ++ test/CodeGen/AMDGPU/idot8.ll | 4829 ----- test/CodeGen/AMDGPU/idot8s.ll | 2039 ++ test/CodeGen/AMDGPU/idot8u.ll | 2732 +++ test/CodeGen/AMDGPU/img-nouse-adjust.ll | 22 + test/CodeGen/AMDGPU/imm.ll | 2 +- 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.../PowerPC/vsx-partword-int-loads-and-stores.ll | 32 +- test/CodeGen/PowerPC/vsx.ll | 2592 ++- test/CodeGen/RISCV/alu64.ll | 57 +- test/CodeGen/RISCV/atomic-cmpxchg-flag.ll | 29 + test/CodeGen/RISCV/atomic-cmpxchg.ll | 826 +- test/CodeGen/RISCV/atomic-load-store.ll | 182 + test/CodeGen/RISCV/atomic-rmw.ll | 10477 ++++++---- test/CodeGen/RISCV/bswap-ctlz-cttz-ctpop.ll | 88 +- test/CodeGen/RISCV/callee-saved-fpr32s.ll | 210 + test/CodeGen/RISCV/callee-saved-fpr64s.ll | 160 + test/CodeGen/RISCV/callee-saved-gprs.ll | 229 + .../RISCV/calling-conv-ilp32-ilp32f-common.ll | 287 + .../calling-conv-ilp32-ilp32f-ilp32d-common.ll | 1025 + test/CodeGen/RISCV/calling-conv-ilp32.ll | 194 + test/CodeGen/RISCV/calling-conv-ilp32d.ll | 294 + .../RISCV/calling-conv-ilp32f-ilp32d-common.ll | 221 + .../RISCV/calling-conv-lp64-lp64f-common.ll | 68 + .../RISCV/calling-conv-lp64-lp64f-lp64d-common.ll | 530 + test/CodeGen/RISCV/calling-conv-lp64.ll | 203 + test/CodeGen/RISCV/calling-conv-rv32f-ilp32.ll | 12 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test/CodeGen/RISCV/float-intrinsics.ll | 234 +- test/CodeGen/RISCV/float-mem.ll | 84 +- test/CodeGen/RISCV/float-select-fcmp.ll | 215 +- test/CodeGen/RISCV/i32-icmp.ll | 22 + test/CodeGen/RISCV/imm.ll | 8 +- test/CodeGen/RISCV/inline-asm.ll | 31 + test/CodeGen/RISCV/jumptable.ll | 26 +- test/CodeGen/RISCV/large-stack.ll | 8 +- test/CodeGen/RISCV/legalize-fneg.ll | 87 + test/CodeGen/RISCV/mattr-invalid-combination.ll | 4 + test/CodeGen/RISCV/pr40333.ll | 20 + test/CodeGen/RISCV/remat.ll | 127 +- test/CodeGen/RISCV/rv32e.ll | 7 + test/CodeGen/RISCV/rv32i-rv64i-float-double.ll | 86 + test/CodeGen/RISCV/rv64d-double-convert.ll | 130 + test/CodeGen/RISCV/rv64f-float-convert.ll | 187 + test/CodeGen/RISCV/rv64m-exhaustive-w-insts.ll | 32 +- test/CodeGen/RISCV/sdata-limit-0.ll | 14 + test/CodeGen/RISCV/sdata-limit-4.ll | 15 + test/CodeGen/RISCV/sdata-limit-8.ll | 15 + test/CodeGen/RISCV/sdata-local-sym.ll | 16 + test/CodeGen/RISCV/select-optimize-multiple.ll | 323 + test/CodeGen/RISCV/select-optimize-multiple.mir | 191 + test/CodeGen/RISCV/setcc-logic.ll | 126 + test/CodeGen/RISCV/shifts.ll | 257 + test/CodeGen/RISCV/target-abi-invalid.ll | 58 + test/CodeGen/RISCV/target-abi-valid.ll | 40 + .../RISCV/umulo-128-legalisation-lowering.ll | 204 +- test/CodeGen/RISCV/vararg.ll | 2245 ++- test/CodeGen/SPARC/fp128.ll | 30 +- test/CodeGen/SPARC/inlineasm-output-template.ll | 26 + test/CodeGen/SPARC/missinglabel.ll | 24 +- test/CodeGen/SPARC/reg64.ll | 10 + test/CodeGen/SPARC/tls.ll | 8 +- .../SystemZ/DAGCombiner_illegal_BUILD_VECTOR.ll | 16 +- test/CodeGen/SystemZ/buildvector-00.ll | 47 + test/CodeGen/SystemZ/dag-combine-03.ll | 44 +- test/CodeGen/SystemZ/dag-combine-05.ll | 35 + test/CodeGen/SystemZ/debuginstr-00.mir | 85 + test/CodeGen/SystemZ/debuginstr-01.mir | 80 + test/CodeGen/SystemZ/debuginstr-02.mir | 93 + test/CodeGen/SystemZ/debuginstr-cgp.mir | 171 + test/CodeGen/SystemZ/fp-const-11.ll | 30 + test/CodeGen/SystemZ/fp-const-12.ll | 63 + test/CodeGen/SystemZ/fp-conv-18.ll | 34 + test/CodeGen/SystemZ/inlineasm-output-template.ll | 26 + test/CodeGen/SystemZ/int-sadd-07.ll | 63 +- test/CodeGen/SystemZ/int-ssub-07.ll | 6 +- test/CodeGen/SystemZ/int-uadd-12.ll | 34 + test/CodeGen/SystemZ/knownbits.ll | 6 +- test/CodeGen/SystemZ/load-and-test-RA-hints.mir | 166 + test/CodeGen/SystemZ/memcmp-01.ll | 58 +- test/CodeGen/SystemZ/regcoal-subranges-update.mir | 94 + test/CodeGen/SystemZ/rot-shift-64-sub-amt.ll | 82 + test/CodeGen/SystemZ/scalar-ctlz.ll | 107 + test/CodeGen/SystemZ/strcmp-01.ll | 18 +- test/CodeGen/SystemZ/subregliveness-02.ll | 2 +- test/CodeGen/SystemZ/swifterror.ll | 2 +- test/CodeGen/SystemZ/vec-const-19.ll | 18 + test/CodeGen/SystemZ/vec-extract-01.ll | 3 +- test/CodeGen/Thumb/addr-modes.ll | 4 +- test/CodeGen/Thumb/consthoist-physical-addr.ll | 75 + test/CodeGen/Thumb/frame-access.ll | 22 +- test/CodeGen/Thumb/iabs-vector.ll | 20 + test/CodeGen/Thumb/iabs.ll | 68 +- test/CodeGen/Thumb/large-fn-switch.ll | 712 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.../Thumb2/umulo-128-legalisation-lowering.ll | 10 +- test/CodeGen/WebAssembly/PR40267.ll | 22 + test/CodeGen/WebAssembly/PR41149.ll | 27 + test/CodeGen/WebAssembly/add-prototypes-conflit.ll | 22 + test/CodeGen/WebAssembly/add-prototypes.ll | 32 +- test/CodeGen/WebAssembly/address-offsets.ll | 292 +- test/CodeGen/WebAssembly/annotations.mir | 94 - test/CodeGen/WebAssembly/atomic-mem-consistency.ll | 2 +- test/CodeGen/WebAssembly/atomic-rmw.ll | 2 +- test/CodeGen/WebAssembly/bulk-memory-intrinsics.ll | 28 + test/CodeGen/WebAssembly/bulk-memory.ll | 207 + test/CodeGen/WebAssembly/byval.ll | 30 +- test/CodeGen/WebAssembly/call-pic.ll | 67 + test/CodeGen/WebAssembly/call.ll | 32 +- test/CodeGen/WebAssembly/cfg-stackify-dbg-skip.ll | 1 - test/CodeGen/WebAssembly/cfg-stackify-dbg.mir | 27 + test/CodeGen/WebAssembly/cfg-stackify-eh.ll | 534 +- test/CodeGen/WebAssembly/cfg-stackify-eh.mir | 322 - test/CodeGen/WebAssembly/cfg-stackify.ll | 547 +- test/CodeGen/WebAssembly/conv-trap.ll | 88 +- test/CodeGen/WebAssembly/custom-sections.ll | 26 + test/CodeGen/WebAssembly/eh-labels.mir | 46 + test/CodeGen/WebAssembly/exception.ll | 300 +- test/CodeGen/WebAssembly/f16.ll | 59 +- test/CodeGen/WebAssembly/f32.ll | 2 +- test/CodeGen/WebAssembly/f64.ll | 2 +- test/CodeGen/WebAssembly/fast-isel-noreg.ll | 8 +- test/CodeGen/WebAssembly/frem.ll | 4 +- .../WebAssembly/function-bitcasts-varargs.ll | 10 +- test/CodeGen/WebAssembly/function-bitcasts.ll | 84 +- test/CodeGen/WebAssembly/function-info.mir | 12 + test/CodeGen/WebAssembly/global.ll | 9 +- test/CodeGen/WebAssembly/global_dtors.ll | 9 + test/CodeGen/WebAssembly/i128.ll | 32 +- test/CodeGen/WebAssembly/implicit-def.ll | 29 +- test/CodeGen/WebAssembly/import-module.ll | 3 +- test/CodeGen/WebAssembly/indirect-import.ll | 14 +- .../WebAssembly/inlineasm-output-template.ll | 26 + .../WebAssembly/irreducible-cfg-exceptions.ll | 46 +- test/CodeGen/WebAssembly/irreducible-cfg-nested.ll | 63 - .../CodeGen/WebAssembly/irreducible-cfg-nested2.ll | 39 - test/CodeGen/WebAssembly/irreducible-cfg.ll | 141 +- test/CodeGen/WebAssembly/irreducible-cfg.mir | 84 + test/CodeGen/WebAssembly/libcalls.ll | 4 +- test/CodeGen/WebAssembly/load-store-pic.ll | 153 + .../CodeGen/WebAssembly/lower-em-ehsjlj-options.ll | 12 +- test/CodeGen/WebAssembly/lower-global-dtors.ll | 69 +- test/CodeGen/WebAssembly/main-declaration.ll | 16 +- test/CodeGen/WebAssembly/main-no-args.ll | 13 +- test/CodeGen/WebAssembly/main-three-args.ll | 16 + test/CodeGen/WebAssembly/main-with-args.ll | 2 +- test/CodeGen/WebAssembly/mem-intrinsics.ll | 20 +- test/CodeGen/WebAssembly/muloti4.ll | 2 +- test/CodeGen/WebAssembly/mutable-globals.ll | 16 + test/CodeGen/WebAssembly/phi.ll | 7 +- test/CodeGen/WebAssembly/reg-stackify.ll | 62 +- test/CodeGen/WebAssembly/returned.ll | 16 +- test/CodeGen/WebAssembly/select.ll | 25 +- test/CodeGen/WebAssembly/signext-arg.ll | 2 +- test/CodeGen/WebAssembly/signext-zeroext.ll | 4 +- test/CodeGen/WebAssembly/simd-build-pair.ll | 33 + test/CodeGen/WebAssembly/simd-build-vector.ll | 127 + test/CodeGen/WebAssembly/simd-comparisons.ll | 632 + test/CodeGen/WebAssembly/simd-scalar-to-vector.ll | 43 + test/CodeGen/WebAssembly/simd-select.ll | 12 +- test/CodeGen/WebAssembly/simd-unsupported.ll | 450 + test/CodeGen/WebAssembly/simd.ll | 32 +- test/CodeGen/WebAssembly/stack-alignment.ll | 44 +- test/CodeGen/WebAssembly/stack-protector.ll | 30 + test/CodeGen/WebAssembly/switch.ll | 52 +- test/CodeGen/WebAssembly/target-features-tls.ll | 26 + test/CodeGen/WebAssembly/target-features.ll | 95 + test/CodeGen/WebAssembly/tls.ll | 2 +- .../WebAssembly/umulo-128-legalisation-lowering.ll | 12 +- test/CodeGen/WebAssembly/umulo-i64.ll | 2 +- test/CodeGen/WebAssembly/unreachable.ll | 2 +- .../WebAssembly/unsupported-function-bitcasts.ll | 12 +- test/CodeGen/WebAssembly/unused-argument.ll | 2 +- test/CodeGen/WebAssembly/userstack.ll | 62 +- test/CodeGen/WebAssembly/varargs.ll | 30 +- test/CodeGen/WebAssembly/wasmehprepare.ll | 119 +- test/CodeGen/WinEH/wineh-no-demotion.ll | 2 +- .../CodeGen/WinEH/wineh-statenumbering-cleanups.ll | 4 +- test/CodeGen/X86/2006-11-17-IllegalMove.ll | 8 +- test/CodeGen/X86/2008-09-29-VolatileBug.ll | 4 +- test/CodeGen/X86/2009-02-26-MachineLICMBug.ll | 31 +- test/CodeGen/X86/2009-10-19-atomic-cmp-eflags.ll | 2 +- test/CodeGen/X86/2010-02-23-DAGCombineBug.ll | 15 +- test/CodeGen/X86/2011-10-19-widen_vselect.ll | 18 +- test/CodeGen/X86/2011-10-21-widen-cmp.ll | 22 +- test/CodeGen/X86/2011-12-28-vselecti8.ll | 6 +- test/CodeGen/X86/2012-02-29-CoalescerBug.ll | 2 +- test/CodeGen/X86/2012-07-10-extload64.ll | 3 +- test/CodeGen/X86/3dnow-schedule.ll | 394 - test/CodeGen/X86/8bit_cmov_of_trunc_promotion.ll | 343 + test/CodeGen/X86/GlobalISel/add-ext.ll | 79 +- test/CodeGen/X86/GlobalISel/ashr-scalar.ll | 22 +- test/CodeGen/X86/GlobalISel/callingconv.ll | 4 +- test/CodeGen/X86/GlobalISel/ext-x86-64.ll | 4 - test/CodeGen/X86/GlobalISel/ext.ll | 4 - test/CodeGen/X86/GlobalISel/gep.ll | 20 +- .../X86/GlobalISel/irtranslator-callingconv.ll | 188 +- test/CodeGen/X86/GlobalISel/legalize-add-v256.mir | 104 +- test/CodeGen/X86/GlobalISel/legalize-add-v512.mir | 131 +- test/CodeGen/X86/GlobalISel/legalize-add.mir | 4 +- .../CodeGen/X86/GlobalISel/legalize-and-scalar.mir | 2 +- .../CodeGen/X86/GlobalISel/legalize-ext-x86-64.mir | 8 +- test/CodeGen/X86/GlobalISel/legalize-fneg.mir | 48 + .../X86/GlobalISel/legalize-memop-scalar-32.mir | 62 + .../X86/GlobalISel/legalize-memop-scalar-64.mir | 57 + .../X86/GlobalISel/legalize-memop-scalar.mir | 112 - .../CodeGen/X86/GlobalISel/legalize-mul-scalar.mir | 2 +- test/CodeGen/X86/GlobalISel/legalize-or-scalar.mir | 2 +- test/CodeGen/X86/GlobalISel/legalize-sub.mir | 2 +- test/CodeGen/X86/GlobalISel/legalize-trunc.mir | 16 +- .../CodeGen/X86/GlobalISel/legalize-xor-scalar.mir | 2 +- test/CodeGen/X86/GlobalISel/lshr-scalar.ll | 22 +- test/CodeGen/X86/GlobalISel/select-GV-32.mir | 84 + test/CodeGen/X86/GlobalISel/select-GV-64.mir | 84 + test/CodeGen/X86/GlobalISel/select-GV.mir | 114 - test/CodeGen/X86/GlobalISel/select-ashr-scalar.mir | 83 +- test/CodeGen/X86/GlobalISel/select-brcond.mir | 2 +- test/CodeGen/X86/GlobalISel/select-cmp.mir | 52 +- test/CodeGen/X86/GlobalISel/select-lshr-scalar.mir | 83 +- .../GlobalISel/select-memop-scalar-unordered.mir | 952 + .../X86/GlobalISel/select-memop-scalar-x32.mir | 48 +- test/CodeGen/X86/GlobalISel/select-phi.mir | 36 +- test/CodeGen/X86/GlobalISel/select-shl-scalar.mir | 83 +- test/CodeGen/X86/GlobalISel/shl-scalar.ll | 27 +- .../X86/GlobalISel/x86-legalize-inttoptr.mir | 4 +- .../X86/GlobalISel/x86-legalize-ptrtoint.mir | 16 +- test/CodeGen/X86/GlobalISel/x86-legalize-srem.mir | 24 +- test/CodeGen/X86/GlobalISel/x86-legalize-urem.mir | 24 +- .../CodeGen/X86/GlobalISel/x86-select-inttoptr.mir | 4 +- .../CodeGen/X86/GlobalISel/x86-select-ptrtoint.mir | 16 +- test/CodeGen/X86/GlobalISel/x86-select-srem.mir | 24 +- test/CodeGen/X86/GlobalISel/x86-select-udiv.mir | 24 +- test/CodeGen/X86/GlobalISel/x86-select-urem.mir | 24 +- test/CodeGen/X86/GlobalISel/x86_64-fallback.ll | 2 +- .../x86_64-irtranslator-struct-return.ll | 39 +- .../X86/GlobalISel/x86_64-legalize-sitofp.mir | 26 +- test/CodeGen/X86/GlobalISel/x86_64-select-fcmp.mir | 120 +- test/CodeGen/X86/MergeConsecutiveStores.ll | 4 +- test/CodeGen/X86/O0-pipeline.ll | 1 - test/CodeGen/X86/O3-pipeline.ll | 1 - test/CodeGen/X86/PR37310.mir | 2 +- test/CodeGen/X86/PR40322.ll | 164 + test/CodeGen/X86/abi-isel.ll | 1588 +- test/CodeGen/X86/absolute-rotate.ll | 16 + test/CodeGen/X86/add-ext.ll | 19 +- test/CodeGen/X86/add.ll | 177 + test/CodeGen/X86/addcarry.ll | 26 + test/CodeGen/X86/addr-mode-matcher-2.ll | 73 + test/CodeGen/X86/adx-intrinsics-upgrade.ll | 4 +- test/CodeGen/X86/adx-intrinsics.ll | 4 +- test/CodeGen/X86/adx-schedule.ll | 114 - test/CodeGen/X86/aes-schedule.ll | 751 - test/CodeGen/X86/aligned-variadic.ll | 2 +- test/CodeGen/X86/and-su.ll | 2 +- test/CodeGen/X86/apm.ll | 9 +- test/CodeGen/X86/arg-copy-elide-win64.ll | 49 + test/CodeGen/X86/asm-reject-vk32-vk64.ll | 31 + test/CodeGen/X86/atom-sched.ll | 8 +- test/CodeGen/X86/atomic-add.ll | 375 + test/CodeGen/X86/atomic-fp.ll | 873 + test/CodeGen/X86/atomic-idempotent.ll | 166 + test/CodeGen/X86/atomic-load-store-wide.ll | 123 +- test/CodeGen/X86/atomic-mi.ll | 1901 ++ test/CodeGen/X86/atomic-monotonic.ll | 118 + test/CodeGen/X86/atomic-non-integer.ll | 904 +- test/CodeGen/X86/{atomic_op.ll => atomic-op.ll} | 0 test/CodeGen/X86/atomic-pointer.ll | 6 +- test/CodeGen/X86/atomic-unordered.ll | 2555 +++ test/CodeGen/X86/atomic128.ll | 558 + test/CodeGen/X86/atomic16.ll | 12 + test/CodeGen/X86/atomic32.ll | 56 +- test/CodeGen/X86/atomic64.ll | 950 +- test/CodeGen/X86/atomic6432.ll | 929 +- test/CodeGen/X86/atomic_add.ll | 219 - test/CodeGen/X86/atomic_idempotent.ll | 166 - test/CodeGen/X86/atomic_mi.ll | 2285 --- test/CodeGen/X86/atomicf128.ll | 27 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test/CodeGen/X86/fast-isel-fneg-kill.ll | 22 + test/CodeGen/X86/fast-isel-fneg.ll | 101 +- test/CodeGen/X86/fast-isel-gc-intrinsics.ll | 4 + .../X86/fast-isel-int-float-conversion-x86-64.ll | 20 +- test/CodeGen/X86/fast-isel-int-float-conversion.ll | 32 +- test/CodeGen/X86/fast-isel-select-pseudo-cmov.ll | 40 +- test/CodeGen/X86/fast-isel-select.ll | 8 +- test/CodeGen/X86/fast-isel-shift.ll | 4 +- .../X86/fast-isel-uint-float-conversion-x86-64.ll | 10 +- .../CodeGen/X86/fast-isel-uint-float-conversion.ll | 16 +- test/CodeGen/X86/fast-isel-x86-64.ll | 14 +- test/CodeGen/X86/fcmove.ll | 2 +- test/CodeGen/X86/fcmp-constant.ll | 259 + test/CodeGen/X86/fdiv-combine-vec.ll | 159 + test/CodeGen/X86/fdiv-combine.ll | 9 - test/CodeGen/X86/file-directive.ll | 2 +- test/CodeGen/X86/fixup-bw-inst.mir | 2 +- test/CodeGen/X86/fixup-lea.ll | 164 +- test/CodeGen/X86/flags-copy-lowering.mir | 222 +- test/CodeGen/X86/fltused.ll | 5 +- test/CodeGen/X86/fltused_function_pointer.ll | 5 +- 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| 4748 +++++ test/CodeGen/X86/masked_expandload.ll | 4596 +++++ test/CodeGen/X86/masked_gather_scatter.ll | 20 +- test/CodeGen/X86/masked_load.ll | 6946 ++++++- test/CodeGen/X86/masked_store.ll | 5454 +++++- test/CodeGen/X86/masked_store_trunc.ll | 7426 ++++++++ test/CodeGen/X86/masked_store_trunc_ssat.ll | 8695 +++++++++ test/CodeGen/X86/masked_store_trunc_usat.ll | 8355 ++++++++ test/CodeGen/X86/mcu-abi.ll | 143 +- test/CodeGen/X86/memcmp-optsize.ll | 39 +- test/CodeGen/X86/memcmp.ll | 322 +- test/CodeGen/X86/memcpy-struct-by-value.ll | 170 +- test/CodeGen/X86/memcpy.ll | 229 +- test/CodeGen/X86/merge-consecutive-loads-256.ll | 6 +- test/CodeGen/X86/merge-consecutive-loads-512.ll | 78 +- test/CodeGen/X86/merge_store.ll | 2 +- test/CodeGen/X86/midpoint-int-vec-128.ll | 3966 ++++ test/CodeGen/X86/midpoint-int-vec-256.ll | 3638 ++++ test/CodeGen/X86/midpoint-int-vec-512.ll | 1299 ++ test/CodeGen/X86/midpoint-int.ll | 1287 ++ test/CodeGen/X86/min-legal-vector-width.ll | 54 +- test/CodeGen/X86/misched_phys_reg_assign_order.ll | 2 +- test/CodeGen/X86/mmx-schedule.ll | 7559 -------- test/CodeGen/X86/movbe-schedule.ll | 190 - test/CodeGen/X86/movmsk-cmp.ll | 1663 +- test/CodeGen/X86/movmsk.ll | 7 +- test/CodeGen/X86/mul-constant-i32.ll | 1794 +- test/CodeGen/X86/mul-constant-i64.ll | 1783 +- test/CodeGen/X86/mul-constant-i8.ll | 12 +- test/CodeGen/X86/mul-constant-result.ll | 2 +- test/CodeGen/X86/mul128.ll | 65 + test/CodeGen/X86/mulo-pow2.ll | 146 + test/CodeGen/X86/mulvi32.ll | 21 +- test/CodeGen/X86/musttail-varargs.ll | 20 +- test/CodeGen/X86/musttail.ll | 8 +- test/CodeGen/X86/mwaitx-schedule.ll | 65 - test/CodeGen/X86/mwaitx.ll | 50 +- test/CodeGen/X86/narrow-shl-cst.ll | 211 +- test/CodeGen/X86/non-value-mem-operand.mir | 14 +- test/CodeGen/X86/nontemporal-loads.ll | 48 +- test/CodeGen/X86/nosse-vector.ll | 8 +- test/CodeGen/X86/not-and-simplify.ll | 3 +- test/CodeGen/X86/oddshuffles.ll | 348 +- test/CodeGen/X86/oddsubvector.ll | 159 + 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