This is an automated email from the git hooks/post-receive script.

tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-stable-allyesconfig in repository toolchain/ci/llvm-project.

from 725b3463c53 AMDGPUTargetObjectFile.h - remove unnecessary includes. NFC. adds 15224408f0d [VPlan] Use VPUser for VPWidenSelectRecipe operands (NFC). adds b05b69e056a AMDGPUInstPrinter.cpp - add CommandLine.h include. NFC. adds 7eed772a279 [PatternMatch] abbreviate vector inst matchers; NFC adds c048a02b5b2 [InstCombine] fold FP trunc into exact itofp adds 4c5818dd8cd [clang-tidy] Fix potential assert in use-noexcept check adds 86e3abc9e63 [PowerPC] Add some InstAlias definitions adds 71bed8206b3 AMDGPU.h - reduce TargetMachine.h include. NFC. adds 1e7865d9464 [X86] SimplifyMultipleUseDemandedBitsForTargetNode - add in [...] adds d43fac052e1 [PhaseOrdering] adjust test to use default alias analysis w [...] adds 0deab8a54fd [LV] Either get invariant condition OR vector condition. adds 57bb4787d72 [Pass Manager] remove EarlyCSE as clean-up for VectorCombine adds e508d643cfd [X86][AVX] Fold extract_subvector(broadcast(x),c) -> extrac [...] adds 8a5aea7b504 [X86][AVX] Fold extract_subvector(subv_broadcast(x),c) -> (x) adds 2be92b7f7e4 Fix ignore-traversal to call correct method adds e60de8c825d Add missing test adds 51dec88c5df [X86] Remove isCommutable flag from MULX instructions. adds d0da5d2bbe8 Change default traversal in AST Matchers to ignore invisible nodes adds 52b03aaa22f [clang-format][PR46043] Parse git config w/ implicit values adds 838d12207b0 [TargetLoweringObjectFileImpl] Use llvm::transform adds 4b8632e174d [mlir] Expand operand adapter to take attributes adds 20e9fc55feb [MCDwarf] Delete unneeded DW_AT_prototyped for DW_TAG_label adds 1b79509f97b [MCDwarf] Delete unneeded DW_AT_unspecified_parameters adds 760f45eacad [CMake] Properly handle the LTO cache arguments for MinGW adds 5b7ff6f07ff [VE][NFC] Correct sjlj_expection test adds b752a2743ab [clangd] Log use of heuristic go-to-def. NFC adds 3895148d7cd [OpenMP] Fix a race in task queue reallocation adds 840450549c9 [LV] Clamp MaxVF to power of 2. adds 447ea9b4f5f [AST] default implementation is possible for non-member fun [...] adds 72c5ea1d73b [clangd] Enable cross-file-rename by default. adds 83bd2c4a068 Prevent GetNumChildren from transitively walking pointer chains adds fe22e5689e9 [lldb][NFC] Pass DeclarationName to NameSearchContext by value adds b087b91c917 [AMDGPU][CODEGEN] Added 'A' constraint for inline assembler adds 8e62f3b658c TargetInstrInfo.h - remove unnecessary includes. NFC. adds 0e83e67cd35 SystemZInstrBuilder.h - remove unnecessary PseudoSourceValu [...] adds 9fa58d1bf2f [DAG] Add SimplifyDemandedVectorElts binop SimplifyMultiple [...] adds 7b15dc1e0e8 [ObjectYAML][DWARF] Remove unimplemented function. adds 9ff361b099f [ARM] VMULH tests for when other parts are working. NFC adds 5a4bcec8db4 [PowerPC][NFC] Split PPCELFStreamer::emitInstruction adds 7293dd5b403 Added pow intrinsic to LLVMIR dialect adds 38366cf1676 FunctionLoweringInfo.h - remove orphan addSEHHandlersForLPa [...] adds 8f48814879c FunctionLoweringInfo.h - move APInt.h dependency to Functio [...] adds fa038e03504 [x86] favor vector constant load to avoid GPR to XMM transf [...] new 5bb632339ac InlineAdvisor.h - remove unnecessary PreservedAnalyses forw [...] new 8b4ecafee66 InstructionSimplify.h - remove unnecessary includes. NFC. new 03ec5b6bc46 LoopInfo.h - remove unnecessary PHINode forward declaration. NFC. new 0e3faab6f0f MemoryBuiltins.h - remove unnecessary TargetLibraryInfo for [...] new 8eae32188bb Improve stack-clash implementation on x86 new 6ade4eb9181 MemoryLocation.h - reduce Instructions.h include to Instruc [...]

The 6 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference.

Summary of changes: .../clang-tidy/modernize/UseNoexceptCheck.cpp | 25 +- .../clang-tidy/modernize/UseNoexceptCheck.h | 2 +- .../readability/UppercaseLiteralSuffixCheck.cpp | 4 +- clang-tools-extra/clangd/XRefs.cpp | 22 +- clang-tools-extra/clangd/tool/ClangdMain.cpp | 7 +- .../checkers/modernize-use-noexcept-error.cpp | 6 + clang/docs/ReleaseNotes.rst | 9 +- clang/include/clang/AST/Decl.h | 10 +- clang/include/clang/AST/ParentMapContext.h | 2 +- clang/include/clang/AST/RecursiveASTVisitor.h | 10 +- clang/lib/AST/Expr.cpp | 3 +- clang/tools/clang-format/git-clang-format | 7 +- clang/unittests/AST/ASTTraverserTest.cpp | 32 ++ .../unittests/ASTMatchers/ASTMatchersNodeTest.cpp | 6 +- .../ASTMatchers/ASTMatchersTraversalTest.cpp | 20 + .../RecursiveASTVisitorTests/CXXMethodDecl.cpp | 18 + lld/test/ELF/ppc32-call-stub-pic.s | 2 +- .../ExpressionParser/Clang/NameSearchContext.h | 4 +- .../Plugins/TypeSystem/Clang/TypeSystemClang.cpp | 34 +- .../functionalities/pointer_num_children}/Makefile | 0 .../pointer_num_children/TestPointerNumChildren.py | 28 ++ .../functionalities/pointer_num_children/main.cpp | 16 + llvm/cmake/modules/HandleLLVMOptions.cmake | 6 +- llvm/docs/LangRef.rst | 2 +- llvm/include/llvm/Analysis/InlineAdvisor.h | 1 - llvm/include/llvm/Analysis/InstructionSimplify.h | 13 +- llvm/include/llvm/Analysis/LoopInfo.h | 1 - llvm/include/llvm/Analysis/MemoryBuiltins.h | 1 - llvm/include/llvm/Analysis/MemoryLocation.h | 6 +- llvm/include/llvm/CodeGen/FunctionLoweringInfo.h | 4 +- llvm/include/llvm/CodeGen/TargetInstrInfo.h | 2 - llvm/include/llvm/IR/PatternMatch.h | 8 +- llvm/include/llvm/ObjectYAML/DWARFEmitter.h | 3 - llvm/lib/Analysis/InstructionSimplify.cpp | 6 +- llvm/lib/Analysis/VectorUtils.cpp | 6 +- llvm/lib/CodeGen/CodeGenPrepare.cpp | 5 +- .../CodeGen/SelectionDAG/FunctionLoweringInfo.cpp | 1 + llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp | 75 ++- llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp | 2 +- llvm/lib/MC/MCDwarf.cpp | 18 +- llvm/lib/Passes/PassBuilder.cpp | 1 - llvm/lib/Target/AArch64/AArch64ISelLowering.cpp | 8 +- llvm/lib/Target/AMDGPU/AMDGPU.h | 3 +- llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp | 13 +- .../Target/AMDGPU/AMDGPUFixFunctionBitcasts.cpp | 1 + llvm/lib/Target/AMDGPU/AMDGPUHSAMetadataStreamer.h | 1 + llvm/lib/Target/AMDGPU/AMDGPUISelLowering.h | 1 + llvm/lib/Target/AMDGPU/AMDGPUPerfHintAnalysis.cpp | 1 + .../AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp | 1 + llvm/lib/Target/AMDGPU/SIISelLowering.cpp | 58 +++ llvm/lib/Target/AMDGPU/SIISelLowering.h | 7 + llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp | 10 +- llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h | 3 + llvm/lib/Target/ARM/ARMISelLowering.cpp | 4 +- llvm/lib/Target/ARM/MVETailPredication.cpp | 8 +- .../Target/PowerPC/MCTargetDesc/PPCELFStreamer.cpp | 26 +- .../Target/PowerPC/MCTargetDesc/PPCELFStreamer.h | 2 + llvm/lib/Target/PowerPC/PPCInstr64Bit.td | 18 + llvm/lib/Target/PowerPC/PPCInstrHTM.td | 5 + llvm/lib/Target/PowerPC/PPCInstrInfo.td | 31 ++ llvm/lib/Target/SystemZ/SystemZInstrBuilder.h | 1 - llvm/lib/Target/X86/X86FrameLowering.cpp | 25 +- llvm/lib/Target/X86/X86ISelLowering.cpp | 127 +++-- llvm/lib/Target/X86/X86InstrArithmetic.td | 1 - llvm/lib/Transforms/IPO/PassManagerBuilder.cpp | 8 +- .../Transforms/InstCombine/InstCombineCasts.cpp | 91 ++-- .../Transforms/InstCombine/InstCombineCompares.cpp | 6 +- .../Transforms/InstCombine/InstCombineSelect.cpp | 2 +- .../InstCombine/InstCombineVectorOps.cpp | 28 +- .../InstCombine/InstructionCombining.cpp | 26 +- .../Transforms/Scalar/LowerConstantIntrinsics.cpp | 1 + llvm/lib/Transforms/Vectorize/LoopVectorize.cpp | 30 +- llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp | 4 +- llvm/lib/Transforms/Vectorize/VPlan.h | 12 +- llvm/lib/Transforms/Vectorize/VectorCombine.cpp | 24 +- llvm/test/CodeGen/AArch64/mul_by_elt.ll | 2 +- llvm/test/CodeGen/AMDGPU/inline-constraints.ll | 277 ++++++++++- llvm/test/CodeGen/AMDGPU/opt-pipeline.ll | 3 - .../PowerPC/2007-04-30-InlineAsmEarlyClobber.ll | 2 +- llvm/test/CodeGen/PowerPC/2009-09-18-carrybit.ll | 4 +- llvm/test/CodeGen/PowerPC/2010-02-12-saveCR.ll | 2 +- .../PowerPC/CompareEliminationSpillIssue.ll | 2 +- llvm/test/CodeGen/PowerPC/atomics-regression.ll | 60 +-- llvm/test/CodeGen/PowerPC/crbits.ll | 6 +- llvm/test/CodeGen/PowerPC/eqv-andc-orc-nor.ll | 2 +- .../test/CodeGen/PowerPC/expand-contiguous-isel.ll | 4 +- llvm/test/CodeGen/PowerPC/expand-isel.ll | 2 +- llvm/test/CodeGen/PowerPC/f128-compare.ll | 12 +- llvm/test/CodeGen/PowerPC/fast-isel-binary.ll | 6 +- llvm/test/CodeGen/PowerPC/fold-remove-li.ll | 2 +- llvm/test/CodeGen/PowerPC/fold-zero.ll | 6 +- llvm/test/CodeGen/PowerPC/funnel-shift.ll | 8 +- .../CodeGen/PowerPC/handle-f16-storage-type.ll | 2 +- llvm/test/CodeGen/PowerPC/htm.ll | 10 +- llvm/test/CodeGen/PowerPC/i1-ext-fold.ll | 8 +- llvm/test/CodeGen/PowerPC/i64_fp_round.ll | 2 +- llvm/test/CodeGen/PowerPC/ifcvt.ll | 4 +- llvm/test/CodeGen/PowerPC/inc-of-add.ll | 12 +- .../CodeGen/PowerPC/loop-instr-form-prepare.ll | 2 +- llvm/test/CodeGen/PowerPC/machine-pre.ll | 2 +- llvm/test/CodeGen/PowerPC/memcmp.ll | 8 +- llvm/test/CodeGen/PowerPC/mul-const.ll | 6 +- llvm/test/CodeGen/PowerPC/noPermuteFormasking.ll | 6 +- llvm/test/CodeGen/PowerPC/optcmp.ll | 20 +- llvm/test/CodeGen/PowerPC/optimize-andiso.ll | 2 +- .../CodeGen/PowerPC/pcrel-call-linkage-leaf.ll | 8 +- llvm/test/CodeGen/PowerPC/popcnt-zext.ll | 16 +- llvm/test/CodeGen/PowerPC/ppc-crbits-onoff.ll | 4 +- llvm/test/CodeGen/PowerPC/ppc64-P9-mod.ll | 4 +- llvm/test/CodeGen/PowerPC/ppc64-P9-vabsd.ll | 4 +- llvm/test/CodeGen/PowerPC/pr44183.ll | 2 +- .../CodeGen/PowerPC/remove-redundant-load-imm.ll | 2 +- llvm/test/CodeGen/PowerPC/sat-add.ll | 60 +-- llvm/test/CodeGen/PowerPC/select_const.ll | 56 +-- llvm/test/CodeGen/PowerPC/setcc-logic.ll | 6 +- llvm/test/CodeGen/PowerPC/shift128.ll | 2 +- llvm/test/CodeGen/PowerPC/signbit-shift.ll | 12 +- llvm/test/CodeGen/PowerPC/sms-cpy-1.ll | 6 +- llvm/test/CodeGen/PowerPC/sms-phi-2.ll | 14 +- llvm/test/CodeGen/PowerPC/spe.ll | 18 +- llvm/test/CodeGen/PowerPC/srem-lkk.ll | 12 +- llvm/test/CodeGen/PowerPC/srem-vector-lkk.ll | 184 +++---- llvm/test/CodeGen/PowerPC/stack-guard-reassign.ll | 2 +- llvm/test/CodeGen/PowerPC/stack-realign.ll | 12 +- llvm/test/CodeGen/PowerPC/store-combine.ll | 4 +- llvm/test/CodeGen/PowerPC/sub-of-not.ll | 12 +- llvm/test/CodeGen/PowerPC/subc.ll | 2 +- llvm/test/CodeGen/PowerPC/subreg-postra.ll | 2 +- .../PowerPC/umulo-128-legalisation-lowering.ll | 4 +- llvm/test/CodeGen/PowerPC/urem-lkk.ll | 10 +- llvm/test/CodeGen/PowerPC/urem-vector-lkk.ll | 208 ++++---- .../PowerPC/use-cr-result-of-dom-icmp-st.ll | 40 +- llvm/test/CodeGen/PowerPC/vec-min-max.ll | 8 +- llvm/test/CodeGen/PowerPC/vsx.ll | 12 +- llvm/test/CodeGen/Thumb2/mve-vmulh.ll | 529 +++++++++++++++++++++ llvm/test/CodeGen/VE/sjlj_except.ll | 4 +- llvm/test/CodeGen/X86/avx-load-store.ll | 10 +- llvm/test/CodeGen/X86/avx2-arith.ll | 6 +- llvm/test/CodeGen/X86/avx2-masked-gather.ll | 2 - llvm/test/CodeGen/X86/avx512-vbroadcasti256.ll | 12 +- llvm/test/CodeGen/X86/combine-pmuldq.ll | 8 +- llvm/test/CodeGen/X86/combine-sdiv.ll | 44 +- llvm/test/CodeGen/X86/combine-udiv.ll | 40 +- llvm/test/CodeGen/X86/fcmp-constant.ll | 3 +- .../CodeGen/X86/insert-into-constant-vector.ll | 48 +- llvm/test/CodeGen/X86/movmsk-cmp.ll | 4 - llvm/test/CodeGen/X86/oddshuffles.ll | 20 +- llvm/test/CodeGen/X86/oddsubvector.ll | 116 ++--- llvm/test/CodeGen/X86/packss.ll | 7 +- llvm/test/CodeGen/X86/pr18014.ll | 9 +- llvm/test/CodeGen/X86/pr45443.ll | 16 +- llvm/test/CodeGen/X86/pshufb-mask-comments.ll | 2 +- llvm/test/CodeGen/X86/ret-mmx.ll | 2 +- llvm/test/CodeGen/X86/sad.ll | 65 +-- llvm/test/CodeGen/X86/srem-seteq-vec-nonsplat.ll | 6 +- .../test/CodeGen/X86/stack-clash-dynamic-alloca.ll | 95 ++-- llvm/test/CodeGen/X86/stack-clash-large.ll | 65 ++- llvm/test/CodeGen/X86/stack-clash-medium.ll | 47 +- llvm/test/CodeGen/X86/vec_set-A.ll | 2 +- llvm/test/CodeGen/X86/vec_shift2.ll | 4 +- llvm/test/CodeGen/X86/vector-fshl-rot-128.ll | 37 +- llvm/test/CodeGen/X86/vector-fshl-rot-256.ll | 27 +- llvm/test/CodeGen/X86/vector-fshl-rot-512.ll | 200 ++++---- llvm/test/CodeGen/X86/vector-fshr-rot-128.ll | 37 +- llvm/test/CodeGen/X86/vector-fshr-rot-256.ll | 7 +- llvm/test/CodeGen/X86/vector-fshr-rot-512.ll | 188 ++++---- llvm/test/CodeGen/X86/vector-lzcnt-128.ll | 12 +- llvm/test/CodeGen/X86/vector-narrow-binop.ll | 9 +- llvm/test/CodeGen/X86/vector-rotate-256.ll | 20 +- llvm/test/CodeGen/X86/vector-shift-ashr-256.ll | 12 +- llvm/test/CodeGen/X86/vector-shift-lshr-256.ll | 12 +- llvm/test/CodeGen/X86/vector-shift-shl-256.ll | 5 +- llvm/test/CodeGen/X86/vector-shuffle-256-v16.ll | 3 +- llvm/test/CodeGen/X86/vector-shuffle-256-v32.ll | 16 +- llvm/test/CodeGen/X86/vector-shuffle-256-v8.ll | 10 +- llvm/test/CodeGen/X86/vector-shuffle-512-v32.ll | 10 +- llvm/test/CodeGen/X86/vector-shuffle-512-v64.ll | 10 +- llvm/test/CodeGen/X86/vector-shuffle-512-v8.ll | 10 +- .../X86/vector-shuffle-combining-avx512f.ll | 10 +- .../CodeGen/X86/vector-shuffle-combining-xop.ll | 29 +- llvm/test/CodeGen/X86/vector-shuffle-v1.ll | 12 +- llvm/test/CodeGen/X86/vector-tzcnt-128.ll | 24 +- llvm/test/MC/ARM/dwarf-asm-multiple-sections.s | 4 +- .../MC/Disassembler/PowerPC/ppc64-encoding-ext.txt | 16 +- .../Disassembler/PowerPC/ppc64-encoding-p8htm.txt | 8 +- .../MC/Disassembler/PowerPC/ppc64-encoding.txt | 12 +- .../MC/Disassembler/PowerPC/ppc64le-encoding.txt | 12 +- llvm/test/MC/MachO/gen-dwarf.s | 20 +- llvm/test/MC/PowerPC/htm.s | 16 +- llvm/test/MC/PowerPC/ppc64-encoding.s | 20 +- llvm/test/MC/PowerPC/ppc64-operands.s | 24 +- llvm/test/Other/new-pm-defaults.ll | 1 - llvm/test/Other/new-pm-thinlto-defaults.ll | 1 - .../Other/new-pm-thinlto-postlink-pgo-defaults.ll | 1 - .../new-pm-thinlto-postlink-samplepgo-defaults.ll | 1 - llvm/test/Other/opt-O2-pipeline.ll | 1 - llvm/test/Other/opt-O3-pipeline.ll | 1 - llvm/test/Other/opt-Os-pipeline.ll | 1 - llvm/test/Transforms/InstCombine/fptrunc.ll | 5 +- llvm/test/Transforms/LoopVectorize/X86/optsize.ll | 60 ++- .../LoopVectorize/float-minmax-instruction-flag.ll | 21 +- .../Transforms/LoopVectorize/memdep-fold-tail.ll | 108 +++++ llvm/test/Transforms/PhaseOrdering/X86/addsub.ll | 35 +- llvm/unittests/IR/PatternMatch.cpp | 51 +- mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td | 1 + mlir/include/mlir/TableGen/OpClass.h | 5 - mlir/lib/TableGen/OpClass.cpp | 10 +- mlir/test/Dialect/LLVMIR/roundtrip.mlir | 3 + mlir/test/Target/llvmir-intrinsics.mlir | 9 + mlir/test/mlir-tblgen/op-decl.td | 30 +- mlir/test/mlir-tblgen/op-operand.td | 2 +- mlir/tools/mlir-tblgen/OpDefinitionsGen.cpp | 103 ++-- openmp/runtime/src/kmp_tasking.cpp | 14 +- 213 files changed, 2897 insertions(+), 1790 deletions(-) create mode 100644 clang-tools-extra/test/clang-tidy/checkers/modernize-use-noexce [...] copy lldb/{packages/Python/lldbsuite/test/tools/lldb-server/registers-target-xml-r [...] create mode 100644 lldb/test/API/functionalities/pointer_num_children/TestPointerN [...] create mode 100644 lldb/test/API/functionalities/pointer_num_children/main.cpp create mode 100644 llvm/test/CodeGen/Thumb2/mve-vmulh.ll create mode 100644 llvm/test/Transforms/LoopVectorize/memdep-fold-tail.ll