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unknown user pushed a change to branch rsandifo/sve-rebase in repository gcc.

discards 96e7faec157 Work around PR81082 discards ce4d3a1c69f Use conditional internal functions in if-conversion discards 195a2a16623 Implement SLP of internal functions discards 4fe4176de7f Handle vector boolean types when calculating the SLP unroll factor discards c943767c898 Remove unnecessary temporary in tree-if-conv.c discards 9254235cc13 Add early rematerialisation pass discards a23233abbcc Record equivalences for spill registers discards 51ce2312028 Support fused multiply-adds in fully-masked reductions discards c90ed45b992 Replace FMA_EXPR with one internal fn per optab discards 6440787fcf5 Use single-iteration epilogues when peeling for gaps discards 532a300593a Allow single-element interleaving for non-power-of-2 strides discards 6e6b6bc0283 Add support for first-faulting loads discards d78fa956c61 Add support for speculative loads discards 3f3d8332593 Support for aliasing with variable strides discards 47d0984b2b6 Fix for big field stores discards 405ab23d70f Avoid pessimistic check for overlapping groups discards 9416b768bbf Add support for gather loads and scatter stores discards 62de2596606 Add support for FADDA discards 14843463c9e Add support for CLASTB discards 42db1a5f024 Add support for BRKA and LASTB discards fe6fab1bdd9 Allow capped vectorisation factors discards 16cd7a3d1a7 Reuse results of vect_create_addr_base_for_vector_ref discards 7e41671413b Add an empty_mask_is_expensive hook discards 8d9f5e4bb2a Predicated arithmetic folds discards 62f509653fc Predicated comparison folds discards 1eb1cde8a0a Allow combine to reorder statements discards a86dcde0561 Rework the legitimize_address_displacement hook discards 53263bd12cd Improve ivopts handling of offset multiples discards 87095a6744a Handle peeling for alignment with masking discards 6ed6c645532 Allow the number of iterations to be smaller than VF discards c4d02a7badc Make ivopts handle calls to internal functions discards ca30999c64f Improve VIEW_CONVERT_EXPR for vector booleans discards 107e3beb34a Add support for fully-predicated loops discards c7c7804ac55 Protect against min_profitable_iters going negative discards bbe4bbc78e9 SLP reductions with variable-length vectors discards 1da8b465299 Handle more SLP constant and extern definitions for variable VF discards 4c329a14839 Add optabs for common types of permutation discards 93b337e18de Add support for bitwise reductions discards 1f899bcd842 Add support for masked load/store_lanes discards ee699346ab9 [AArch64] SVE load/store_lanes support discards db3192183b5 Fix folding of vector mask EQ/NE expressions discards e17e2227313 [AArch64] Testsuite markup for SVE discards a1ab9b30c4d [AArch64] Add SVE support discards e591ea3c8e5 Revert DECL_USER_ALIGN patch discards c4c6374cfb2 vect_masked_store discards 0f3a72524ac vect_align_stack_vars discards 09d69ed74a0 vect_variable_length discards 9375c478085 target_vect_unaligned_possible discards b4f725bbf4c vect_element_align_preferred discards 806ca66f516 vect_permN discards 169976830d8 available_vector_sizes discards 5a2e932d747 Add VECTOR_BITS to tree-vect.h discards 34f03bb26a1 Use asm volatile ("" ::: "memory") discards 32d843167ac Use extract_bit_field_as_subreg for vectors discards 6ce7bea161f Improve spilling for variable-width slots discards ce6115c6016 Improve canonicalisation of TARGET_MEM_REFs discards 87a91d19c73 Improve ivopts handling of forced scales discards aa9e781f245 Improve vector mask pattern handling discards cb23527ce6e [AArch64] Generate permute patterns using rtx builders discards 1e41dc8d986 [AArch64] Rewrite aarch64_simd_valid_immediate discards 79a5bd4a9d8 [AArch64] Add const_offset field to aarch64_address_info discards 6511778d584 [AArch64] Rename the internal "Upl" constraint discards e4e4450d982 [AArch64] Set NUM_POLY_INT_COEFFS to 2 discards de6271b7c9b [AArch64] Add an endian_lane_rtx helper routine discards d60611da46f [AArch64] Rework interface to add constant/offset routines discards acfea446539 [AArch64] Move code around discards 21d99838837 Allow the target to set MAX_BITSIZE_MODE_ANY_MODE discards bd50b9cf511 Add support for adjusting the number of units in a mode discards cbe73b61940 Add support for MODE_VECTOR_BOOL discards 06871093956 tree-data-ref.c evolution_function_right_is_integer_cst discards 5d8102f7653 Use poly_int tree accessors instead of hwi accessors discards 56b355e961b Use poly_int rtx accessors instead of hwi accessors discards ddacc421f67 Test failures discards e9aec8fec8f poly_int: GET_MODE_SIZE discards 04875de91c0 poly_int: GET_MODE_BITSIZE discards daf3f413301 poly_int: expand_assignment discards cc71e247448 poly_int: GET_MODE_PRECISION discards a122452c5d5 poly_int: TYPE_VECTOR_SUBPARTS discards 17f7ba37a96 poly_int: vect_permute_load/store_chain discards 931cb58c9d8 poly_int: GET_MODE_NUNITS discards 3c44e53b658 poly_int: memrefs_conflict_p discards 5527c074b15 poly_int: struct_value_size discards ee39b4ca0b3 poly_int: load_register_parameters discards f52e7eaaf2e poly_int: alter_reg discards 62ca3b4378c poly_int: reloading complex subregs discards b0772d56387 poly_int: process_alt_operands discards 186fcf92718 poly_int: expand_ifn_atomic_compare_exchange_into_call discards f6c528c45c4 poly_int: adjust_mems discards f87462f0d19 poly_int: PUSH_ROUNDING discards 8babb864f9b poly_int: emit_single_push_insn_1 discards 98f3d2ca2ca poly_int: set_inc_state discards 3e4bb9df4af poly_int: expand_expr_real_1 discards efb4bc8f9e4 poly_int: expand_expr_real_2 discards 59e5da67686 poly_int: subreg_get_info discards ecd4a1404c7 poly_int: REGMODE_NATURAL_SIZE discards 2880adb66d3 poly_int: expand_vector_ubsan_overflow discards 5f1522c391f poly_int: folding BIT_FIELD_REFs on vectors discards 0896975ed27 poly_int: fold_indirect_ref_1 discards 994b4adfc16 poly_int: omp-simd-clone.c discards b21b89c55a3 poly_int: brig vector elements discards a733433f082 poly_int: tree-vect-generic.c discards 1608e93aa27 poly_int: vect_no_alias_p discards a4ccd86317e poly_int: two-operation SLP discards 4f01c176a59 poly_int: vect_get_constant_vectors discards bfd06b2b9eb poly_int: vectorizable_conversion discards ec5767266eb poly_int: vectorizable_simd_clone_call discards e8434e11c60 poly_int: vectorizable_call discards 7b7e5cbe4fb poly_int: vectorizable_load/store discards 1415ce981a0 poly_int: vectorizable_live_operation discards 43258e62a75 poly_int: vectorizable_induction discards b86e87a84b0 poly_int: vectorizable_reduction discards a3fe53ea0a1 poly_int: vector_alignment_reachable_p discards 89d56167c94 poly_int: current_vector_size and TARGET_AUTOVECTORIZE_VECT [...] discards 756e5583aab poly_int: get_mask_mode discards cb38198dada poly_int: omp_max_vf discards 4469459b8b3 poly_int: vect_nunits_for_cost discards 54a183292aa poly_int: SLP max_units discards b89bf24af0d poly_int: vectoriser vf and uf discards 1185cbf515e poly_int: prune_runtime_alias_test_list discards e8ed693e4d1 poly_int: compute_data_ref_alignment discards a50c61cf02a poly_int: loop versioning threshold discards 1f55408f3f1 poly_int: tree-ssa-loop-ivopts.c:iv_use discards 223849e484a poly_int: get_binfo_at_offset discards 10e9ca081ba poly_int: build_ref_for_offset discards 158d3797694 poly_int: MEM_REF offsets discards accebb9c6fe poly_int: find_bswap_or_nop_load discards 461475f9458 poly_int: adjust_ptr_info_misalignment discards 3bc1a706d12 poly_int: decode_addr_const discards fcb57b5f283 poly_int: bit_field_size/offset discards f317544c107 poly_int: emit_group_load/store discards 4ffa52247dc poly_int: reload<->ira interface discards f0790364a49 poly_int: emit_inc discards 8f940315c65 poly_int: cfgexpand stack variables discards 610b8dc84ee poly_int: argument sizes discards 49a83859ff0 poly_int: instantiate_virtual_regs discards 2303c52ab38 poly_int: REG_ARGS_SIZE discards 607a967c52b poly_int: push_block/emit_push_insn discards 728bed904aa poly_int: frame allocations discards b4a6db88cbb poly_int: reload1.c discards 29c8befa2f8 poly_int: reload.c discards f4a7a19bc44 poly_int: get_inner_reference & co. discards b7c17da7463 poly_int: pass_store_merging::execute discards 235b642b13c poly_int: fold_comparison discards 945f4e83b9d poly_int: get_bit_range discards dd9a67256b7 poly_int: get_object_alignment_2 discards d6a9497c4b5 poly_int: expand_debug_expr discards 186ecbf2a97 poly_int: get_inner_reference_aff discards 535433e0867 poly_int: pointer_may_wrap_p discards c1dc496b010 poly_int: symbolic_number discards bfc6648899c poly_int: aff_tree discards ceeed4e935b poly_int: get_addr_unit_base_and_extent discards ddb97fcadb4 poly_int: get_ref_base_and_extent discards 31b0289b3ae poly_int: ipa_parm_adjustment discards 9699312b411 poly_int: DWARF CFA offsets discards bee1da75709 poly_int: operand_subword discards a49bbf892b6 poly_int: SUBREG_BYTE discards 6fc732f3fee poly_int: ira subreg liveness tracking discards 0bfc67ea976 poly_int: store_field & co discards af2f46ad73b poly_int: C++ bitfield regions discards 776ec1cbc7d poly_int: extract_bit_field bitrange discards bb0c5641edf poly_int: store_bit_field bitrange discards 472a9ee0697 poly_int: lra frame offsets discards b6452d60a9a poly_int: MEM_OFFSET and MEM_SIZE discards 6cfee022579 poly_int: rtx_addr_can_trap_p_1 discards 83571072223 poly_int: dse.c discards fa7e1c65c28 poly_int: ao_ref and vn_reference_op_t discards 00adf7cd86f poly_int: indirect_refs_may_alias_p discards d8b25a4064b poly_int: same_addr_size_stores_p discards 4b6dbf38c1d poly_int: fold_ctor_reference discards df8b5324c30 poly_int: DWARF locations discards 178eec67977 poly_int: REG_OFFSET discards b85dcec95f2 poly_int: TRULY_NOOP_TRUNCATION discards dac7656618d poly_int: create_integer_operand discards c9dde2fc70b poly_int: dump routines discards 5b0980b3e56 poly_int: tree constants discards d3099bda091 poly_int: rtx constants discards 4fb0f49bda6 poly_int: mode query functions discards 3f9ce3d05e0 poly_int: MACRO_MODE discards dda149a6f1c poly_int: IN_TARGET_CODE discards f5409aaf9cd poly_int: add poly-int.h discards 49fd41c13eb Make dse.c use offset/width instead of start/end discards 3dba55f8106 Minor vn_reference_lookup_3 tweak discards f8663845633 Make tree-ssa-dse.c:normalize_ref return a bool discards b5ac48a0bc3 Don't treat zero-sized ranges as overlapping discards 0cd3ec5a7bf Use (CONST_VECTOR|GET_MODE)_NUNITS in simplify-rtx.c discards b402df8a72b Turn var-tracking.c:INT_MEM_OFFSET into a function discards 5ac744f537a Factor out the mode handling in lower-subreg.c discards e15a63e53ac Use more specific hash functions in rtlhash.c discards f2a0ad23b61 Add helpers for shift count modes discards 9edafcd56fd More is_a <scalar_int_mode> discards b11b631e1fc Add an is_narrower_int_mode helper function discards c4e56cf96d7 Add narrower_subreg_mode helper function discards 04131f1c40f Widening optab cleanup discards b429c1a6542 Add a fixed_size_mode_pod class discards 325c3daf1ba Add a fixed_size_mode class discards e338c545338 Add unique CONSTs discards 26f5d88a50d Add VEC_SERIES_{CST,EXPR} and associated optab discards 7ad9ee32a3e Add VEC_DUPLICATE_{CST,EXPR} and associated optab discards 878296c56e3 Add a VEC_SERIES rtl code discards 248cc367a87 Allow vector CONSTs discards 5df550bfd8d Add more vec_duplicate simplifications discards d0535f0b9b7 Add gen_(const_)vec_duplicate helpers discards ee20ae06377 SUBREG_PROMOTED_VAR_P handling in expand_direct_optab_fn discards 902ad3e6b07 match.pd handling of three-constant bitops discards d0addd0448e Prevent invalid register mode changes in combine discards a58c83e3042 Base subreg rules on REGMODE_NATURAL_SIZE rather than UNITS [...] discards 49598190bac :: AArch64 scalar_float_mode discards 286f6460448 Make more use of GET_MODE_UNIT_PRECISION discards 8d12e4428f5 Make more use of GET_MODE_UNIT_BITSIZE discards fb2c5658418 Make more use of GET_MODE_UNIT_SIZE discards b4f4490bd8a Add wider_subreg_mode helper functions discards 1b13f364248 Make more use of byte_lowpart_offset discards c488e2f0c70 Make more use of subreg_size_lowpart_offset discards 2df68a99878 Make more use of subreg_lowpart_offset discards d1cc7bb761c Make more use of df_read_modify_subreg_p discards 5c775590f50 Make more use of HWI_COMPUTABLE_MODE_P discards 6ce0eb7b0da [AArch64] Tweak aarch64_classify_address interface discards 65b7be70752 Document machine_mode wrapper classes discards fc83d38fc1f :: wide-int.h speed-up discards de14a1d978a Use SCALAR_TYPE_MODE in vect_create_epilog_for_reduction discards 3cfcb7ab521 Use SCALAR_INT_TYPE_MODE in loc_list_from_tree_1 discards 01a78f6dd02 Use scalar_int/float_mode in brig_langhook_type_for_mode discards 771f86cbeb7 Use scalar_mode in expand_shift_1 discards f1fd878c5f0 Fix HWI + -unsigned in combine.c discards 44d72487e44 Stop print_hex from printing bits above the precision discards 35df0e4d3ac Convert STARTING_FRAME_OFFSET to a hook discards bdcce47d053 Add an alternative vector loop iv mechanism discards 0a2d6d11bef Add wide_int version of inchash::hash::add_wide_int discards 83a12e8e726 Rename inchash::hash::add_wide_int discards d981c2d19cc TARGET_STATIC_RTX_ALIGNMENT adds 41aff804ed6 Make more use of subreg_lowpart_offset adds c04949fe17d Make more use of byte_lowpart_offset adds 466a35ffa2b Make more use of GET_MODE_UNIT_SIZE adds 332d11bd6d1 Make more use of GET_MODE_UNIT_BITSIZE adds 0e87eeb6ed1 Prevent invalid register mode changes in combine adds 0e8298de0c1 i386: Check red zone size in push peephole2 adds 7b9e61ea203 2017-10-13 Richard Biener rguenther@suse.de adds 56b5cbc8797 2017-10-13 Richard Biener rguenther@suse.de adds 5a91fdd273f 2017-10-13 Richard Biener rguenther@suse.de adds ea46cddb581 [PATCH] Tree structure marking adds fe235c3e738 PR libstdc++/82481 Suppress clang-tidy warnings adds 32973e22775 PR libstdc++/82522 overload map insert functions for rvalue [...] adds c7cae1379b8 C++: show location of unclosed extern "C" specifications adds 9705c1f3b5a * cfghooks.c (verify_flow_info): Check that edge probabili [...] adds 12f7900694b * lto-lang.c (lto_post_options): Clean shlib flag when not [...] adds 6090ba68959 2017-10-13 Mike Frysinger vapier@chromium.org adds 01cabe21e4e * config/rs6000/rs6000.c (rs6000_builtin_vectorization_cos [...] adds eb1539dad0a 2017-10-13 Paolo Carlini paolo.carlini@oracle.com adds 4bed1b09c24 PR target/82274 * internal-fn.c (expand_mul_overflow): If [...] adds 7f4b71c93e3 2017-10-13 Paolo Carlini paolo.carlini@oracle.com adds 89954a3b1cc 2017-10-13 Paul Thomas pault@gcc.gnu.org adds 621490eef34 PR c++/82357 - bit-field in template adds 04acc76e9d4 * tree-ssa-reassoc.c (reassociate_bb): Clarify code slighly. adds e5f990e666d * cfghooks.c (verify_flow_info): Disable check that all pr [...] adds a78fcdf9bf9 * c-gimplify.c (c_gimplify_expr): Handle [LR]ROTATE_EXPR l [...] adds 514977b1554 PR sanitizer/82353 * g++.dg/ubsan/pr82353-2.C: New test. [...] adds 0c132a9c47e Daily bump. adds 99efc84b9a5 [gcc] * config/rl78/rl78.c (rl78_emit_libcall): New functi [...] adds 365a02e7a62 PR rtl-optimization/81423 * gcc.c-torture/execute/pr81423 [...] adds 71ee1c2d185 * target-insns.def: Add memory_blockage. * optabs.c (expa [...] adds d60abe9d1b4 * config/i386/sync.md (FILD_ATOMIC/FIST_ATOMIC FP load pee [...] adds ceaf6aa15a4 * optabs.c (expand_memory_blockage): Use targetm.gen_memor [...] adds 74edde2f97d PR bootstrap/82548 * config.gcc (*-*-solaris2*, i[34567]8 [...] adds 1fd4bc16aba 2017-10-14 Bob Duff duff@adacore.com adds fe30f55d8cc 2017-10-14 Patrick Bernardi bernardi@adacore.com adds 404eb7dac09 2017-10-14 Ed Schonberg schonberg@adacore.com adds 1ba78e2c934 2017-10-14 Eric Botcazou ebotcazou@adacore.com adds 0f1cfefb01e gcc/ada/ adds 0bc087fa0e5 PR bootstrap/82553 * optabs.c (expand_memory_blockage): F [...] adds 9317336c706 PR middle-end/62263 PR middle-end/82498 * tree-ssa-forwp [...] adds ae163345e41 PR middle-end/62263 PR middle-end/82498 * tree-ssa-phiop [...] adds bd0fbf30f44 2017-10-14 Paolo Carlini paolo.carlini@oracle.com adds ef0dc912cee 2017-10-14 Paolo Carlini paolo.carlini@oracle.com adds 1ba23db3e5d 2017-10-14 Kyrylo Tkachov kyrylo.tkachov@arm.com M [...] adds 5d09c88ce0a Daily bump. adds 067517fea79 2017-10-15 Thomas Koenig tkoenig@gcc.gnu.org adds 803be1fa859 * i386.c (ix86_rtx_costs): Make difference between x87 and [...] adds a898f18f3d8 * i386.c (ix86_vec_cost): New function. (ix86_rtx_costs): [...] adds 932324f67d2 2017-10-15 Paolo Carlini paolo.carlini@oracle.com adds a8474357dbc Daily bump. adds deb9583aa1c 2017-10-16 François Dumont fdumont@gcc.gnu.org adds 042c84a1cdd 2017-10-16 Paolo Carlini paolo.carlini@oracle.com adds de44fcf0124 PR c++/53574 * g++.dg/other/pr53574.C: New test. adds bf25f422729 Enable libgomp.oacc-*/declare-*.{c,f90} for non-nvidia devices adds c8509eb77db 2017-10-16 Tamar Christina tamar.christina@arm.com adds 4ad3467cd90 2017-10-16 Tamar Christina tamar.christina@arm.com adds 2fdc62cddd0 2017-10-16 Tamar Christina tamar.christina@arm.com adds cfdba70a5e5 2017-10-16 Tamar Christina tamar.christina@arm.com adds 4ee97fcf5e1 2017-10-16 Tamar Christina tamar.christina@arm.com adds a68b004942f Add selftests for bitmap_set_range. adds 4d4f9cc4249 Fix PR82442 adds 7543881235d [ARM] Allow +nodsp for -mcpu=cortex-m33 adds cc3711e9ba5 2017-10-16 Paolo Carlini paolo.carlini@oracle.com adds 519d8107714 2017-10-16 Olivier Hainque hainque@adacore.com adds c12f96b0985 * x86-tune-costs.h (znver1_cost): Fix move cost tables. adds edaf95de386 2017-10-16 Fritz Reese fritzoreese@gmail.com adds 27bc48e41b3 * tree-ssa-dse.c (live_bytes_read): Fix thinko. adds fd54803250b Fix attrib-5.c test-case. adds d106f8f5a72 2017-10-16 Vladimir Makarov vmakarov@redhat.com adds b6b04a7be4a Add gnu::unique_ptr adds bba981e9bd0 ChangeLog: adds 33736138044 Daily bump. adds 4491b485117 Add missing REDUCE[SD,SS] intrinsics adds d6296cb9ba6 Improve FAIL message for dump-*-times functions. adds 426c9f76207 PR tree-optimization/82549 * fold-const.c (optimize_bit_f [...] adds 40d9342e17e 2017-10-17 Paolo Carlini paolo.carlini@oracle.com adds 8fddd28f340 2017-10-17 Paolo Carlini paolo.carlini@oracle.com adds 7bc57773107 Restore "dg-do run" directives for libgomp.oacc-fortran/dec [...] adds cae40f4a086 2017-10-17 Richard Biener rguenther@suse.de adds 44e2f332811 2017-10-17 Richard Biener rguenther@suse.de adds 1ea647f3666 Factor out division by squares and remove division around c [...] adds 4a052765c89 2017-10-17 Richard Biener rguenther@suse.de adds 77e843a0b74 gcc/ChangeLog adds 480400843e4 gcc/ChangeLog adds 6273fc17959 [PATCH PR/82546] tree node size adds 9e9cc1a9a4a [PATCH, middle-end/82577] Fix DECL_ASSEMBLER_NAME ICE adds 8d47c1c56c9 [C++ PATCH 82560] missing dtor call adds 29603219fd9 * reg-stack.c (compare_for_stack_reg): Add bool argument. [...] adds 72e995da9b1 * target.h (enum vect_cost_for_stmt): Add vec_gather_load [...] adds b4c97b88241 * i386/i386.c (x86_builtin_vectorization_cost): Likewise. adds 5f531f13a21 Add gcc_checking_assert for sbitmap.c. adds e4ef7d73d8a 2017-10-17 Paolo Carlini paolo.carlini@oracle.com adds 3a010afa0b6 Simplify format_warning_at_substring API adds bd014deccb5 2017-10-17 Paolo Carlini paolo.carlini@oracle.com adds 1bc58db402e * langhooks.h (struct lang_hooks): Document that tree_size [...] adds e445b8b3cf3 * config/visium/visium.c (visium_select_cc_mode): Return C [...] adds 2b8cad9ec5d * gcc.dg/attr-alloc_size-11.c: UnXFAIL for visium-*-*. adds 803df0f8806 * tree-ssa-loop-ivopts.c (add_autoinc_candidates): Bail ou [...] adds 21c641e030e Daily bump. adds 8fb81076d63 2017-10-18 Paolo Carlini paolo.carlini@oracle.com adds 03d2ca10c0b Update -ffunction/data-sections documentation adds ff865241310 2017-10-18 Paolo Carlini paolo.carlini@oracle.com adds baccadd290c 2017-10-18 Paolo Carlini paolo.carlini@oracle.com adds dad472c2b39 Do not put gimple stmt on an abnormal edge (PR sanitizer/82545). adds a213029db72 S/390: Fix vec-cmp-2 testcase adds 6e2a63803cd 2017-10-18 Richard Biener rguenther@suse.de adds 1650ce2f96a 2017-10-18 Paul Thomas pault@gcc.gnu.org adds 9f3ec18134d S/390: Handle long-running instructions. adds b30411736b4 S/390: Do not end groups after fallthru edge. adds becd73a954f PR lto/82598 * simple-object.c (handle_lto_debug_sections [...] adds 44ded5cf927 * gcc-interface/misc.c (gnat_tree_size): Move around. adds 598fbaeabd3 Fix -Wimplicit-fallthrough in combine.c adds fbd46ff2f2b Fix failing test-case adds cbd0be31163 2017-10-18 Richard Biener rguenther@suse.de adds 27fb5184b33 2017-10-18 Richard Biener rguenther@suse.de adds b363c31bef5 PR tree-optimization/82574 * tree-loop-distribution.c (fi [...] adds 05ebeee62f3 * tree-loop-distribution.c (INCLUDE_ALGORITHM): New header [...] adds b8b2688e0c5 2017-10-18 Vladimir Makarov vmakarov@redhat.com adds 254c3b8901b 2017-10-18 Thomas Koenig tkoenig@gcc.gnu.org adds 0d87e1c4f0a * wide-int.cc (debug) [const wide_int &]: New. (debug) [c [...] adds 1a06f00aab2 PR target/82580 * config/i386/i386-modes.def (CCGZ): New [...] adds 6042ea5969b 2017-10-18 Thomas Koenig tkoenig@gcc.gnu.org adds a68e4728116 ira: volatile asm's are not moveable (PR82602) adds 1f34d027938 2017-10-18 Thomas Koenig tkoenig@gcc.gnu.org adds 2050daab2a9 Daily bump. adds 0506f36619a Use Levenshtein spelling suggestions in Fortran FE adds 7ff401d1513 PR fortran/82568 * gfortran.h (gfc_resolve_do_iterator): [...] adds b02d9b500bf Do not instrument use-after-scope for vars with large align [...] adds 94ffdc6a53b Update my last ChangeLog entry to properly specify overload [...] adds eba0fb90361 Derive interface buffers from max name length adds f95dcbcdc5c Add dg-require-stack-size adds aa124e7813e Specify required stack size for gcc.dg/tree-ssa/ldist-27.c adds 5a8b9f6b736 PR target/82580 * config/i386/i386.md (setcc + movzbl to [...] adds 9d4d1f0e0f3 rs6000: Fix "missing mode" on UNSPEC_TOCSLOT adds e219490fe73 Revert r238089 (PR driver/81829). adds 36093749ff9 * ubsan.c (ubsan_expand_null_ifn): Use _v1 suffixed type m [...] adds 21104a1367a * flag-types.h (enum sanitize_code): Add SANITIZE_BUILTIN. [...] adds f59996b56aa [ARM] PR 82445 - suppress 32-bit aligned ldrd/strd peepholi [...] adds e9f534b79d3 PR debug/82509 * dwarf2out.c (new_die_raw): New static in [...] adds 5015ddbc67f Use __LONG_LONG_MAX__ instead of LONG_LONG_MAX in test adds e4de45415f5 Update references to C++17 in libstdc++ manual adds 13889cf4b78 Fix path::iterator post-increment and post-decrement adds bff9f879c48 Improve tests for error reporting in Filesystem TS adds e6e9878940f PR c++/82600 * typeck.c (check_return_expr): Don't call [...] adds 2b34677fbeb * asan.c (handle_builtin_alloca): Deal with all alloca var [...] adds 790b6154148 PR tree-optimization/82596 - missing -Warray-bounds on an o [...] adds 25a4537eaf3 * config/i386/i386.c (output_387_binary_op): Rewrite SSE p [...] adds da706df9a23 ira-color: fix allocno_priority_compare_func for qsort (PR 82395) adds 96a5ba32787 PR target/82618 * config/i386/i386.md (sub to cmp): New p [...] adds 5a0b6a31e33 Fix oversights adds ea5d398198b * asan.c (create_cond_insert_point): Do not update edge co [...] adds 82bc763f70d * x86-tune-costs.h (generic_cost, core_cost): Correct cost [...] adds 1b786bb267c PR82575, lto debugobj references __gnu_lto_slim, ld test li [...] adds 1484ace77a3 2017-10-19 Bob Duff duff@adacore.com adds aa68e24f5f4 2017-10-19 Bob Duff duff@adacore.com adds 8ccb1b3f48f Daily bump. adds 27930829630 2017-10-19 Paolo Carlini paolo.carlini@oracle.com adds 427480bef0c * config/msp430/msp430.c (msp430_option_override): Disable [...] adds 213ed75d4c3 Add GFNI command line options and macros adds d1f2fa7df9b PR target/82370 * config/i386/sse.md (*andnot<mode>3, <m [...] adds 4bdf09dc2e9 PR target/82370 * config/i386/sse.md (VI248_AVX2, VI248_A [...] adds 012c8dd652a PR sanitizer/82595 * config/gnu-user.h (LIBTSAN_EARLY_SPE [...] adds 4926e42d2aa PR target/82158 * tree-cfg.c (pass_warn_function_return:: [...] adds 7a43a9bc81c * configure.ac (ACX_PROG_GNAT): Append "libgnat" to the in [...] adds 82aaba1643b Reduce stack size in gcc.dg/tree-ssa/ldist-27.c adds 64eed8b331e 2017-10-20 Richard Biener rguenther@suse.de adds 6784dab5acf 2017-10-20 Richard Biener rguenther@suse.de adds c4d42df2a3a * x86-tune-costs.h (core_cost): Fix div, move and sqrt latencies. adds 3ebb1bac73f [arm] Fix architecture selection when building libatomic wi [...] adds 3c0f15b4ceb Add generic part for Intel CET enabling. The spec is available at adds c6c093ed77f 2017-10-20 Richard Biener rguenther@suse.de adds d2de46d402c Add documentation for fcf-protection option and nocf_check [...] adds 9b8698ff04b * config/i386/i386.md (isa): Remove fma_avx512f. * config [...] adds cd1a4900634 2017-10-20 Bob Duff duff@adacore.com adds 036f37e5160 gcc/ada/ adds c80715e761e gcc/ada/ adds b50e3690fbc Add ChangeLog entries, missing from last commit adds d44341d9952 2017-10-20 Bob Duff duff@adacore.com adds 22a8377023d gcc/ada/ adds 4f0935fa35d Add tests for -fcf-protection option and nocf_check attribute. adds 65853df1124 Define __cpp_lib_byte feature-test macro adds 9f23bd8e3d9 [C++ PATCH] AS_BASETYPE adds 41bce6cb4e8 debug/dwarf: support 64-bit DWARF in byte order check adds 81e57cf0440 * x86-tune-costs.h (intel_cost, generic_cost): Fix move costs. adds 24d0bb5253b Update value of __cpp_lib_chrono feature-test macro adds fe930ba26b1 Daily bump. adds 8294ad22f20 Fix invalid path::iterator test adds 8bcdb05bc7d Fix wording adds 1148eb54e76 2017-10-21 Paul Thomas pault@gcc.gnu.org adds 236b0552f8f * gcc-interface/utils.c (pad_type_hash): Use hashval_t for [...] adds 9000a7221ab Fix typos adds 6646a9755db * gcc-interface/Makefile.in: Remove bogus settings for VxWorks. adds a842dd5493b * gcc.target/i386/pr79683.c: Disable costmodel. * i386.c [...] adds 92ac8192dd3 Update x86 backend to enable Intel CET. adds e2dea65c0ec Add x86 CET documentation. adds 9091ccd2b74 Add x86 tests for Intel CET implementation. adds 2aed2929f96 Daily bump. adds e4d85e25e79 Move 2 tests from c-c++-common/ to gcc.target/i386/ directory. adds 7c43ee1e671 PR target/82628 * config/i386/i386.md (cmp<dwi>_doublewor [...] adds 3783eb0984e PR target/52451 * config/i386/i386.c (ix86_fp_compare_mod [...] adds eadcd69cf2e Rename inchash::hash::add_wide_int adds ca6b9aedab1 Add wide_int version of inchash::hash::add_wide_int adds 18355707133 Make more use of subreg_size_lowpart_offset adds b8510cb1177 Make more use of HWI_COMPUTABLE_MODE_P adds 1048c155886 Make more use of GET_MODE_UNIT_PRECISION adds 4a421b80833 SUBREG_PROMOTED_VAR_P handling in expand_direct_optab_fn adds 332404586ce * i386.c (ix86_builtin_vectorization_cost): Use existing r [...] adds ee3a0978a5b Daily bump. adds 30a86effd19 Fix HWI + -unsigned in combine.c adds ad1a05cccdf 2017-10-23 Richard Biener rguenther@suse.de adds 6ce33017aab Use scalar_mode in expand_shift_1 adds 28018118a94 Use scalar_int/float_mode in brig_langhook_type_for_mode adds 1fcff97183e Use SCALAR_INT_TYPE_MODE in loc_list_from_tree_1 adds 98a46e07665 Use SCALAR_TYPE_MODE in vect_create_epilog_for_reduction adds 8374586c166 Convert STARTING_FRAME_OFFSET to a hook adds ea3b0bfac3f PR libstdc++/82644 document IS 29124 support adds 79bc16204ae 2017-10-23 Richard Biener rguenther@suse.de adds f0631008f52 2017-10-23 Paolo Carlini paolo.carlini@oracle.com adds f66b5a83138 2017-10-23 Richard Biener rguenther@suse.de adds 3b90ed62fb8 Implement C++17 Filesystem library adds d0b2bcaa092 2017-10-23 Richard Biener rguenther@suse.de adds c61ffa853d7 * common.opt (gcolumn-info): Enable by default. * doc/inv [...] adds e3f64b6a6c1 PR target/82628 * config/i386/predicates.md (x86_64_dwzex [...] adds d2d928cf6a3 * i386.c (dimode_scalar_chain::compute_convert_gain): Use [...] adds a7061c2b267 i386: Skip DF_REF_INSN if DF_REF_INSN_INFO is false adds 0f6374027d3 PR c/82681 * c-warn.c (warnings_for_convert_and_check): F [...] adds 03c18606d76 Forgot to add the new file :-P 2017-10-13 Sebastian Perta [...] adds 020b1a05158 * config/rl78/rl78.md: New define_expand "subdi3". * config [...] adds 101a11b4b33 PR target/82662 * gcc.target/i386/pr82662.c: New test. adds 0c3d6318825 * g++.dg/opt/pr82577: Fix for C++17. adds e176a9459c1 PR c++/77369 - wrong noexcept handling in C++14 and below adds 95f39a983a5 Add INCLUDE_UNIQUE_PTR and use it (PR bootstrap/82610) adds c68c23aba22 PR debug/82630 * target.def (const_not_ok_for_debug_p): D [...] adds 6940f1f12db /cp 2017-10-23 Paolo Carlini paolo.carlini@oracle.com adds 80674d02574 Daily bump. adds 9337b1d120c 2017-10-23 Sandra Loosemore sandra@codesourcery.com adds 8c4f9b73b84 2017-10-23 Sandra Loosemore sandra@codesourcery.com adds 3fc71dd4b39 2017-10-23 Sandra Loosemore sandra@codesourcery.com adds 3bee0a4794c 2017-10-23 Sandra Loosemore sandra@codesourcery.com adds 4e66664e723 2017-10-23 Sandra Loosemore sandra@codesourcery.com adds af54c969b93 2017-10-23 Richard Biener rguenther@suse.de adds 31cbcee1c0b PR middle-end/82569 * tree-outof-ssa.h (always_initialize [...] adds 7c5c4b3763e Avoid 512-bit mode MOV for prefer-avx256 option in Intel AV [...] adds 4065f60aebb PR target/82628 * config/i386/i386.md (addcarry<mode>, su [...] adds bf9129e6900 i386: Don't insert ENDBR at function entrance when called directly adds 01a6e9e7771 PR libstdc++/82685 add 'noexcept' to string_view literals adds 51aff68fd32 PR82687, g++.dg/asan/default-options-1.C fails with PR82575 fix adds 7450bb7c1a2 Add bootstrap-cet.mk to bootstrap GCC with Intel CET adds 62fb4a897e3 Refactor std::basic_string_view members and add noexcept adds 394de073f96 Avoid -Wattribute-alias warnings for long double compat symbols adds c042ba6f6ff /cp 2017-10-24 Mukesh Kapoor mukesh.kapoor@oracle.com [...] adds 20496f0e660 2017-10-24 Richard Biener rguenther@suse.de adds d780fbed7d3 Fix gcc.target/i386/cet-sjlj-3.c on Solaris adds 84299d2c811 Fix gcc.target/i386/387-ficom-[12].c on Solaris adds ec873e79242 /cp 2017-10-24 Paolo Carlini paolo.carlini@oracle.com adds d8469e2264e PR60580: Fix frame pointer option magic adds cbde9eb3e5a Cleanup autopref scheduling adds 41ca0095ec3 2017-10-24 Paolo Carlini paolo.carlini@oracle.com adds c5c4c95dbe7 PR target/82370 * config/i386/sse.md (VIMAX_AVX2): Remove [...] adds 3225e6c2ac1 PR target/82460 * config/i386/sse.md (UNSPEC_VPERMI2, UNS [...] adds 551fff57be9 2017-10-24 François Dumont fdumont@gcc.gnu.org adds 41b0de3846b Daily bump. adds 55292e73ae8 PR libstdc++/82706 fix test for case where operations succeed adds 6e5ff5ad009 2017-10-25 Richard Biener rguenther@suse.de adds ac50cb09755 PR libstdc++/81706 * attribs.c (attribute_value_equal): U [...] adds e34ed64cdf8 Fix gcc.target/i386/cet-sjlj-5.c on Solaris adds 1ddd2233adf Fix scan-assembler in tree-ssa/loop-1.c for nvptx adds 39a925e7897 2017-10-25 Paolo Carlini paolo.carlini@oracle.com adds 476ea17a175 2017-10-25 Richard Biener rguenther@suse.de adds 2201c33012d 2017-10-25 Richard Biener rguenther@suse.de adds 5a6a0bf5071 Fix filesystem::path::lexically_normal algorithm adds 730671b58f9 PR libstdc++/79283 fix filesystem::read_symlink for /proc adds 995d32751f0 PR libstdc++/82716 avoid stupid -Wmismatched-tags warnings adds e9572275047 Update C++17 library status documentation adds 3bc5c95c984 match.c (gfc_match_type_is): Fix typo in error message adds 7916ad8f0c3 * i386.c (ix86_builtin_vectorization_cost): Compute scatte [...] adds c6e67a74e09 [C++ PATCH] Label checking cleanups adds dc684a8cd2e [C++ PATCH] Kill IDENTIFIER_LABEL_VALUE adds 523e2700009 PR middle-end/82062 * fold-const.c (operand_equal_for_com [...] adds 808c96e1851 * Makefile.am (check-go-tool): Output colon after ${fl}. [...] adds 9c6517e8b6b RISC-V: Add Sign/Zero extend patterns for PIC loads adds 133bd9b8744 C: detect more missing semicolons (PR c/7356) adds 6fb109ea155 Daily bump. adds a28b36adea4 2017-10-26 Tamar Christina tamar.christina@arm.com adds 9225286571d 2017-10-26 Tamar Christina tamar.christina@arm.com adds 3b8a98f2a13 2017-10-26 Tamar Christina tamar.christina@arm.com adds d335b03247c 2017-10-26 Tamar Christina tamar.christina@arm.com adds ad3b5cfe57c 2017-10-26 Tamar Christina tamar.christina@arm.com adds 1cdbc7190d3 TARGET_STATIC_RTX_ALIGNMENT adds 9bc1196fd21 Use -xbrace_comment=no with recent Solaris/x86 as adds b931302edce [C++ PATCH] Kill IDENTIFIER_LABEL_VALUE adds 36bc3d02e10 [obvious][arm testsuite] Fixup expected location in require [...] adds bf39e18e700 Stop print_hex from printing bits above the precision adds 9f2c0e68ce0 Make more use of df_read_modify_subreg_p adds d8db98b29ca Improve addressing of TI/TFmode adds 1848e944f78 Simplify frame layout for stack probing adds aa9edc021f4 Deduction guides for associative containers, debug mode ded [...] adds 95fee1638ab Introduce emit_frame_chain adds 081c1d32b50 Add wider_subreg_mode helper functions adds 2f89b19dbe6 [gcc] 2017-10-26 Michael Meissner meissner@linux.vnet.ibm.com adds 8ef1d046b43 Adding missing CMP* intrinsics adds 168ec6c467c Fix unsharing of GIMPLE_OMP_{SINGLE,TARGET,TEAMS} in gimple_copy adds d04d3b0ee06 Add some usage info -fdebug-prefix-map= docs. adds ed2fbf76593 Fix hyphenation build-time path and install-time path. adds 0bdc995faa5 2017-10-26 Sandra Loosemore sandra@codesourcery.com adds 26edd35f7b9 2017-10-26 Sandra Loosemore sandra@codesourcery.com adds 229846311b8 compiler: explicitly convert between type aliases adds a6ed82d5a6d Protect more algorithms from overloaded comma operators adds 808f4b4d253 Daily bump. adds bffa30086e1 2017-10-26 Michael Collison michael.collison@arm.com adds 3a2c20a1fc6 2017-10-27 Richard Biener rguenther@suse.de adds b5e6f825240 Document --coverage and fork-like functions (PR gcov-profil [...] adds 90120fad1e4 2017-10-27 Paolo Carlini paolo.carlini@oracle.com adds 9006ef75515 2017-10-27 Paolo Carlini paolo.carlini@oracle.com adds bd5ef087eb3 Extend ipa-pure-const pass to propagate malloc attribute. adds a1236801589 Update install.texi for Solaris 12 rename adds 80f13822072 Define std::filesystem::path::format enum (P0430R2) adds c71ec180fd3 PR target/82703 * config/i386/i386-protos.h (maybe_get_po [...] adds 4b57298d473 * gcc.target/i386/pr70021.c: Add -mtune=skylake. adds 199795115a6 Provide filesystem::path overloads for file streams (LWG 26 [...] adds 5367a7284c4 Fix profiledbootstrap. adds 41057e20e30 * config/i386/x86-tune.def (X86_TUNE_PARTIAL_REG_DEPENDENC [...] adds 6b073ae6730 RISC-V: Correct and improve the "-mabi" documentation adds 86ca3f9c02b * tree-vrp.c (check_all_array_refs): Do not use wi->info t [...] adds 9d8823fc2cd * gimple-ssa-sprintf.c: Include domwalk.h. (class sprintf [...] adds fb05ba13e08 2017-10-27 Thomas Koenig tkoenig@gcc.gnu.org adds 64ab8e1efe0 2017-10-27 Paolo Carlini paolo.carlini@oracle.com adds 9c1279656af Make filesystem::file_status default constructor non-explic [...] adds 96040a5222f Remove noexcept from filesystem iterators and operations (L [...] adds 7595553b575 List headers in Makefile in alphabetical order adds feb4740e880 Simplify _Node_insert_return to avoid including <tuple> adds 2b87662b1b6 2017-10-27 Jerry DeLisle jvdelisle@gcc.gnu.org Rim [...] adds a4ba04ec993 [testsuite] adds 0e0f62ff32d * x86-tune.def (X86_TUNE_INTER_UNIT_MOVES_TO_VEC): Disable [...] adds e5496d25a3e PR target/82692 * config/i386/i386-modes.def (CCFPU): Rem [...] adds 8c32188e45a [gcc] 2017-10-27 Michael Meissner meissner@linux.vnet.ibm.com adds d3f717e3ced * config/i386/i386-protos.h (ix86_fp_compare_mode): Remove [...] adds 96e737056e1 PR target/82268 Correct FAIL when configured --with-cpu adds 58767674244 * bb-reorder.c (find_traces_1_round): Fix off-by-one index [...] adds e7bc451ad99 2017-10-27 Paolo Carlini paolo.carlini@oracle.com adds 9af8cd197d8 Daily bump. adds e7ec0394ec7 2017-10-27 Steven G. Kargl kargl@gcc.gnu.org adds 5af416bdad5 * target.c (struct gomp_coalesce_buf): New type. (MAX_COA [...] adds 653e6be2eba 2017-10-28 Paul Thomas pault@gcc.gnu.org adds 98d57112ed8 gcc/fortran/ChangeLog: adds 463025a4a1a 2017-10-28 Paolo Carlini paolo.carlini@oracle.com adds 9e9fa2ca36b * ChangeLog: Fix whitespace. adds 3107a63f7c6 Daily bump. adds fbb4b7e080f 2017-10-28 Sandra Loosemore sandra@codesourcery.com adds 4502ff955d7 * gcc.dg/torture/pr82692.c: Move from gcc.target/i386. adds 4c52ff7a5b9 Delete obsolete SDB debug info support. adds f4140c4a9d9 Emit a no longer supported warning for gcoff* options. adds 8511bf01200 Daily bump. adds d48f7e1fccd Fix cygwin builds, broken by PR sanitizer/82517 fix. adds 8e1d5c32cc9 PR target/82725 * config/i386/i386.c (legitimate_pic_addr [...] adds 902cb3b7a38 PR middle-end/22141 * gimple-ssa-store-merging.c: Include [...] adds 1c59997fdcd 2017-10-30 Maxim Ostapenko m.ostapenko@samsung.com adds a0f44249fae Add -std=c17, -std=gnu17. adds c22b278360c 2017-10-30 Richard Biener rguenther@suse.de adds 71684bd8ba8 2017-10-30 Richard Biener rguenther@suse.de adds 2c24409655e 2017-10-30 Richard Biener rguenther@suse.de adds e0cf8e14db2 2017-10-30 Will Schmidt will_schmidt@vnet.ibm.com adds 97cd4b7c2aa [gcc] adds 6d8efcd4440 Implement LWG 2485 adds 6c391d9ac8e Minor header reorganization for unordered containers adds 4fc74ab57a8 Minor tweak to libstdc++ FAQ adds cfb1beeeeab [hsa] Add missing guard in OMP gridification adds b1a01306f5b Remove ios_mode::trunc from basic_ofstream openmode arguments adds c320789713c Fix ia64 build failure. adds a5961a9d276 PR middle-end/22141 * gimple-ssa-store-merging.c (merged_ [...] adds 87b2d547f8a Don't create broken symlink in libstdc++-v3/include/bits adds 5ae88138087 Remove Tru64 UNIX and IRIX references in install.texi adds 781ef03eec8 Merge the movdi_vfp_cortexa8 pattern into movdi_vfp and rem [...] adds fdfc9dde491 Part 1/2 for contributing PPC64LE support for X86 SSE2 inst [...] adds 5b7ab2a098b Part 2/2 for contributing PPC64LE support for X86 SSE2 inst [...] adds 42a451c3eb4 Wrong type-attribute for stp and str adds b86a5e47ed4 Remove DImode expansions for 1-bit shifts adds e2665e8b489 [C++ PATCH] operator name cleanup prepatch adds 6302f203a19 /cp 2017-10-30 Paolo Carlini paolo.carlini@oracle.com adds 8c4ace0ab95 2017-10-30 Steven G. Kargl kargl@gcc.gnu.org adds 750ce69025a * g++.dg/pr82725.C: Move to ... * g++.dg/cpp0x/pr82725.C: [...] adds 42648dab8ce 2017-10-30 Paul Thomas pault@gcc.gnu.org adds 0fa9694b2f9 2017-10-30 Paolo Carlini paolo.carlini@oracle.com adds 7c6be8607bd * gcc.c (HAVE_TARGET_EXECUTABLE_SUFFIX): Remove old kludge. adds 0ad673d2fab Daily bump. adds 957d28c344b GFNI enabling [2/4] adds c0b0550f0f2 2017-10-31 Olivier Hainque hainque@adacore.com adds 5fe5c8b1cd1 Subject: [PATCH] rs6000: Fix crash with big stack clash int [...] adds 0ad1ff19a56 PR target/82772 * config/alpha/sync.md (fetchop_constr) < [...] adds 7aa650153c2 GCOV: document behavior of -fkeep-{static,inline}-functions [...] adds c536c15fe32 GCOV: introduce usage of terminal colors. adds 3cf7fddf54b GCOV: add support for lines with an unexecuted lines. adds 9e8df757553 GCOV: std::vector refactoring. adds fc95c20dcc9 GCOV: Vector refactoring II adds 7a5024dcd3f GCOV: std::vector refactoring III adds ef8f6502f01 [C++ PATCH] overloaded operator fns [1/N] adds cace9453cd8 Remove semicolon after do {} while (false) in HSA_LOG adds 6ad880fee3d [BRIGFE] Fix PR 82771. adds ca16a224db6 [C++ PATCH] overloaded operator fns [2/N] adds 830841329be Fix typo in my email, in changelog. adds eb356edc35c GCOV: add -j argument (human readable format). adds ce0456f1571 Fix fortran build error on AIX. adds 02938df3f73 [C++ PATCH] overloaded operator fns [3/N] adds de6aefc508c * constexpr.c, pt.c: Adjust comments. adds 970969cd44c * gdbinit.in: Skip over inlines from timevar.h. adds 7218269af04 PR ada/82785 * gcc-interface/Makefile.in (m68k/Linux): Fix typo. adds 5cbb8e6b112 PR rtl-optimization/81803 * lra-constraints.c (curr_insn_ [...] adds daad7ad78af [C++ PATCH] overloaded operator fns [4/N] adds 842a81495d5 2017-10-31 Michael Meissner meissner@linux.vnet.ibm.com adds 61fae5c47ba [C++ PATCH] overloaded operator fns [5/N] adds 3b6578b3249 diagnostics: get rid of *_at_rich_loc in favor of overloading adds 53bc543aa04 pt.c: add missing %< and %> adds 7d9992046ef jit: add a way to preserve testsuite executables adds 584b111e9e9 [PR 81702] Remove devirtualization assert adds e6d7851fd17 PR target/82002 Part 1: Correct ICE caused by wrong calculation adds 175150216b9 Daily bump. adds 9815bd97561 2017-10-31 Sandra Loosemore sandra@codesourcery.com adds 20390c01ce8 * gcc.target/alpha/sqrt.c: New test. adds 4f0eb67f3a4 Prevent invalid register mode changes in combine adds 0b51f5cec16 Add gen_(const_)vec_duplicate helpers adds 98d31d3a185 Add more vec_duplicate simplifications adds b58a8b74c28 Allow vector CONSTs adds ccc2ef18f54 Add a VEC_SERIES rtl code adds d2401312be0 Add a fixed_size_mode class adds d2a1b4530f1 Widening optab cleanup adds 296e7207f0d Add narrower_subreg_mode helper function adds 0d97e6d1fd7 Add an is_narrower_int_mode helper function adds f6d4e346a11 More is_a <scalar_int_mode> adds b889f86b3b4 Use more specific hash functions in rtlhash.c adds 50e9e5b351d Factor out the mode handling in lower-subreg.c adds 01e3bc6eba1 Turn var-tracking.c:INT_MEM_OFFSET into a function adds a543234db0a [C++ PATCH] overloaded operator fns [6/N] adds 9a2f49ee363 Use (CONST_VECTOR|GET_MODE)_NUNITS in simplify-rtx.c adds f81dd217477 Don't treat zero-sized ranges as overlapping adds 5dae9486d92 Make tree-ssa-dse.c:normalize_ref return a bool adds 2cc899e0608 [C++ PATCH] overloaded operator fns [6/N] adds a0048642f37 combine: Fix bug in giving up placing REG_DEAD notes (PR82683) adds 6389f55493c 2017-11-01 Richard Sandiford richard.sandiford@linaro.org adds 12f6e5e6159 PR libstdc++/82777 fix path normalization for dot-dot adds c730c800d49 2017-11-01 François Dumont fdumont@gcc.gnu.org adds 96d99b505fd RISC-V: Document the medlow and medany code models adds 816659f9fbe [C++ PATCH] overloaded operator fns [8/N] adds 054aa460a19 [PATCH] fix fdump-lang-raw ICE adds ce405054618 [AArch64] Generate permute patterns using rtx builders adds 16042add875 [AArch64] Move code around adds 99276ded45d [AArch64] Rename the internal "Upl" constraint adds 4ec31dd2d69 [AArch64] Minor rtx costs tweak adds 81ba46decc8 PR rtl-optimization/82778 PR rtl-optimization/82597 * co [...] adds 6bd87d95fc2 * tree-ssa-propagate.h (ssa_prop_visit_stmt_fn): Remove ty [...] adds b08e7364ef3 * tree-ssa-ccp.c (ccp_folder): New class derived from sub [...] adds 0485445ef07 RISC-V: Use "@minus{}2 GB" instead of "-2 GB" in invoke.texi adds a6608efb16a Daily bump. adds 070539b6de0 Fix scan pattern in gfortran.dg/implied_do_io_1.f90 adds 0aed0653276 2017-11-02 Richard Biener rguenther@suse.de adds bed7266fd09 Fix scan-assembler patterns in i386/naked-{1,2}.c adds 3c3157263f3 [ARC][ZOL] Account for empty body loops adds e1c571cfc42 Cleanup Solaris linker version checks adds 9b79c8e1a52 2017-11-02 Richard Biener rguenther@suse.de adds 35d7869f13d * x86-tune.def (X86_TUNE_USE_INCDEC): Enable for Haswell+. adds 0d5158a4838 Re: [PATCH] fix fdump-lang-raw ICE adds ac03d822d08 * gimple-ssa-sprintf.c (sprintf_dom_walker): Remove virtu [...] adds 268ee103137 Move testsuite entries to proper file adds bb0142e0a08 Define MALLOC_ABI_ALIGNMENT adds bbbf4a06b0d [PR c++/82710] false positive paren warning adds 4767026dec4 [C++ PATCH] overloaded operator fns [8/N] adds 69121b015ed Add FT32B support adds db7ff53df7a Move selftest::test_diagnostic_context to its own header adds fd3a7b2d4e9 Add selftest for diagnostic_get_location_text adds 72e6ef12f63 PR target/79868 * config/aarch64/aarch64-c.c (aarch64_pra [...] adds 8821c74535e PR target/79868 * gcc.target/aarch64/spellcheck_1.c: Upda [...] adds a89b33331a1 /cp 2017-11-02 Paolo Carlini paolo.carlini@oracle.com adds 65a01a12b8c Daily bump. adds e68c23ab263 combine: Print insns we try to combine adds 90b79395dd0 PR82809: register handling in ix86_vector_duplicate_value adds e892f4fac60 [ARC] Fix to unwinding. adds d62c97f5fe0 Remove _Node_insert_return::get() member functions (P0508R0) adds b43bd76bcbf [PR c++/82710] false positive paren warning adds 67e3cdf3eca [aarch64] Add Qualcomm saphira CPU support. adds 9408db99efa rs6000: move_from_CR_ov_bit is TARGET_PAIRED_FLOAT, not TAR [...] adds d684a2cfe3d rs6000: Improve *lt0 patterns adds 0be202cfe73 [PATCH] Fix testsuire error message adds 781347cd511 RISC-V: Handle non-legitimate address in riscv_legitimize_move adds 53bea213a22 Set default sched pressure algorithm adds 205ce1aa3b5 * asan.c (create_cond_insert_point): Maintain profile. * [...] adds dc2ef1623c7 rs6000: Remove rs6000_emit_sISEL adds 801c4b5df18 Define std::endian for C++2a (P0463R1) adds 48eb107eeb9 Generalize -(-X) a little adds 1477a5a7a0a * cfganal.c (single_pred_edge_ignoring_loop_edges): New fu [...] adds 57e0bb85a0a Fix PR82768 adds 1f8f9203f91 PR testsuite/82828 PR rtl-optimization/70263 * gcc.targe [...] adds fe9c3d1ba6c * config/i386/i386.c (ix86_expand_prologue): Tighten asser [...] adds 9665f90e02b 2017-11-03 Sandra Loosemore sandra@codesourcery.com adds bdef38587fe Improve aarch64_legitimate_constant_p adds e4be0d865d7 2017-11-3 Steven G. Kargl kargl@gcc.gnu.org adds 9991d1d312d PR tree-optimization/78821 * gimple-ssa-store-merging.c: [...] adds d667e9afb3f * config/i386/i386.c (ix86_emit_restore_reg_using_pop): Pr [...] adds 8c3c0419e55 Add BZ marker to a recent change adds d7bccc84120 PR target/82823 * g++.dg/torture/pr82823.C: New test. adds 60758fa6116 Daily bump. adds a1920064e26 2017-11-01 Steven G. Kargl kargl@gcc.gnu.org adds 8c089b5c15a 2017-11-04 Paul Thomas pault@gcc.gnu.org new 1623c4f1b68 PR82816: Widening multiplies of bitfields new 048a8740a43 Rework vrp_int_const_binop interface new 881b201d81b [AArch64] Handle CONST_WIDE_INT in movti new 2d7190b2857 tree-data-ref.c evolution_function_right_is_integer_cst new f2ecf0adff7 [AArch64] Use aarch64_reg_or_imm instead of nonmemory_operand new 09c0b6ecc77 Add an alternative vector loop iv mechanism new 2bddf6a5e9b :: wide-int.h speed-up new 652273b8fe0 Document machine_mode wrapper classes new 77f7f1c771f [AArch64] Tweak aarch64_classify_address interface new 3ec47a66856 Protect second call to extract_range_from_multiplicative_op_1 new 0b0d050a69f [AArch64] Extra scalar_float_mode patch new bb3a153866a Use partial_subreg_p in curr_insn_transform new e788f0c3fca Base subreg rules on REGMODE_NATURAL_SIZE rather than UNITS [...] new e0a1263f94c match.pd handling of three-constant bitops new bbadb2d171a Add VEC_DUPLICATE_{CST,EXPR} and associated optab new b31fd2f7df0 Add VEC_SERIES_{CST,EXPR} and associated optab new 1d76b030d60 Add unique CONSTs new 72fc5b3614c Add a fixed_size_mode_pod class new 79792547bc6 Add helpers for shift count modes new 169e43d5e5f Minor vn_reference_lookup_3 tweak new d66f17b71c8 Make dse.c use offset/width instead of start/end new 408c652f2ca poly_int: add poly-int.h new 7f1548a7091 poly_int: IN_TARGET_CODE new c623a95aea2 poly_int: MACRO_MODE new 905076749b3 poly_int: mode query functions new 9d2e9a3319a poly_int: rtx constants new 608dfa8f8ad poly_int: tree constants new 02970a70cbe poly_int: dump routines new cc808d30c22 poly_int: create_integer_operand new 1ca45b46897 poly_int: TRULY_NOOP_TRUNCATION new 952c9ddbc99 poly_int: REG_OFFSET new 9044e2c7fc9 poly_int: DWARF locations new ba00a63c97b poly_int: fold_ctor_reference new 9e7fe90bb59 poly_int: same_addr_size_stores_p new 69005a9ebc4 poly_int: indirect_refs_may_alias_p new b84d7e9ffde poly_int: ao_ref and vn_reference_op_t new 5a57b00dcf5 poly_int: dse.c new eea43b80072 poly_int: rtx_addr_can_trap_p_1 new 5b2db963aaf poly_int: MEM_OFFSET and MEM_SIZE new 77b4932e7f2 poly_int: lra frame offsets new 51ac6037d85 poly_int: store_bit_field bitrange new a3a73578506 poly_int: extract_bit_field bitrange new 651249da282 poly_int: C++ bitfield regions new 78291461471 poly_int: store_field & co new eb06e154368 poly_int: ira subreg liveness tracking new d2f20c32c96 poly_int: SUBREG_BYTE new 6072f1d3062 poly_int: operand_subword new deec226867e poly_int: DWARF CFA offsets new 24b1446a9d0 poly_int: ipa_parm_adjustment new 82d06fc26a8 poly_int: get_ref_base_and_extent new a0d48c5f46d poly_int: get_addr_unit_base_and_extent new da5e65aea2a poly_int: aff_tree new 15a9e18ab9b poly_int: symbolic_number new 819371f29cf poly_int: pointer_may_wrap_p new 4919a6d4f1a poly_int: get_inner_reference_aff new ce1b5ac5486 poly_int: expand_debug_expr new 6436a841729 poly_int: get_object_alignment_2 new a02f4ae414d poly_int: mem_valid_for_store_merging new 7cd39457cec poly_int: get_bit_range new 6bdc5778dcb poly_int: fold_comparison new 05ae28fae17 poly_int: get_inner_reference & co. new 760781a9c5e poly_int: reload.c new 952a9f436ae poly_int: reload1.c new ad9738074ce poly_int: frame allocations new e4015cebbaf poly_int: push_block/emit_push_insn new 2bed118cde7 poly_int: REG_ARGS_SIZE new aa48b83086c poly_int: instantiate_virtual_regs new e90ee8159f0 poly_int: argument sizes new 4fd7633eaf3 poly_int: cfgexpand stack variables new b62e016029e poly_int: emit_inc new bd77232f7d0 poly_int: reload<->ira interface new 7750e4b7ad9 poly_int: emit_group_load/store new 4d1764c45c4 poly_int: bit_field_size/offset new ae9ab474cd8 poly_int: decode_addr_const new 009a3b18f65 poly_int: adjust_ptr_info_misalignment new 6d7f1313bb9 poly_int: find_bswap_or_nop_load new bf21c3a9326 poly_int: MEM_REF offsets new 66123324e51 poly_int: build_ref_for_offset new 2a5a4116675 poly_int: get_binfo_at_offset new aa6fa7341d1 poly_int: tree-ssa-loop-ivopts.c:iv_use new c5f60ed976d poly_int: loop versioning threshold new b8fdf09543c poly_int: compute_data_ref_alignment new 6220438247c poly_int: prune_runtime_alias_test_list new 0b2c81b2609 poly_int: vectoriser vf and uf new 9b015cede28 poly_int: SLP max_units new 410a8d57e5a poly_int: vect_nunits_for_cost new 8eef234ad63 poly_int: omp_max_vf new 16323d7b130 poly_int: get_mask_mode new ecf3d5d3165 poly_int: current_vector_size and TARGET_AUTOVECTORIZE_VECT [...] new 6bff9ae5cbc poly_int: vector_alignment_reachable_p new 8607f635196 poly_int: vectorizable_reduction new c7d327d4ca7 poly_int: vectorizable_induction new d66e7d34792 poly_int: vectorizable_live_operation new e4022aca31a poly_int: vectorizable_load/store new 7d5b504d294 poly_int: vectorizable_call new 09eb10da463 poly_int: vectorizable_simd_clone_call new 56adec7035e poly_int: vectorizable_conversion new 67339f0b175 poly_int: vect_get_constant_vectors new fb3ed4197b0 poly_int: two-operation SLP new f5d7dace036 poly_int: vect_no_alias_p new def89a92d5f poly_int: tree-vect-generic.c new aab037fa53f poly_int: brig vector elements new e5d5b363491 poly_int: omp-simd-clone.c new bb34b11c441 poly_int: fold_indirect_ref_1 new e43ee15bcce poly_int: folding BIT_FIELD_REFs on vectors new 551332fadf5 poly_int: expand_vector_ubsan_overflow new 4121408e80e poly_int: REGMODE_NATURAL_SIZE new 27bb5d5f3b5 poly_int: subreg_get_info new be71552ef78 poly_int: expand_expr_real_2 new c63b8788e65 poly_int: expand_expr_real_1 new 2e18958dcb6 poly_int: set_inc_state new c75497570e5 poly_int: emit_single_push_insn_1 new da4a97d71b6 poly_int: PUSH_ROUNDING new 7ed2825b16e poly_int: adjust_mems new aab0cb88711 poly_int: expand_ifn_atomic_compare_exchange_into_call new 59492057f2a poly_int: process_alt_operands new 9143cc0f5dd poly_int: reloading complex subregs new 95b251a5fbb poly_int: alter_reg new 4127b32fb3a poly_int: load_register_parameters new a3458c5caa5 poly_int: struct_value_size new 7a247ba7553 poly_int: memrefs_conflict_p new 789f6b91dc0 poly_int: GET_MODE_NUNITS new 8e6b1eca6b5 poly_int: vect_permute_load/store_chain new 6baf2e2fe83 poly_int: TYPE_VECTOR_SUBPARTS new a0debf7ec53 poly_int: GET_MODE_PRECISION new 6cec38afc37 poly_int: expand_assignment new 39285764f6c poly_int: GET_MODE_BITSIZE new 7182cb5f083 poly_int: GET_MODE_SIZE new dcfdd7d6467 Add support for MODE_VECTOR_BOOL new 3a93390b7e6 Add support for adjusting the number of units in a mode new 79642b84ff3 [From upstream] Jeff's stack-clash patch for AArch64 new 2e9b1a174c3 [AArch64] Rework interface to add constant/offset routines new 8dbd765a0ce [AArch64] Rewrite aarch64_simd_valid_immediate new 79043dbdeca [AArch64] Add an endian_lane_rtx helper routine new a21c91996c0 [AArch64] Pass number of units to aarch64_reverse_mask new da58e52151d [AArch64] Pass number of units to aarch64_simd_vect_par_cnst_half new 28171d56105 [AArch64] Pass number of units to aarch64_expand_vec_perm(_const) new fb05a6c80f5 [AArch64] Set NUM_POLY_INT_COEFFS to 2 new df93d6babc2 [AArch64] Add const_offset field to aarch64_address_info new 22513af442b Allow the target to set MAX_BITSIZE_MODE_ANY_MODE new 3390ab51468 Improve vectorization COND_EXPR <bool op bool, ...> new 9b420ddab37 Improve ivopts handling of forced scales new fd20ff8360a Improve canonicalisation of TARGET_MEM_REFs new 6c0867d1cb1 Improve spilling for variable-width slots new 9c133eef288 Use extract_bit_field_as_subreg for vectors new 707fa7529ca Consistently use asm volatile ("" ::: "memory") in vect tests new e05574bf0ae Add VECTOR_BITS to tree-vect.h new ed2ec108b2e Add available_vector_sizes to target-supports.exp new e72f94844ad Don't assume vect_multiple_sizes means 2 sizes new 7ae3d3031c2 Add vect_perm3_* target selectors new 5a9f490812b Add a vect_element_align_preferred target selector new d4a197c99a9 Add a vect_unaligned_possible target selector new 88aa3c9b214 Add a vect_variable_length target selector new db01c5bde5a Add a vect_align_stack_vars target selector new 40c46f618ec Add a vect_masked_store target selector new f7b1103c325 Use poly_int rtx accessors instead of hwi accessors new adadbaf0a4a Use poly_int tree accessors instead of hwi accessors new 89603f9cd8c [AArch64] Add SVE support new 46e4e831a99 [AArch64] Testsuite markup for SVE new 960813c9669 [AArch64] SVE tests new 40932ba0742 SVE unwinding new 83dedbe78a7 Test failures new 8b3849d3696 Fix folding of vector mask EQ/NE expressions new 6e36965acb5 [AArch64] SVE load/store_lanes support new 30c3dad6749 Add support for masked load/store_lanes new 3187f291abc Add support for bitwise reductions new 01c60e41b97 Add optabs for common types of permutation new 2a7483eb21f Handle more SLP constant and extern definitions for variable VF new 61cf302a4df SLP reductions with variable-length vectors new 1b6d746b826 Protect against min_profitable_iters going negative new c67b54d99ab Add support for fully-predicated loops new 7e5a209e87f Improve VIEW_CONVERT_EXPR for vector booleans new 5992e77a864 Make ivopts handle calls to internal functions new 5f8c35b7825 Allow the number of iterations to be smaller than VF new ab96f67a1d6 Handle peeling for alignment with masking new cbb579b7161 Improve ivopts handling of offset multiples new cd297c17f25 Rework the legitimize_address_displacement hook new 386238d895c Allow combine to reorder statements new a6498de58f9 Predicated comparison folds new dee655acfb2 Predicated arithmetic folds new aa9a87fa1c3 Add an empty_mask_is_expensive hook new 7ce1572f52e Reuse results of vect_create_addr_base_for_vector_ref new f5f3fb1185f Allow capped vectorisation factors new d69f3683467 Add support for BRKA and LASTB new c32412c8665 Add support for CLASTB new 2f5419fdce8 Add support for FADDA new 993d0177e34 Add support for gather loads and scatter stores new 95d62e3080b Avoid pessimistic check for overlapping groups new 8180ad790e1 Fix for big field stores new b8ec9179e0c Support for aliasing with variable strides new 2d09c0703bf Revert DECL_USER_ALIGN patch new 8f312d5153a Add support for speculative loads new 0d0014f675e Add support for first-faulting loads new a721c4fb5a4 Allow single-element interleaving for non-power-of-2 strides new 1cef189cba3 Use single-iteration epilogues when peeling for gaps new 070e9d0b1ea Replace FMA_EXPR with one internal fn per optab new 27e17907b39 Support fused multiply-adds in fully-masked reductions new 7a3da6f49aa Record equivalences for spill registers new b22358b8afe Add early rematerialisation pass new c1c78f30242 Remove unnecessary temporary in tree-if-conv.c new 52894c64b88 Handle vector boolean types when calculating the SLP unroll factor new 34676982722 Implement SLP of internal functions new 208ef0ba566 Use conditional internal functions in if-conversion new 9f6b01aacf8 Work around PR81082

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gcc/testsuite/gcc.target/aarch64/sve_fnmls_1.c | 35 +- gcc/testsuite/gcc.target/aarch64/sve_fnmsb_1.c | 35 +- gcc/testsuite/gcc.target/aarch64/sve_fp_arith_1.c | 37 +- gcc/testsuite/gcc.target/aarch64/sve_frinta_1.c | 1 - gcc/testsuite/gcc.target/aarch64/sve_frinti_1.c | 1 - gcc/testsuite/gcc.target/aarch64/sve_frintm_1.c | 1 - gcc/testsuite/gcc.target/aarch64/sve_frintp_1.c | 1 - gcc/testsuite/gcc.target/aarch64/sve_frintx_1.c | 1 - gcc/testsuite/gcc.target/aarch64/sve_frintz_1.c | 1 - gcc/testsuite/gcc.target/aarch64/sve_fsqrt_1.c | 1 - gcc/testsuite/gcc.target/aarch64/sve_fsubr_1.c | 23 +- .../aarch64/{sve_index_1.C => sve_index_1.c} | 79 +- gcc/testsuite/gcc.target/aarch64/sve_index_1_run.C | 79 - gcc/testsuite/gcc.target/aarch64/sve_index_1_run.c | 20 + .../gcc.target/aarch64/sve_indexoffsetlarge_1.c | 31 - gcc/testsuite/gcc.target/aarch64/sve_infloop_1.c | 64 - gcc/testsuite/gcc.target/aarch64/sve_ld1r_1.c | 53 + gcc/testsuite/gcc.target/aarch64/sve_ld1r_2.C | 51 - .../gcc.target/aarch64/sve_load_const_offset_1.c | 52 +- .../gcc.target/aarch64/sve_load_scalar_offset_1.c | 34 +- .../gcc.target/aarch64/sve_load_scalar_offset_2.c | 68 - gcc/testsuite/gcc.target/aarch64/sve_logical_1.c | 149 +- gcc/testsuite/gcc.target/aarch64/sve_loop_add_1.c | 10 +- .../gcc.target/aarch64/sve_loop_add_1_run.c | 7 +- gcc/testsuite/gcc.target/aarch64/sve_loop_add_5.c | 8 +- gcc/testsuite/gcc.target/aarch64/sve_mad_1.c | 54 +- .../aarch64/{sve_maxmin_1.C => sve_maxmin_1.c} | 64 +- .../gcc.target/aarch64/sve_maxmin_1_run.C | 88 - .../gcc.target/aarch64/sve_maxmin_1_run.c | 27 + ...sve_maxmin_strict_1.C => sve_maxmin_strict_1.c} | 20 +- .../gcc.target/aarch64/sve_maxmin_strict_1_run.C | 56 - .../gcc.target/aarch64/sve_maxmin_strict_1_run.c | 27 + gcc/testsuite/gcc.target/aarch64/sve_mla_1.c | 46 +- gcc/testsuite/gcc.target/aarch64/sve_mls_1.c | 46 +- gcc/testsuite/gcc.target/aarch64/sve_mov_rr_1.c | 2 +- gcc/testsuite/gcc.target/aarch64/sve_msb_1.c | 52 +- gcc/testsuite/gcc.target/aarch64/sve_mul_1.c | 34 +- gcc/testsuite/gcc.target/aarch64/sve_neg_1.c | 14 +- gcc/testsuite/gcc.target/aarch64/sve_nlogical_1.c | 41 +- .../gcc.target/aarch64/sve_nlogical_1_run.c | 13 +- gcc/testsuite/gcc.target/aarch64/sve_pack_1.c | 31 +- gcc/testsuite/gcc.target/aarch64/sve_pack_1_run.c | 54 +- .../gcc.target/aarch64/sve_pack_fcvt_signed_1.c | 7 +- .../aarch64/sve_pack_fcvt_signed_1_run.c | 20 +- .../gcc.target/aarch64/sve_pack_fcvt_unsigned_1.c | 7 +- .../aarch64/sve_pack_fcvt_unsigned_1_run.c | 20 +- .../gcc.target/aarch64/sve_pack_float_1.c | 5 +- .../gcc.target/aarch64/sve_pack_float_1_run.c | 17 +- gcc/testsuite/gcc.target/aarch64/sve_popcount_1.c | 11 +- .../gcc.target/aarch64/sve_popcount_1_run.c | 19 +- .../aarch64/{sve_reduc_1.C => sve_reduc_1.c} | 243 +- gcc/testsuite/gcc.target/aarch64/sve_reduc_1_run.C | 117 - gcc/testsuite/gcc.target/aarch64/sve_reduc_1_run.c | 56 + .../aarch64/{sve_reduc_2.C => sve_reduc_2.c} | 201 +- gcc/testsuite/gcc.target/aarch64/sve_reduc_2_run.C | 135 - gcc/testsuite/gcc.target/aarch64/sve_reduc_2_run.c | 79 + gcc/testsuite/gcc.target/aarch64/sve_reduc_3.c | 60 +- gcc/testsuite/gcc.target/aarch64/sve_reduc_4.c | 59 +- gcc/testsuite/gcc.target/aarch64/sve_revb_1.c | 4 +- gcc/testsuite/gcc.target/aarch64/sve_revh_1.c | 13 +- gcc/testsuite/gcc.target/aarch64/sve_revw_1.c | 4 +- gcc/testsuite/gcc.target/aarch64/sve_shift_1.c | 125 +- gcc/testsuite/gcc.target/aarch64/sve_single_1.c | 36 +- gcc/testsuite/gcc.target/aarch64/sve_single_2.c | 9 +- gcc/testsuite/gcc.target/aarch64/sve_single_3.c | 9 +- gcc/testsuite/gcc.target/aarch64/sve_single_4.c | 9 +- .../gcc.target/aarch64/sve_store_scalar_offset_1.c | 34 +- .../gcc.target/aarch64/sve_store_scalar_offset_2.c | 53 - gcc/testsuite/gcc.target/aarch64/sve_subr_1.c | 40 +- gcc/testsuite/gcc.target/aarch64/sve_trn1_1.c | 16 +- gcc/testsuite/gcc.target/aarch64/sve_trn2_1.c | 2 +- .../gcc.target/aarch64/sve_unpack_fcvt_signed_1.c | 5 +- .../aarch64/sve_unpack_fcvt_signed_1_run.c | 21 +- .../aarch64/sve_unpack_fcvt_unsigned_1.c | 7 +- .../aarch64/sve_unpack_fcvt_unsigned_1_run.c | 19 +- .../gcc.target/aarch64/sve_unpack_float_1.c | 5 +- .../gcc.target/aarch64/sve_unpack_float_1_run.c | 15 +- .../gcc.target/aarch64/sve_unpack_signed_1.c | 29 +- .../gcc.target/aarch64/sve_unpack_signed_1_run.c | 52 +- .../gcc.target/aarch64/sve_unpack_unsigned_1.c | 29 +- .../gcc.target/aarch64/sve_unpack_unsigned_1_run.c | 52 +- gcc/testsuite/gcc.target/aarch64/sve_uzp1_1.c | 15 +- gcc/testsuite/gcc.target/aarch64/sve_uzp1_1_run.c | 10 +- gcc/testsuite/gcc.target/aarch64/sve_uzp2_1.c | 15 +- gcc/testsuite/gcc.target/aarch64/sve_uzp2_1_run.c | 10 +- gcc/testsuite/gcc.target/aarch64/sve_vcond_1.C | 446 +-- gcc/testsuite/gcc.target/aarch64/sve_vcond_1_run.C | 116 +- gcc/testsuite/gcc.target/aarch64/sve_vcond_2.C | 310 -- gcc/testsuite/gcc.target/aarch64/sve_vcond_2.c | 318 ++ gcc/testsuite/gcc.target/aarch64/sve_vcond_2_run.C | 118 - gcc/testsuite/gcc.target/aarch64/sve_vcond_2_run.c | 49 + .../aarch64/{sve_vcond_3.C => sve_vcond_3.c} | 42 +- gcc/testsuite/gcc.target/aarch64/sve_vcond_4_run.c | 13 +- gcc/testsuite/gcc.target/aarch64/sve_vcond_6.c | 15 +- gcc/testsuite/gcc.target/aarch64/sve_vcond_6_run.c | 7 +- .../aarch64/{sve_vec_init_1.C => sve_vec_init_1.c} | 9 +- .../{sve_vec_init_1_run.C => sve_vec_init_1_run.c} | 21 +- gcc/testsuite/gcc.target/aarch64/sve_vec_perm_1.c | 17 +- .../aarch64/sve_vec_perm_1_overrange_run.c | 19 +- .../gcc.target/aarch64/sve_vec_perm_1_run.c | 12 +- .../gcc.target/aarch64/sve_vec_perm_const_1.c | 18 +- .../aarch64/sve_vec_perm_const_1_overrun.c | 21 +- .../gcc.target/aarch64/sve_vec_perm_const_1_run.c | 12 +- .../aarch64/sve_vec_perm_const_single_1.c | 15 +- .../aarch64/sve_vec_perm_const_single_1_run.c | 10 +- .../gcc.target/aarch64/sve_vec_perm_single_1.c | 26 +- .../gcc.target/aarch64/sve_vec_perm_single_1_run.c | 11 +- gcc/testsuite/gcc.target/aarch64/sve_zip1_1.c | 16 +- gcc/testsuite/gcc.target/aarch64/sve_zip2_1.c | 2 +- gcc/testsuite/gcc.target/aarch64/target_attr_11.c | 2 +- gcc/testsuite/gcc.target/aarch64/target_attr_12.c | 2 +- gcc/testsuite/gcc.target/aarch64/target_attr_17.c | 2 +- gcc/testsuite/gcc.target/aarch64/vect-vcvt.c | 8 +- gcc/testsuite/gcc.target/alpha/sqrt.c | 25 + gcc/testsuite/gcc.target/arc/loop-1.c | 12 + gcc/testsuite/gcc.target/arm/peep-ldrd-1.c | 2 +- .../arm/{peep-ldrd-1.c => peep-ldrd-2.c} | 4 +- gcc/testsuite/gcc.target/arm/peep-strd-1.c | 2 +- .../arm/{peep-strd-1.c => peep-strd-2.c} | 4 +- .../gcc.target/arm/require-pic-register-loc.c | 10 +- gcc/testsuite/gcc.target/arm/simd/vdot-exec.c | 55 + gcc/testsuite/gcc.target/i386/387-ficom-1.c | 2 +- gcc/testsuite/gcc.target/i386/387-ficom-2.c | 2 +- gcc/testsuite/gcc.target/i386/attr-nocf-check-1a.c | 32 + gcc/testsuite/gcc.target/i386/attr-nocf-check-3a.c | 32 + gcc/testsuite/gcc.target/i386/avx-1.c | 16 +- gcc/testsuite/gcc.target/i386/avx-pr82370.c | 65 + gcc/testsuite/gcc.target/i386/avx2-pr82370.c | 23 + gcc/testsuite/gcc.target/i386/avx512-check.h | 3 + gcc/testsuite/gcc.target/i386/avx512bw-pr82370.c | 33 + .../gcc.target/i386/avx512bw-vpermt2w-1.c | 18 +- .../gcc.target/i386/avx512dq-vreducesd-1.c | 13 +- ...dq-vextractf64x2-2.c => avx512dq-vreducesd-2.c} | 43 +- .../gcc.target/i386/avx512dq-vreducess-1.c | 12 +- .../gcc.target/i386/avx512dq-vreducess-2.c | 68 + .../gcc.target/i386/avx512f-gf2p8affineinvqb-2.c | 74 + gcc/testsuite/gcc.target/i386/avx512f-pr82370.c | 33 + gcc/testsuite/gcc.target/i386/avx512f-vcmppd-1.c | 29 +- gcc/testsuite/gcc.target/i386/avx512f-vcmppd-2.c | 77 +- gcc/testsuite/gcc.target/i386/avx512f-vcmpps-1.c | 28 +- gcc/testsuite/gcc.target/i386/avx512f-vcmpps-2.c | 78 +- gcc/testsuite/gcc.target/i386/avx512f-vpermt2d-1.c | 6 +- .../gcc.target/i386/avx512f-vpermt2pd-1.c | 4 +- .../gcc.target/i386/avx512f-vpermt2ps-1.c | 4 +- gcc/testsuite/gcc.target/i386/avx512f-vpermt2q-1.c | 6 +- .../gcc.target/i386/avx512vbmi-vpermt2b-1.c | 18 +- ...vdbpsadbw-2.c => avx512vl-gf2p8affineinvqb-2.c} | 7 +- gcc/testsuite/gcc.target/i386/avx512vl-pr82370.c | 31 + .../gcc.target/i386/avx512vl-vpermt2d-1.c | 12 +- .../gcc.target/i386/avx512vl-vpermt2pd-1.c | 8 +- .../gcc.target/i386/avx512vl-vpermt2ps-1.c | 8 +- .../gcc.target/i386/avx512vl-vpermt2q-1.c | 12 +- gcc/testsuite/gcc.target/i386/avx512vlbw-pr82370.c | 33 + gcc/testsuite/gcc.target/i386/cet-intrin-10.c | 10 + gcc/testsuite/gcc.target/i386/cet-intrin-3.c | 33 + gcc/testsuite/gcc.target/i386/cet-intrin-4.c | 31 + gcc/testsuite/gcc.target/i386/cet-intrin-5.c | 10 + gcc/testsuite/gcc.target/i386/cet-intrin-6.c | 10 + gcc/testsuite/gcc.target/i386/cet-intrin-7.c | 18 + gcc/testsuite/gcc.target/i386/cet-intrin-8.c | 18 + gcc/testsuite/gcc.target/i386/cet-intrin-9.c | 10 + gcc/testsuite/gcc.target/i386/cet-label-2.c | 24 + gcc/testsuite/gcc.target/i386/cet-label.c | 16 + gcc/testsuite/gcc.target/i386/cet-notrack-1a.c | 22 + gcc/testsuite/gcc.target/i386/cet-notrack-1b.c | 23 + gcc/testsuite/gcc.target/i386/cet-notrack-2a.c | 12 + gcc/testsuite/gcc.target/i386/cet-notrack-2b.c | 12 + gcc/testsuite/gcc.target/i386/cet-notrack-3.c | 14 + gcc/testsuite/gcc.target/i386/cet-notrack-4a.c | 6 + gcc/testsuite/gcc.target/i386/cet-notrack-4b.c | 6 + gcc/testsuite/gcc.target/i386/cet-notrack-5a.c | 16 + gcc/testsuite/gcc.target/i386/cet-notrack-5b.c | 21 + gcc/testsuite/gcc.target/i386/cet-notrack-6a.c | 15 + gcc/testsuite/gcc.target/i386/cet-notrack-6b.c | 15 + gcc/testsuite/gcc.target/i386/cet-notrack-7.c | 15 + gcc/testsuite/gcc.target/i386/cet-notrack-icf-1.c | 31 + gcc/testsuite/gcc.target/i386/cet-notrack-icf-2.c | 30 + gcc/testsuite/gcc.target/i386/cet-notrack-icf-3.c | 36 + gcc/testsuite/gcc.target/i386/cet-notrack-icf-4.c | 35 + gcc/testsuite/gcc.target/i386/cet-property-1.c | 11 + gcc/testsuite/gcc.target/i386/cet-property-2.c | 11 + gcc/testsuite/gcc.target/i386/cet-rdssp-1.c | 39 + gcc/testsuite/gcc.target/i386/cet-sjlj-1.c | 42 + gcc/testsuite/gcc.target/i386/cet-sjlj-2.c | 4 + gcc/testsuite/gcc.target/i386/cet-sjlj-3.c | 46 + gcc/testsuite/gcc.target/i386/cet-sjlj-4.c | 45 + gcc/testsuite/gcc.target/i386/cet-sjlj-5.c | 48 + gcc/testsuite/gcc.target/i386/cet-switch-1.c | 26 + gcc/testsuite/gcc.target/i386/cet-switch-2.c | 26 + gcc/testsuite/gcc.target/i386/cet-switch-3.c | 34 + gcc/testsuite/gcc.target/i386/gfni-1.c | 18 + gcc/testsuite/gcc.target/i386/gfni-2.c | 27 + gcc/testsuite/gcc.target/i386/gfni-3.c | 17 + gcc/testsuite/gcc.target/i386/gfni-4.c | 14 + gcc/testsuite/gcc.target/i386/i386.exp | 15 + gcc/testsuite/gcc.target/i386/naked-1.c | 4 +- gcc/testsuite/gcc.target/i386/naked-2.c | 4 +- gcc/testsuite/gcc.target/i386/pr61403.c | 2 +- gcc/testsuite/gcc.target/i386/pr70021.c | 2 +- gcc/testsuite/gcc.target/i386/pr70263-2.c | 23 +- gcc/testsuite/gcc.target/i386/pr79683.c | 2 +- gcc/testsuite/gcc.target/i386/pr81706.c | 32 + gcc/testsuite/gcc.target/i386/pr82002-1.c | 12 + gcc/testsuite/gcc.target/i386/pr82002-2a.c | 14 + gcc/testsuite/gcc.target/i386/pr82002-2b.c | 14 + gcc/testsuite/gcc.target/i386/pr82196-1.c | 2 +- gcc/testsuite/gcc.target/i386/pr82370.c | 18 + gcc/testsuite/gcc.target/i386/pr82460-1.c | 30 + gcc/testsuite/gcc.target/i386/pr82460-2.c | 17 + .../gcc.target/i386/{pr46470.c => pr82499-1.c} | 17 +- .../gcc.target/i386/{pr46470.c => pr82499-2.c} | 17 +- .../gcc.target/i386/{pr46470.c => pr82499-3.c} | 19 +- gcc/testsuite/gcc.target/i386/pr82556.c | 19 + gcc/testsuite/gcc.target/i386/pr82580.c | 39 + gcc/testsuite/gcc.target/i386/pr82618.c | 18 + gcc/testsuite/gcc.target/i386/pr82628.c | 34 + gcc/testsuite/gcc.target/i386/pr82659-1.c | 18 + gcc/testsuite/gcc.target/i386/pr82659-2.c | 17 + gcc/testsuite/gcc.target/i386/pr82659-3.c | 20 + gcc/testsuite/gcc.target/i386/pr82659-4.c | 14 + gcc/testsuite/gcc.target/i386/pr82659-5.c | 10 + gcc/testsuite/gcc.target/i386/pr82659-6.c | 18 + gcc/testsuite/gcc.target/i386/pr82662.c | 26 + gcc/testsuite/gcc.target/i386/pr82673.c | 12 + gcc/testsuite/gcc.target/i386/pr82795.c | 23 + gcc/testsuite/gcc.target/i386/sse-12.c | 4 +- gcc/testsuite/gcc.target/i386/sse-13.c | 14 +- gcc/testsuite/gcc.target/i386/sse-14.c | 11 +- gcc/testsuite/gcc.target/i386/sse-22.c | 9 +- gcc/testsuite/gcc.target/i386/sse-23.c | 14 +- gcc/testsuite/gcc.target/i386/stack-check-12.c | 19 + gcc/testsuite/gcc.target/i386/vect-pack-trunc-2.c | 2 +- gcc/testsuite/gcc.target/mips/msa.c | 2 +- gcc/testsuite/gcc.target/nios2/cdx-branch.c | 4 +- .../nios2/{gpopt-local.c => gpopt-gprel-sec.c} | 6 +- .../nios2/{gpopt-local.c => gpopt-r0rel-sec.c} | 10 +- gcc/testsuite/gcc.target/nios2/lo-addr-bypass.c | 40 + gcc/testsuite/gcc.target/nios2/lo-addr-char.c | 60 + gcc/testsuite/gcc.target/nios2/lo-addr-int.c | 40 + gcc/testsuite/gcc.target/nios2/lo-addr-pic.c | 38 + gcc/testsuite/gcc.target/nios2/lo-addr-short.c | 51 + gcc/testsuite/gcc.target/nios2/lo-addr-tls.c | 38 + gcc/testsuite/gcc.target/nios2/lo-addr-uchar.c | 58 + gcc/testsuite/gcc.target/nios2/lo-addr-ushort.c | 49 + gcc/testsuite/gcc.target/nios2/lo-addr-volatile.c | 41 + gcc/testsuite/gcc.target/powerpc/float128-fma2.c | 9 - gcc/testsuite/gcc.target/powerpc/float128-hw.c | 66 +- gcc/testsuite/gcc.target/powerpc/float128-hw2.c | 60 + gcc/testsuite/gcc.target/powerpc/float128-hw3.c | 56 + gcc/testsuite/gcc.target/powerpc/float128-sqrt2.c | 9 - .../{fold-vec-abs-char.c => fold-vec-neg-char.c} | 11 +- .../gcc.target/powerpc/fold-vec-neg-floatdouble.c | 23 + .../{fold-vec-abs-int.c => fold-vec-neg-int.c} | 10 +- ...-vec-abs-longlong.c => fold-vec-neg-longlong.c} | 10 +- .../{fold-vec-abs-short.c => fold-vec-neg-short.c} | 10 +- .../gcc.target/powerpc/fold-vec-perm-longlong.c | 2 +- .../gcc.target/{i386 => powerpc}/sse2-addpd-1.c | 12 +- .../gcc.target/{i386 => powerpc}/sse2-addsd-1.c | 27 +- .../gcc.target/{i386 => powerpc}/sse2-andnpd-1.c | 11 +- .../gcc.target/{i386 => powerpc}/sse2-andpd-1.c | 11 +- gcc/testsuite/gcc.target/powerpc/sse2-check.h | 52 + gcc/testsuite/gcc.target/powerpc/sse2-cmppd-1.c | 76 + .../gcc.target/{i386 => powerpc}/sse2-cmpsd-1.c | 30 +- .../gcc.target/{i386 => powerpc}/sse2-comisd-1.c | 12 +- .../gcc.target/{i386 => powerpc}/sse2-comisd-2.c | 12 +- .../gcc.target/{i386 => powerpc}/sse2-comisd-3.c | 12 +- .../gcc.target/{i386 => powerpc}/sse2-comisd-4.c | 12 +- .../gcc.target/{i386 => powerpc}/sse2-comisd-5.c | 12 +- .../gcc.target/{i386 => powerpc}/sse2-comisd-6.c | 12 +- gcc/testsuite/gcc.target/powerpc/sse2-cvtdq2pd-1.c | 55 + .../gcc.target/{i386 => powerpc}/sse2-cvtdq2ps-1.c | 11 +- .../gcc.target/{i386 => powerpc}/sse2-cvtpd2dq-1.c | 20 +- gcc/testsuite/gcc.target/powerpc/sse2-cvtpd2ps-1.c | 50 + .../gcc.target/{i386 => powerpc}/sse2-cvtps2dq-1.c | 20 +- .../gcc.target/{i386 => powerpc}/sse2-cvtps2pd-1.c | 20 +- .../gcc.target/{i386 => powerpc}/sse2-cvtsd2si-1.c | 19 +- .../gcc.target/{i386 => powerpc}/sse2-cvtsd2si-2.c | 21 +- .../gcc.target/{i386 => powerpc}/sse2-cvtsd2ss-1.c | 23 +- .../gcc.target/{i386 => powerpc}/sse2-cvtsi2sd-1.c | 13 +- .../gcc.target/{i386 => powerpc}/sse2-cvtsi2sd-2.c | 15 +- .../gcc.target/{i386 => powerpc}/sse2-cvtss2sd-1.c | 21 +- .../{i386 => powerpc}/sse2-cvttpd2dq-1.c | 20 +- .../{i386 => powerpc}/sse2-cvttps2dq-1.c | 11 +- .../{i386 => powerpc}/sse2-cvttsd2si-1.c | 20 +- .../{i386 => powerpc}/sse2-cvttsd2si-2.c | 14 +- .../gcc.target/{i386 => powerpc}/sse2-divpd-1.c | 21 +- .../gcc.target/{i386 => powerpc}/sse2-divsd-1.c | 23 +- .../gcc.target/{i386 => powerpc}/sse2-maxpd-1.c | 12 +- .../gcc.target/{i386 => powerpc}/sse2-maxsd-1.c | 21 +- .../gcc.target/{i386 => powerpc}/sse2-minpd-1.c | 12 +- .../gcc.target/{i386 => powerpc}/sse2-minsd-1.c | 21 +- .../gcc.target/{i386 => powerpc}/sse2-mmx.c | 15 +- .../gcc.target/{i386 => powerpc}/sse2-movhpd-1.c | 12 +- .../gcc.target/{i386 => powerpc}/sse2-movhpd-2.c | 12 +- .../gcc.target/{i386 => powerpc}/sse2-movlpd-1.c | 12 +- .../gcc.target/{i386 => powerpc}/sse2-movlpd-2.c | 12 +- .../gcc.target/{i386 => powerpc}/sse2-movmskpd-1.c | 28 +- gcc/testsuite/gcc.target/powerpc/sse2-movq-1.c | 47 + .../gcc.target/{i386 => powerpc}/sse2-movq-2.c | 14 +- .../gcc.target/{i386 => powerpc}/sse2-movq-3.c | 14 +- .../gcc.target/{i386 => powerpc}/sse2-movsd-1.c | 11 +- .../gcc.target/{i386 => powerpc}/sse2-movsd-2.c | 11 +- gcc/testsuite/gcc.target/powerpc/sse2-movsd-3.c | 48 + .../gcc.target/{i386 => powerpc}/sse2-mulpd-1.c | 23 +- .../gcc.target/{i386 => powerpc}/sse2-mulsd-1.c | 21 +- .../gcc.target/{i386 => powerpc}/sse2-orpd-1.c | 11 +- .../gcc.target/{i386 => powerpc}/sse2-packssdw-1.c | 25 +- gcc/testsuite/gcc.target/powerpc/sse2-packsswb-1.c | 78 + gcc/testsuite/gcc.target/powerpc/sse2-packuswb-1.c | 69 + .../gcc.target/{i386 => powerpc}/sse2-paddb-1.c | 12 +- .../gcc.target/{i386 => powerpc}/sse2-paddd-1.c | 12 +- .../gcc.target/{i386 => powerpc}/sse2-paddq-1.c | 12 +- gcc/testsuite/gcc.target/powerpc/sse2-paddsb-1.c | 74 + gcc/testsuite/gcc.target/powerpc/sse2-paddsw-1.c | 65 + gcc/testsuite/gcc.target/powerpc/sse2-paddusb-1.c | 74 + .../gcc.target/{i386 => powerpc}/sse2-paddusw-1.c | 12 +- .../gcc.target/{i386 => powerpc}/sse2-paddw-1.c | 12 +- .../gcc.target/{i386 => powerpc}/sse2-pavgb-1.c | 11 +- .../gcc.target/{i386 => powerpc}/sse2-pavgw-1.c | 11 +- .../gcc.target/{i386 => powerpc}/sse2-pcmpeqb-1.c | 11 +- .../gcc.target/{i386 => powerpc}/sse2-pcmpeqd-1.c | 11 +- .../gcc.target/{i386 => powerpc}/sse2-pcmpeqw-1.c | 11 +- .../gcc.target/{i386 => powerpc}/sse2-pcmpgtb-1.c | 11 +- .../gcc.target/{i386 => powerpc}/sse2-pcmpgtd-1.c | 11 +- .../gcc.target/{i386 => powerpc}/sse2-pcmpgtw-1.c | 11 +- .../sse4_1-pextrw.c => powerpc/sse2-pextrw.c} | 15 +- .../gcc.target/{i386 => powerpc}/sse2-pinsrw.c | 11 +- .../gcc.target/{i386 => powerpc}/sse2-pmaddwd-1.c | 12 +- .../gcc.target/{i386 => powerpc}/sse2-pmaxsw-1.c | 11 +- .../gcc.target/{i386 => powerpc}/sse2-pmaxub-1.c | 11 +- .../gcc.target/{i386 => powerpc}/sse2-pminsw-1.c | 11 +- .../gcc.target/{i386 => powerpc}/sse2-pminub-1.c | 11 +- gcc/testsuite/gcc.target/powerpc/sse2-pmovmskb-1.c | 57 + .../gcc.target/{i386 => powerpc}/sse2-pmulhuw-1.c | 11 +- gcc/testsuite/gcc.target/powerpc/sse2-pmulhw-1.c | 60 + .../gcc.target/{i386 => powerpc}/sse2-pmullw-1.c | 14 +- gcc/testsuite/gcc.target/powerpc/sse2-pmuludq-1.c | 53 + gcc/testsuite/gcc.target/powerpc/sse2-psadbw-1.c | 69 + .../gcc.target/{i386 => powerpc}/sse2-pshufd-1.c | 22 +- gcc/testsuite/gcc.target/powerpc/sse2-pshufhw-1.c | 65 + gcc/testsuite/gcc.target/powerpc/sse2-pshuflw-1.c | 65 + .../gcc.target/{i386 => powerpc}/sse2-pslld-1.c | 11 +- gcc/testsuite/gcc.target/powerpc/sse2-pslld-2.c | 55 + gcc/testsuite/gcc.target/powerpc/sse2-pslldq-1.c | 65 + .../gcc.target/{i386 => powerpc}/sse2-psllq-1.c | 15 +- .../gcc.target/{i386 => powerpc}/sse2-psllq-2.c | 16 +- .../gcc.target/{i386 => powerpc}/sse2-psllw-1.c | 11 +- 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gcc/testsuite/gcc.target/powerpc/sse2-psubusb-1.c | 74 + .../sse2-paddusw-1.c => powerpc/sse2-psubusw-1.c} | 16 +- .../gcc.target/{i386 => powerpc}/sse2-psubw-1.c | 12 +- .../{i386 => powerpc}/sse2-punpckhbw-1.c | 12 +- .../{i386 => powerpc}/sse2-punpckhdq-1.c | 12 +- .../{i386 => powerpc}/sse2-punpckhqdq-1.c | 12 +- .../{i386 => powerpc}/sse2-punpckhwd-1.c | 12 +- .../{i386 => powerpc}/sse2-punpcklbw-1.c | 12 +- .../{i386 => powerpc}/sse2-punpckldq-1.c | 12 +- .../{i386 => powerpc}/sse2-punpcklqdq-1.c | 12 +- .../{i386 => powerpc}/sse2-punpcklwd-1.c | 12 +- .../gcc.target/{i386 => powerpc}/sse2-shufpd-1.c | 11 +- .../gcc.target/{i386 => powerpc}/sse2-sqrtpd-1.c | 22 +- .../gcc.target/{i386 => powerpc}/sse2-subpd-1.c | 12 +- .../gcc.target/{i386 => powerpc}/sse2-subsd-1.c | 21 +- .../gcc.target/{i386 => powerpc}/sse2-ucomisd-1.c | 11 +- .../gcc.target/{i386 => powerpc}/sse2-ucomisd-2.c | 11 +- .../gcc.target/{i386 => powerpc}/sse2-ucomisd-3.c | 11 +- .../gcc.target/{i386 => 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libsanitizer/asan/asan_mac.cc | 36 +- libsanitizer/asan/asan_malloc_linux.cc | 72 +- libsanitizer/asan/asan_malloc_win.cc | 7 +- libsanitizer/asan/asan_mapping.h | 16 +- libsanitizer/asan/asan_memory_profile.cc | 92 +- libsanitizer/asan/asan_new_delete.cc | 73 +- libsanitizer/asan/asan_poisoning.cc | 11 +- libsanitizer/asan/asan_poisoning.h | 11 +- libsanitizer/asan/asan_posix.cc | 68 +- libsanitizer/asan/asan_report.cc | 130 +- libsanitizer/asan/asan_report.h | 4 +- libsanitizer/asan/asan_rtl.cc | 153 +- libsanitizer/asan/asan_scariness_score.h | 2 +- libsanitizer/asan/asan_shadow_setup.cc | 159 + libsanitizer/asan/asan_stack.h | 4 - libsanitizer/asan/asan_suppressions.cc | 12 +- libsanitizer/asan/asan_thread.cc | 60 +- libsanitizer/asan/asan_thread.h | 34 +- libsanitizer/asan/asan_win.cc | 151 +- libsanitizer/asan/asan_win_dll_thunk.cc | 473 +-- .../asan/asan_win_dynamic_runtime_thunk.cc | 44 +- libsanitizer/asan/asan_win_weak_interception.cc | 21 + libsanitizer/asan/libtool-version | 2 +- libsanitizer/builtins/assembly.h | 57 +- libsanitizer/include/sanitizer/asan_interface.h | 4 + .../include/sanitizer/common_interface_defs.h | 11 +- .../include/sanitizer/coverage_interface.h | 40 +- libsanitizer/include/sanitizer/lsan_interface.h | 6 + libsanitizer/include/sanitizer/tsan_interface.h | 136 + libsanitizer/interception/interception.h | 41 +- libsanitizer/interception/interception_linux.cc | 13 +- libsanitizer/interception/interception_linux.h | 4 +- libsanitizer/interception/interception_win.cc | 24 +- libsanitizer/lsan/Makefile.am | 11 +- libsanitizer/lsan/Makefile.in | 77 +- libsanitizer/lsan/lsan.cc | 17 + libsanitizer/lsan/lsan.h | 51 +- libsanitizer/lsan/lsan_allocator.cc | 109 +- libsanitizer/lsan/lsan_allocator.h | 57 + libsanitizer/lsan/lsan_common.cc | 253 +- libsanitizer/lsan/lsan_common.h | 83 +- libsanitizer/lsan/lsan_common_linux.cc | 104 +- libsanitizer/lsan/lsan_common_mac.cc | 197 ++ libsanitizer/lsan/lsan_interceptors.cc | 236 +- libsanitizer/lsan/lsan_linux.cc | 31 + libsanitizer/lsan/lsan_mac.cc | 190 ++ libsanitizer/lsan/lsan_malloc_mac.cc | 53 + libsanitizer/lsan/lsan_thread.cc | 21 +- libsanitizer/lsan/lsan_thread.h | 2 +- libsanitizer/sanitizer_common/Makefile.am | 9 +- libsanitizer/sanitizer_common/Makefile.in | 37 +- libsanitizer/sanitizer_common/sancov_flags.cc | 57 + libsanitizer/sanitizer_common/sancov_flags.h | 38 + libsanitizer/sanitizer_common/sancov_flags.inc | 19 + .../sanitizer_common/sanitizer_addrhashmap.h | 12 + .../sanitizer_common/sanitizer_allocator.cc | 59 +- .../sanitizer_common/sanitizer_allocator.h | 29 +- ..._allocator.cc => sanitizer_allocator_checks.cc} | 16 +- .../sanitizer_common/sanitizer_allocator_checks.h | 73 + .../sanitizer_allocator_combined.h | 77 +- .../sanitizer_allocator_interface.h | 9 +- .../sanitizer_allocator_internal.h | 25 +- .../sanitizer_allocator_local_cache.h | 145 +- .../sanitizer_allocator_primary32.h | 78 +- .../sanitizer_allocator_primary64.h | 582 +++- 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| 54 + .../filesystem/path/itr/traversal.cc | 54 +- .../filesystem/path/modifiers/clear.cc | 8 +- .../filesystem/path/modifiers/make_preferred.cc | 10 +- .../filesystem/path/modifiers/remove_filename.cc | 20 +- .../filesystem/path/modifiers/replace_extension.cc | 19 +- .../filesystem/path/modifiers/replace_filename.cc | 18 +- .../filesystem/path/modifiers/swap.cc | 8 +- .../filesystem/path/native/string.cc | 10 +- .../filesystem/path/nonmember/hash_value.cc | 10 +- .../filesystem/path/query/empty.cc | 8 +- .../filesystem/path/query/has_extension.cc | 8 +- .../filesystem/path/query/has_filename.cc | 8 +- .../filesystem/path/query/has_parent_path.cc | 8 +- .../filesystem/path/query/has_relative_path.cc | 8 +- .../filesystem/path/query/has_root_directory.cc | 8 +- .../filesystem/path/query/has_root_name.cc | 8 +- .../filesystem/path/query/has_root_path.cc | 8 +- .../filesystem/path/query/has_stem.cc | 8 +- .../filesystem/path/query/is_relative.cc | 8 +- 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gcc/testsuite/gcc.target/i386/cet-switch-2.c create mode 100644 gcc/testsuite/gcc.target/i386/cet-switch-3.c create mode 100644 gcc/testsuite/gcc.target/i386/gfni-1.c create mode 100644 gcc/testsuite/gcc.target/i386/gfni-2.c create mode 100644 gcc/testsuite/gcc.target/i386/gfni-3.c create mode 100644 gcc/testsuite/gcc.target/i386/gfni-4.c create mode 100644 gcc/testsuite/gcc.target/i386/pr81706.c create mode 100644 gcc/testsuite/gcc.target/i386/pr82002-1.c create mode 100644 gcc/testsuite/gcc.target/i386/pr82002-2a.c create mode 100644 gcc/testsuite/gcc.target/i386/pr82002-2b.c create mode 100644 gcc/testsuite/gcc.target/i386/pr82370.c create mode 100644 gcc/testsuite/gcc.target/i386/pr82460-1.c create mode 100644 gcc/testsuite/gcc.target/i386/pr82460-2.c copy gcc/testsuite/gcc.target/i386/{pr46470.c => pr82499-1.c} (68%) copy gcc/testsuite/gcc.target/i386/{pr46470.c => pr82499-2.c} (67%) copy gcc/testsuite/gcc.target/i386/{pr46470.c => pr82499-3.c} (56%) create mode 100644 gcc/testsuite/gcc.target/i386/pr82556.c create mode 100644 gcc/testsuite/gcc.target/i386/pr82580.c create mode 100644 gcc/testsuite/gcc.target/i386/pr82618.c create mode 100644 gcc/testsuite/gcc.target/i386/pr82628.c create mode 100644 gcc/testsuite/gcc.target/i386/pr82659-1.c create mode 100644 gcc/testsuite/gcc.target/i386/pr82659-2.c create mode 100644 gcc/testsuite/gcc.target/i386/pr82659-3.c create mode 100644 gcc/testsuite/gcc.target/i386/pr82659-4.c create mode 100644 gcc/testsuite/gcc.target/i386/pr82659-5.c create mode 100644 gcc/testsuite/gcc.target/i386/pr82659-6.c create mode 100644 gcc/testsuite/gcc.target/i386/pr82662.c create mode 100644 gcc/testsuite/gcc.target/i386/pr82673.c create mode 100644 gcc/testsuite/gcc.target/i386/pr82795.c create mode 100644 gcc/testsuite/gcc.target/i386/stack-check-12.c copy gcc/testsuite/gcc.target/nios2/{gpopt-local.c => gpopt-gprel-sec.c} (86%) copy gcc/testsuite/gcc.target/nios2/{gpopt-local.c => gpopt-r0rel-sec.c} (77%) create mode 100644 gcc/testsuite/gcc.target/nios2/lo-addr-bypass.c create mode 100644 gcc/testsuite/gcc.target/nios2/lo-addr-char.c create mode 100644 gcc/testsuite/gcc.target/nios2/lo-addr-int.c create mode 100644 gcc/testsuite/gcc.target/nios2/lo-addr-pic.c create mode 100644 gcc/testsuite/gcc.target/nios2/lo-addr-short.c create mode 100644 gcc/testsuite/gcc.target/nios2/lo-addr-tls.c create mode 100644 gcc/testsuite/gcc.target/nios2/lo-addr-uchar.c create mode 100644 gcc/testsuite/gcc.target/nios2/lo-addr-ushort.c create mode 100644 gcc/testsuite/gcc.target/nios2/lo-addr-volatile.c delete mode 100644 gcc/testsuite/gcc.target/powerpc/float128-fma2.c create mode 100644 gcc/testsuite/gcc.target/powerpc/float128-hw2.c create mode 100644 gcc/testsuite/gcc.target/powerpc/float128-hw3.c delete mode 100644 gcc/testsuite/gcc.target/powerpc/float128-sqrt2.c copy gcc/testsuite/gcc.target/powerpc/{fold-vec-abs-char.c => fold-vec-neg-char.c} (50%) create mode 100644 gcc/testsuite/gcc.target/powerpc/fold-vec-neg-floatdouble.c copy gcc/testsuite/gcc.target/powerpc/{fold-vec-abs-int.c => fold-vec-neg-int.c} (50%) copy gcc/testsuite/gcc.target/powerpc/{fold-vec-abs-longlong.c => fold-vec-neg-lon [...] copy gcc/testsuite/gcc.target/powerpc/{fold-vec-abs-short.c => fold-vec-neg-short. [...] copy gcc/testsuite/gcc.target/{i386 => powerpc}/sse2-addpd-1.c (71%) copy gcc/testsuite/gcc.target/{i386 => powerpc}/sse2-addsd-1.c (51%) copy gcc/testsuite/gcc.target/{i386 => powerpc}/sse2-andnpd-1.c (78%) copy gcc/testsuite/gcc.target/{i386 => powerpc}/sse2-andpd-1.c (79%) create mode 100644 gcc/testsuite/gcc.target/powerpc/sse2-check.h create mode 100644 gcc/testsuite/gcc.target/powerpc/sse2-cmppd-1.c copy gcc/testsuite/gcc.target/{i386 => powerpc}/sse2-cmpsd-1.c (71%) copy gcc/testsuite/gcc.target/{i386 => powerpc}/sse2-comisd-1.c (70%) copy gcc/testsuite/gcc.target/{i386 => powerpc}/sse2-comisd-2.c (70%) copy gcc/testsuite/gcc.target/{i386 => powerpc}/sse2-comisd-3.c (70%) copy gcc/testsuite/gcc.target/{i386 => powerpc}/sse2-comisd-4.c (70%) copy gcc/testsuite/gcc.target/{i386 => powerpc}/sse2-comisd-5.c (70%) copy gcc/testsuite/gcc.target/{i386 => powerpc}/sse2-comisd-6.c (70%) create mode 100644 gcc/testsuite/gcc.target/powerpc/sse2-cvtdq2pd-1.c copy gcc/testsuite/gcc.target/{i386 => powerpc}/sse2-cvtdq2ps-1.c (74%) copy gcc/testsuite/gcc.target/{i386 => powerpc}/sse2-cvtpd2dq-1.c (52%) create mode 100644 gcc/testsuite/gcc.target/powerpc/sse2-cvtpd2ps-1.c copy gcc/testsuite/gcc.target/{i386 => powerpc}/sse2-cvtps2dq-1.c (54%) copy gcc/testsuite/gcc.target/{i386 => powerpc}/sse2-cvtps2pd-1.c (52%) copy gcc/testsuite/gcc.target/{i386 => powerpc}/sse2-cvtsd2si-1.c (53%) copy gcc/testsuite/gcc.target/{i386 => powerpc}/sse2-cvtsd2si-2.c (53%) copy gcc/testsuite/gcc.target/{i386 => powerpc}/sse2-cvtsd2ss-1.c (50%) copy gcc/testsuite/gcc.target/{i386 => powerpc}/sse2-cvtsi2sd-1.c (68%) copy gcc/testsuite/gcc.target/{i386 => powerpc}/sse2-cvtsi2sd-2.c (67%) copy gcc/testsuite/gcc.target/{i386 => powerpc}/sse2-cvtss2sd-1.c (52%) copy gcc/testsuite/gcc.target/{i386 => powerpc}/sse2-cvttpd2dq-1.c (51%) copy gcc/testsuite/gcc.target/{i386 => powerpc}/sse2-cvttps2dq-1.c (74%) copy gcc/testsuite/gcc.target/{i386 => powerpc}/sse2-cvttsd2si-1.c (51%) copy gcc/testsuite/gcc.target/{i386 => powerpc}/sse2-cvttsd2si-2.c (65%) copy gcc/testsuite/gcc.target/{i386 => powerpc}/sse2-divpd-1.c (54%) copy gcc/testsuite/gcc.target/{i386 => powerpc}/sse2-divsd-1.c (51%) copy gcc/testsuite/gcc.target/{i386 => powerpc}/sse2-maxpd-1.c (73%) copy gcc/testsuite/gcc.target/{i386 => powerpc}/sse2-maxsd-1.c (54%) copy gcc/testsuite/gcc.target/{i386 => powerpc}/sse2-minpd-1.c (73%) copy gcc/testsuite/gcc.target/{i386 => powerpc}/sse2-minsd-1.c (54%) copy gcc/testsuite/gcc.target/{i386 => powerpc}/sse2-mmx.c (84%) copy gcc/testsuite/gcc.target/{i386 => powerpc}/sse2-movhpd-1.c (70%) copy gcc/testsuite/gcc.target/{i386 => powerpc}/sse2-movhpd-2.c (67%) copy gcc/testsuite/gcc.target/{i386 => powerpc}/sse2-movlpd-1.c (71%) copy gcc/testsuite/gcc.target/{i386 => powerpc}/sse2-movlpd-2.c (67%) copy gcc/testsuite/gcc.target/{i386 => powerpc}/sse2-movmskpd-1.c (51%) create mode 100644 gcc/testsuite/gcc.target/powerpc/sse2-movq-1.c copy gcc/testsuite/gcc.target/{i386 => powerpc}/sse2-movq-2.c (64%) copy gcc/testsuite/gcc.target/{i386 => powerpc}/sse2-movq-3.c (64%) copy gcc/testsuite/gcc.target/{i386 => powerpc}/sse2-movsd-1.c (71%) copy gcc/testsuite/gcc.target/{i386 => powerpc}/sse2-movsd-2.c (70%) create mode 100644 gcc/testsuite/gcc.target/powerpc/sse2-movsd-3.c copy gcc/testsuite/gcc.target/{i386 => powerpc}/sse2-mulpd-1.c (51%) copy gcc/testsuite/gcc.target/{i386 => powerpc}/sse2-mulsd-1.c (53%) copy gcc/testsuite/gcc.target/{i386 => powerpc}/sse2-orpd-1.c (78%) copy gcc/testsuite/gcc.target/{i386 => powerpc}/sse2-packssdw-1.c (57%) create mode 100644 gcc/testsuite/gcc.target/powerpc/sse2-packsswb-1.c create mode 100644 gcc/testsuite/gcc.target/powerpc/sse2-packuswb-1.c copy gcc/testsuite/gcc.target/{i386 => powerpc}/sse2-paddb-1.c (75%) copy gcc/testsuite/gcc.target/{i386 => powerpc}/sse2-paddd-1.c (72%) copy gcc/testsuite/gcc.target/{i386 => powerpc}/sse2-paddq-1.c (72%) create mode 100644 gcc/testsuite/gcc.target/powerpc/sse2-paddsb-1.c create mode 100644 gcc/testsuite/gcc.target/powerpc/sse2-paddsw-1.c create mode 100644 gcc/testsuite/gcc.target/powerpc/sse2-paddusb-1.c copy gcc/testsuite/gcc.target/{i386 => powerpc}/sse2-paddusw-1.c (76%) copy gcc/testsuite/gcc.target/{i386 => powerpc}/sse2-paddw-1.c (73%) copy gcc/testsuite/gcc.target/{i386 => powerpc}/sse2-pavgb-1.c (78%) copy gcc/testsuite/gcc.target/{i386 => powerpc}/sse2-pavgw-1.c (77%) copy gcc/testsuite/gcc.target/{i386 => powerpc}/sse2-pcmpeqb-1.c (78%) copy gcc/testsuite/gcc.target/{i386 => powerpc}/sse2-pcmpeqd-1.c (75%) copy gcc/testsuite/gcc.target/{i386 => powerpc}/sse2-pcmpeqw-1.c (76%) copy gcc/testsuite/gcc.target/{i386 => powerpc}/sse2-pcmpgtb-1.c (78%) copy gcc/testsuite/gcc.target/{i386 => powerpc}/sse2-pcmpgtd-1.c (75%) copy gcc/testsuite/gcc.target/{i386 => powerpc}/sse2-pcmpgtw-1.c (76%) copy gcc/testsuite/gcc.target/{i386/sse4_1-pextrw.c => powerpc/sse2-pextrw.c} (81%) copy gcc/testsuite/gcc.target/{i386 => powerpc}/sse2-pinsrw.c (90%) copy gcc/testsuite/gcc.target/{i386 => powerpc}/sse2-pmaddwd-1.c (75%) copy gcc/testsuite/gcc.target/{i386 => powerpc}/sse2-pmaxsw-1.c (75%) copy gcc/testsuite/gcc.target/{i386 => powerpc}/sse2-pmaxub-1.c (77%) copy gcc/testsuite/gcc.target/{i386 => powerpc}/sse2-pminsw-1.c (75%) copy gcc/testsuite/gcc.target/{i386 => powerpc}/sse2-pminub-1.c (77%) create mode 100644 gcc/testsuite/gcc.target/powerpc/sse2-pmovmskb-1.c copy gcc/testsuite/gcc.target/{i386 => powerpc}/sse2-pmulhuw-1.c (78%) create mode 100644 gcc/testsuite/gcc.target/powerpc/sse2-pmulhw-1.c copy gcc/testsuite/gcc.target/{i386 => powerpc}/sse2-pmullw-1.c (72%) create mode 100644 gcc/testsuite/gcc.target/powerpc/sse2-pmuludq-1.c create mode 100644 gcc/testsuite/gcc.target/powerpc/sse2-psadbw-1.c copy gcc/testsuite/gcc.target/{i386 => powerpc}/sse2-pshufd-1.c (50%) create mode 100644 gcc/testsuite/gcc.target/powerpc/sse2-pshufhw-1.c create mode 100644 gcc/testsuite/gcc.target/powerpc/sse2-pshuflw-1.c copy gcc/testsuite/gcc.target/{i386 => powerpc}/sse2-pslld-1.c (74%) create mode 100644 gcc/testsuite/gcc.target/powerpc/sse2-pslld-2.c create mode 100644 gcc/testsuite/gcc.target/powerpc/sse2-pslldq-1.c copy gcc/testsuite/gcc.target/{i386 => powerpc}/sse2-psllq-1.c (69%) copy gcc/testsuite/gcc.target/{i386 => powerpc}/sse2-psllq-2.c (68%) copy gcc/testsuite/gcc.target/{i386 => powerpc}/sse2-psllw-1.c (75%) copy gcc/testsuite/gcc.target/{i386 => powerpc}/sse2-psllw-2.c (73%) copy gcc/testsuite/gcc.target/{i386 => powerpc}/sse2-psrad-1.c (74%) copy gcc/testsuite/gcc.target/{i386 => powerpc}/sse2-psrad-2.c (73%) copy gcc/testsuite/gcc.target/{i386 => powerpc}/sse2-psraw-1.c (75%) copy gcc/testsuite/gcc.target/{i386 => powerpc}/sse2-psraw-2.c (73%) create mode 100644 gcc/testsuite/gcc.target/powerpc/sse2-psrld-1.c create mode 100644 gcc/testsuite/gcc.target/powerpc/sse2-psrld-2.c create mode 100644 gcc/testsuite/gcc.target/powerpc/sse2-psrldq-1.c copy gcc/testsuite/gcc.target/{i386 => powerpc}/sse2-psrlq-1.c (71%) copy gcc/testsuite/gcc.target/{i386 => powerpc}/sse2-psrlq-2.c (69%) copy gcc/testsuite/gcc.target/{i386 => powerpc}/sse2-psrlw-1.c (77%) copy gcc/testsuite/gcc.target/{i386 => powerpc}/sse2-psrlw-2.c (75%) copy gcc/testsuite/gcc.target/{i386 => powerpc}/sse2-psubb-1.c (75%) copy gcc/testsuite/gcc.target/{i386 => powerpc}/sse2-psubd-1.c (72%) copy gcc/testsuite/gcc.target/{i386 => powerpc}/sse2-psubq-1.c (72%) copy gcc/testsuite/gcc.target/{i386 => powerpc}/sse2-psubsb-1.c (72%) copy gcc/testsuite/gcc.target/{i386 => powerpc}/sse2-psubsw-1.c (77%) create mode 100644 gcc/testsuite/gcc.target/powerpc/sse2-psubusb-1.c copy gcc/testsuite/gcc.target/{i386/sse2-paddusw-1.c => powerpc/sse2-psubusw-1.c} (67%) copy gcc/testsuite/gcc.target/{i386 => powerpc}/sse2-psubw-1.c (73%) copy gcc/testsuite/gcc.target/{i386 => powerpc}/sse2-punpckhbw-1.c (75%) copy gcc/testsuite/gcc.target/{i386 => powerpc}/sse2-punpckhdq-1.c (73%) copy gcc/testsuite/gcc.target/{i386 => powerpc}/sse2-punpckhqdq-1.c (70%) copy gcc/testsuite/gcc.target/{i386 => powerpc}/sse2-punpckhwd-1.c (74%) copy gcc/testsuite/gcc.target/{i386 => powerpc}/sse2-punpcklbw-1.c (75%) copy gcc/testsuite/gcc.target/{i386 => powerpc}/sse2-punpckldq-1.c (73%) copy gcc/testsuite/gcc.target/{i386 => powerpc}/sse2-punpcklqdq-1.c (70%) copy gcc/testsuite/gcc.target/{i386 => powerpc}/sse2-punpcklwd-1.c (74%) copy gcc/testsuite/gcc.target/{i386 => powerpc}/sse2-shufpd-1.c (77%) copy gcc/testsuite/gcc.target/{i386 => powerpc}/sse2-sqrtpd-1.c (54%) copy gcc/testsuite/gcc.target/{i386 => powerpc}/sse2-subpd-1.c (71%) copy gcc/testsuite/gcc.target/{i386 => powerpc}/sse2-subsd-1.c (53%) copy gcc/testsuite/gcc.target/{i386 => powerpc}/sse2-ucomisd-1.c (74%) copy gcc/testsuite/gcc.target/{i386 => powerpc}/sse2-ucomisd-2.c (74%) copy gcc/testsuite/gcc.target/{i386 => powerpc}/sse2-ucomisd-3.c (74%) copy gcc/testsuite/gcc.target/{i386 => powerpc}/sse2-ucomisd-4.c (74%) copy gcc/testsuite/gcc.target/{i386 => powerpc}/sse2-ucomisd-5.c (74%) copy gcc/testsuite/gcc.target/{i386 => powerpc}/sse2-ucomisd-6.c (74%) copy gcc/testsuite/gcc.target/{i386 => powerpc}/sse2-unpckhpd-1.c (71%) copy gcc/testsuite/gcc.target/{i386 => powerpc}/sse2-unpcklpd-1.c (71%) copy gcc/testsuite/gcc.target/{i386 => powerpc}/sse2-xorpd-1.c (79%) create mode 100644 gcc/testsuite/gfortran.dg/allocate_error_7.f90 create mode 100644 gcc/testsuite/gfortran.dg/array_constructor_51.f90 create mode 100644 gcc/testsuite/gfortran.dg/assumed_size_2.f90 create mode 100644 gcc/testsuite/gfortran.dg/class_63.f90 create mode 100644 gcc/testsuite/gfortran.dg/class_64.f90 create mode 100644 gcc/testsuite/gfortran.dg/dec_structure_22.f90 create mode 100644 gcc/testsuite/gfortran.dg/derived_init_4.f90 create mode 100644 gcc/testsuite/gfortran.dg/equiv_pure.f90 create mode 100644 gcc/testsuite/gfortran.dg/gomp/pr82568.f90 create mode 100644 gcc/testsuite/gfortran.dg/graphite/pr82672.f90 create mode 100644 gcc/testsuite/gfortran.dg/illegal_char.f90 create mode 100644 gcc/testsuite/gfortran.dg/matmul_const.f90 create mode 100644 gcc/testsuite/gfortran.dg/pdt_16.f03 create mode 100644 gcc/testsuite/gfortran.dg/pdt_17.f03 create mode 100644 gcc/testsuite/gfortran.dg/pdt_18.f03 create mode 100644 gcc/testsuite/gfortran.dg/pr81735.f90 create mode 100644 gcc/testsuite/gfortran.dg/spellcheck-operator.f90 create mode 100644 gcc/testsuite/gfortran.dg/spellcheck-parameter.f90 create mode 100644 gcc/testsuite/gfortran.dg/spellcheck-procedure_1.f90 create mode 100644 gcc/testsuite/gfortran.dg/spellcheck-procedure_2.f90 create mode 100644 gcc/testsuite/gfortran.dg/spellcheck-structure.f90 create mode 100644 gcc/testsuite/gfortran.dg/submodule_30.f08 create mode 100644 gcc/testsuite/gnat.dg/default_pkg_actual.adb create mode 100644 gcc/testsuite/gnat.dg/default_pkg_actual2.adb create mode 100644 gcc/testsuite/gnat.dg/dimensions.adb create mode 100644 gcc/testsuite/gnat.dg/dimensions.ads create mode 100644 gcc/testsuite/gnat.dg/opt68.adb create mode 100644 gcc/testsuite/gnat.dg/opt68.ads create mode 100644 gcc/testsuite/gnat.dg/remote_call_iface.adb create mode 100644 gcc/testsuite/gnat.dg/remote_call_iface.ads rename gcc/testsuite/gnat.dg/specs/{discr_private.ads => discr2.ads} (96%) rename gcc/testsuite/gnat.dg/specs/{discr_record_constant.ads => discr3.ads} (88%) create mode 100644 gcc/testsuite/gnat.dg/specs/discr4.ads create mode 100644 gcc/testsuite/gnat.dg/specs/discr4_pkg.ads create mode 100644 gcc/testsuite/gnat.dg/stack_usage4.adb create mode 100644 gcc/testsuite/gnat.dg/stack_usage4_pkg.ads create mode 100644 gcc/testsuite/gnat.dg/sync_iface_call.adb create mode 100644 gcc/testsuite/gnat.dg/sync_iface_call_pkg.ads create mode 100644 gcc/testsuite/gnat.dg/sync_iface_call_pkg2.adb create mode 100644 gcc/testsuite/gnat.dg/sync_iface_call_pkg2.ads create mode 100644 gcc/unique-ptr-tests.cc create mode 100644 include/unique-ptr.h create mode 100644 libgcc/config/arc/linux-unwind-reg.def create mode 100644 libgcc/config/arc/linux-unwind.h copy libgcc/config/{msp430/epilogue.S => rl78/adddi3.S} (50%) copy libgcc/config/{msp430/epilogue.S => rl78/subdi3.S} (50%) create mode 100644 libsanitizer/asan/asan_fuchsia.cc create mode 100644 libsanitizer/asan/asan_globals_win.cc create mode 100644 libsanitizer/asan/asan_interceptors_memintrinsics.cc create mode 100644 libsanitizer/asan/asan_interceptors_memintrinsics.h create mode 100644 libsanitizer/asan/asan_interface.inc create mode 100644 libsanitizer/asan/asan_shadow_setup.cc create mode 100644 libsanitizer/asan/asan_win_weak_interception.cc create mode 100644 libsanitizer/include/sanitizer/tsan_interface.h create mode 100644 libsanitizer/lsan/lsan_common_mac.cc create mode 100644 libsanitizer/lsan/lsan_linux.cc create mode 100644 libsanitizer/lsan/lsan_mac.cc create mode 100644 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