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from 2b9844300c7 [RS4GC] Handle call/invoke instructions as base defining va [...] new 517ef8d874c [AArch64] Add pipeline model for Exynos M3 new 863055450d3 [AArch64] Add new target feature to handle cheap as move fo [...] new 1febf59617e [AArch64] Update test cases for Exynos M3

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Summary of changes: lib/Target/AArch64/AArch64.td | 20 +- lib/Target/AArch64/AArch64InstrInfo.cpp | 39 +- lib/Target/AArch64/AArch64InstrInfo.h | 3 + lib/Target/AArch64/AArch64SchedExynosM3.td | 843 +++++++++++++++++++++ lib/Target/AArch64/AArch64Subtarget.cpp | 6 + lib/Target/AArch64/AArch64Subtarget.h | 3 + test/CodeGen/AArch64/arm64-ldp-cluster.ll | 69 +- test/CodeGen/AArch64/arm64-neon-2velem.ll | 59 ++ test/CodeGen/AArch64/machine-combiner-madd.ll | 1 + test/CodeGen/AArch64/max-jump-table.ll | 11 +- test/CodeGen/AArch64/misched-fusion-aes.ll | 1 + test/CodeGen/AArch64/misched-fusion-lit.ll | 1 + test/CodeGen/AArch64/no-quad-ldp-stp.ll | 19 +- .../AArch64/preferred-function-alignment.ll | 3 +- 14 files changed, 1023 insertions(+), 55 deletions(-) create mode 100644 lib/Target/AArch64/AArch64SchedExynosM3.td