This is an automated email from the git hooks/post-receive script.

"tcwg-buildslave pushed a change to branch linaro-local/ci/llvm-kernel-armv8l-tested in repository toolchain/ci/llvm-monorepo.

from dfe8ac29f431 [RISCV] Codegen for i8, i16, and i32 atomicrmw with RV32A adds 30446dea5747 [ADT][BitVector] Add push_back() adds f1772b8905ce [TableGen] CodeGenDAGPatterns::GenerateVariants - use BitV [...] adds cfb497545187 Verify commit access in fixing typo adds 06ebaf201396 [clang-tidy] run-clang-tidy.py - fails using python 3.7 Di [...] adds 208ff088082e [compiler-rt][TSan] Add TSan runtime support for Go on lin [...] adds 52b12941d4c0 [InstCombine] Don't transform sin/cos -> tanl if for half types adds 9439b424666b [TableGen] CodeGenDAGPatterns::GenerateVariants - use BitV [...] adds fcfb351ce8a1 [New PM] Introducing PassInstrumentation framework adds 681159338261 [ARM] Fix unwind information for floating point registers adds d90f95f105a5 [InstCombine] foldICmpWithLowBitMaskedVal(): handle ~(-1 [...] adds 5f4f57fe034a [InstCombine] foldICmpWithLowBitMaskedVal(): handle uncano [...] adds dad7f20f3725 [InstCombine] foldICmpWithLowBitMaskedVal(): handle uncano [...] adds 0fac52411f19 [benchmark] Cherrypick fix for MinGW/ARM from upstream adds 8a3737159b5f [AtomicExpandPass]: Add a hook for custom cmpxchg expansion in IR adds ec5c66d935e0 Fix -Wsign-compare warnings. NFCI adds a2e6c7d740c5 Revert rL342544: [New PM] Introducing PassInstrumentation [...] adds 24571a19e5e5 [UBSan] Fix typo in CMake conditional that checked if the [...] adds 94a779c5233c [DAGCombiner][x86] add transform/hook to decompose integer [...] adds 8db34ed80260 [TableGen][SubtargetEmitter] Add the ability for processor [...] adds ddf1a7b3da52 [bpf] Symbol sizes and types in object file adds a49d42dab8d8 Basic: correct `__WINT_TYPE__` on Windows adds 9fce1e19df4a [AMDGPU] Add instruction selection for i1 to f16 conversion adds 674eac5b9f72 Don't require relops on variant alternatives to all return [...] adds 12042ec85972 Attempt to unbreak buidlbot lld-x86_64-darwin13 after r342555. adds 2e597b3613cc [analyzer] Fix nullptr access when processing instantiated [...] adds 795e5ce85525 [DataFormatters] Add formatter for C++17 std::variant adds 73c953ac3bd4 [X86] Add initial SimplifyDemandedVectorEltsForTargetNode support adds 24aaeceaee60 Sema: handle `wint_t` more carefully for printf checking adds b08a5f0f3796 Implement LWG 2221 - No formatted output operator for null [...] adds 3807bfb01851 [LLJIT] Add API to expose linking layer from LLJIT classes adds 2d70f394c293 redirecting to llvm.org/devmtg adds e68cb0d41761 test: improve condition for the check adds bf419ec383d4 [mips][microMIPS] Fix the definition of MOVEP instruction adds 26827763f399 [mips][microMIPS] Extending size reduction pass with MOVEP adds ac4f73a51826 [ThinLTO] Extract getReferencedTypeIds from [NFC] adds 9081a9240444 [ThinLTO] Write TYPE_IDs for types used in functions impor [...] adds ad2c1b97eba0 [x86] change names of vector splitting helper functions; NFC adds 36cb54aa6b6c Copy utilities updated and added for MI flags adds 66aad91e9555 [X86] Handle COPYs of physregs better (regalloc hints) adds 3093507cc26f test: actually fix the condition properly adds c1f51e1dcdf9 [InstCombine] Disable strcmp->memcmp transform for MSan. adds 34a7ea34c674 [ARM] Refactor Exynos feature set (NFC) adds 1ba7be753ce4 [sanitizer][fuchsia] Fix VMAR leak adds f4499dcdfd59 [ARM] Adjust the feature set for Exynos adds 518bbd072735 [NFC] Declare instead of define non-void functions in unit tests. adds 6f92cbc1c088 Workaround a limitation of llvm::Any when used with types [...] adds b8e09a78679a MachineScheduler: Add -misched-print-dags flag adds 802b662be74c AArch64: Add FuseCryptoEOR fusion rules adds 1c19d470dda8 [x86] add test for add+not vector fold; NFC adds 39bd426770e4 Fix the build when LLVM_TARGETS_TO_BUILD is empty. adds d03325ba4015 [SelectionDAG] allow vector types with isBitwiseNot() adds 60561f36e771 [x86] add test for 256-bit andn (PR37749); NFC adds a0fb1d8ee59f Revert "[XRay][compiler-rt] FDRLogWriter Abstraction" and 1 more. adds a413e525248b [New PM] Introducing PassInstrumentation framework adds f57cdf56aa6b [WEB] add new flags to a DebugInfo lit test adds cfdc01ad1dc9 Revert "Implement LWG 2221 - No formatted output operator [...] adds edbb0d749095 Thread safety analysis: Handle ObjCIvarRefExpr in SExprBui [...] adds 588c5925d542 [Clang-tidy] Alphabetical sort of files/checks. Add space [...] adds a29cafa3d112 [PPC64] Optimize redundant instructions in global access s [...] adds fd5c6ebf0fc4 [PPC64] Helper for offset from a function's global entry t [...] adds 7c684861a0d4 [PPC64] Handle ppc64le triple in getBitcodeMachineKind. adds 7d2cf6756ab9 Thread Safety Analysis: warnings for attributes without arguments adds 41455d465fd2 [builtins] Add __emutls_unregister_key function adds bb8e70c00e81 Fix diagnostic regex in variant tests to tolerate older cl [...] adds 655f7b4ac5da [WebAssembly] Renumber SIMD ops adds 29bae3ee61a2 [PowerPC] Fix the assert of combineBVOfConsecutiveLoads wh [...] adds a5ab8908bd0d [unittests] Do not use llvm::sort in googlemock adds 875712f3aa4e [PowerPC] [Clang] Add vector int128 pack/unpack builtins adds aa80795b5819 Fix for bug 34002 - label generated before it block is fin [...] adds bf17e256c958 Temporarily Revert "[New PM] Introducing PassInstrumentati [...] adds 2f6fea700168 [XRay][compiler-rt] FDRLogWriter Abstraction adds 8de0fb881888 [MachineVerifier] Relax checkLivenessAtDef regarding dead [...] adds f5595501b9f6 Improve the doc about the initial commit email sent to the ML adds f11918d4d653 [NFC][x86][AArch64] Add BEXTR-like test patterns. adds 8e4fb10a83fd refresh the libc++ homepage adds 7fef8c983025 add a quick link to libc++abi adds 4b76547e4d5a add a quick link to libc++ adds 2bedb086c191 fix some typos in the doc adds 5a132f39efe0 [RISCV][MC] Improve parsing of jal/j operands adds 9ce073ea8be6 [IR] Add a boolean field in DILocation to know if a line m [...] adds 0415fa7fb717 [IPSCCP] Fix a problem with removing labels in a switch wi [...] adds 8f5ae7ff84ee [NFC] Turn "load dependent files" boolean into an enum adds 99f82c8ce150 [target] Change target create's behavior wrt loading depen [...] adds 56794ca34fae [DWARF] - Emit the correct value for DW_AT_addr_base. adds 27bd32038e2b FileCheckify test/Driver/Xarch.c adds e416aa6b8e5c [ADT] Try again to use the same version of llvm::Optional [...] adds 282125141f3b [OpenCL] Diagnose redundant address space conversion adds f5fad4938730 Fix line-endings. NFCI.

No new revisions were added by this update.

Summary of changes: .../clang-tidy/abseil/AbseilTidyModule.cpp | 4 +- clang-tools-extra/clang-tidy/abseil/CMakeLists.txt | 2 +- clang-tools-extra/clang-tidy/add_new_check.py | 8 +- .../clang-tidy/android/AndroidTidyModule.cpp | 6 +- .../clang-tidy/android/CMakeLists.txt | 2 +- .../clang-tidy/cppcoreguidelines/CMakeLists.txt | 2 +- clang-tools-extra/clang-tidy/hicpp/CMakeLists.txt | 2 +- clang-tools-extra/clang-tidy/misc/CMakeLists.txt | 4 +- .../clang-tidy/misc/MiscTidyModule.cpp | 6 +- .../clang-tidy/modernize/CMakeLists.txt | 2 +- .../clang-tidy/readability/CMakeLists.txt | 2 +- .../clang-tidy/tool/run-clang-tidy.py | 6 +- .../clang/Analysis/Analyses/ThreadSafetyCommon.h | 2 + clang/include/clang/Basic/BuiltinsPPC.def | 4 + clang/include/clang/Basic/DiagnosticSemaKinds.td | 12 + clang/lib/Analysis/ExprMutationAnalyzer.cpp | 2 +- clang/lib/Analysis/FormatString.cpp | 10 +- clang/lib/Analysis/ThreadSafetyCommon.cpp | 21 +- clang/lib/Basic/Targets/OSTargets.h | 1 + clang/lib/CodeGen/CGBuiltin.cpp | 22 + clang/lib/Sema/SemaChecking.cpp | 19 + clang/lib/Sema/SemaDeclAttr.cpp | 60 +- clang/test/CodeGen/builtins-ppc-error.c | 6 + clang/test/CodeGen/builtins-ppc-p7-disabled.c | 8 + clang/test/CodeGen/builtins-ppc-vsx.c | 29 + clang/test/Driver/Xarch.c | 19 +- clang/test/Preprocessor/init.c | 6 +- clang/test/Preprocessor/woa-defaults.c | 2 +- clang/test/Sema/attr-capabilities.c | 14 +- clang/test/Sema/format-strings-ms.c | 2 +- clang/test/Sema/format-strings.c | 4 + clang/test/SemaCXX/warn-thread-safety-parsing.cpp | 82 +- .../test/SemaObjCXX/warn-thread-safety-analysis.mm | 44 + clang/test/SemaOpenCL/to_addr_builtin.cl | 4 +- .../Analysis/ExprMutationAnalyzerTest.cpp | 42 +- clang/www/clang_video-05-25-2007.html | 16 +- clang/www/clang_video-07-25-2007.html | 19 +- compiler-rt/cmake/Modules/CompilerRTUtils.cmake | 6 +- compiler-rt/cmake/config-ix.cmake | 1 - compiler-rt/lib/builtins/emutls.c | 13 + .../lib/sanitizer_common/sanitizer_fuchsia.cc | 22 +- compiler-rt/lib/tsan/CMakeLists.txt | 9 + compiler-rt/lib/tsan/go/buildgo.sh | 13 +- compiler-rt/lib/tsan/rtl/tsan_platform.h | 44 + compiler-rt/lib/tsan/rtl/tsan_platform_linux.cc | 8 + compiler-rt/lib/xray/tests/CMakeLists.txt | 14 +- compiler-rt/test/ubsan/CMakeLists.txt | 2 +- libcxx/docs/DesignDocs/CapturingConfigInfo.rst | 2 +- libcxx/docs/DesignDocs/VisibilityMacros.rst | 6 +- libcxx/docs/conf.py | 2 +- libcxx/docs/index.rst | 6 +- libcxx/include/variant | 22 +- .../variant/variant.relops/relops.pass.cpp | 107 +- .../variant.relops/relops_bool_conv.fail.cpp | 88 + libcxx/www/index.html | 12 +- libcxxabi/www/index.html | 1 + lld/ELF/Arch/PPC64.cpp | 98 +- lld/ELF/Config.h | 1 + lld/ELF/Driver.cpp | 6 + lld/ELF/InputFiles.cpp | 1 + lld/ELF/InputSection.cpp | 16 +- lld/ELF/Options.td | 4 + lld/ELF/Target.h | 9 + lld/test/ELF/Inputs/ppc64le-quadword-ldst.o | Bin 0 -> 1032 bytes lld/test/ELF/lto/ppc64le.ll | 12 + lld/test/ELF/ppc64-func-entry-points.s | 2 +- lld/test/ELF/ppc64-got-indirect.s | 4 +- lld/test/ELF/ppc64-relocs.s | 6 +- lld/test/ELF/ppc64-toc-addis-nop-lqsq.s | 73 + lld/test/ELF/ppc64-toc-addis-nop.s | 272 + lld/test/ELF/ppc64-tocopt-option.s | 14 + lldb/include/lldb/Target/Target.h | 19 +- lldb/include/lldb/Target/TargetList.h | 11 +- lldb/lldb.xcodeproj/project.pbxproj | 8 + .../data-formatter-stl/libcxx/variant/Makefile | 7 + .../variant/TestDataFormatterLibcxxVariant.py | 81 + .../data-formatter-stl/libcxx/variant/main.cpp | 60 + .../functionalities/target_create_deps/Makefile | 16 + .../target_create_deps/TestTargetCreateDeps.py | 96 + .../test/functionalities/target_create_deps/a.cpp | 13 + .../test/functionalities/target_create_deps/a.mk | 9 + .../functionalities/target_create_deps/main.cpp | 17 + lldb/source/API/SBDebugger.cpp | 13 +- lldb/source/Commands/CommandObjectProcess.cpp | 2 +- lldb/source/Commands/CommandObjectTarget.cpp | 86 +- lldb/source/Core/DynamicLoader.cpp | 3 +- .../Darwin-Kernel/DynamicLoaderDarwinKernel.cpp | 2 +- .../Hexagon-DYLD/DynamicLoaderHexagonDYLD.cpp | 3 +- .../MacOSX-DYLD/DynamicLoaderDarwin.cpp | 3 +- .../MacOSX-DYLD/DynamicLoaderMacOSXDYLD.cpp | 3 +- .../POSIX-DYLD/DynamicLoaderPOSIXDYLD.cpp | 2 +- .../Plugins/Language/CPlusPlus/CMakeLists.txt | 1 + .../Language/CPlusPlus/CPlusPlusLanguage.cpp | 10 + lldb/source/Plugins/Language/CPlusPlus/LibCxx.h | 4 + .../Plugins/Language/CPlusPlus/LibCxxVariant.cpp | 256 + .../Plugins/Language/CPlusPlus/LibCxxVariant.h | 31 + .../Plugins/Platform/FreeBSD/PlatformFreeBSD.cpp | 6 +- .../Plugins/Platform/Linux/PlatformLinux.cpp | 4 +- .../Plugins/Platform/NetBSD/PlatformNetBSD.cpp | 4 +- .../Plugins/Platform/POSIX/PlatformPOSIX.cpp | 4 +- .../Plugins/Platform/Windows/PlatformWindows.cpp | 4 +- .../gdb-server/PlatformRemoteGDBServer.cpp | 8 +- .../Plugins/Process/MacOSX-Kernel/ProcessKDP.cpp | 2 +- .../Plugins/Process/elf-core/ProcessElfCore.cpp | 2 +- .../Process/gdb-remote/ProcessGDBRemote.cpp | 2 +- lldb/source/Target/Platform.cpp | 4 +- lldb/source/Target/Process.cpp | 3 +- lldb/source/Target/Target.cpp | 20 +- lldb/source/Target/TargetList.cpp | 18 +- lldb/tools/lldb-test/lldb-test.cpp | 7 +- llvm/docs/DeveloperPolicy.rst | 4 +- llvm/docs/SourceLevelDebugging.rst | 15 + llvm/include/llvm/ADT/Any.h | 10 + llvm/include/llvm/ADT/BitVector.h | 17 + llvm/include/llvm/ADT/Optional.h | 2 - llvm/include/llvm/ADT/SmallBitVector.h | 5 + llvm/include/llvm/CodeGen/MachineInstr.h | 3 + llvm/include/llvm/CodeGen/TargetLowering.h | 28 +- llvm/include/llvm/CodeGen/TargetSubtargetInfo.h | 26 + llvm/include/llvm/ExecutionEngine/Orc/LLJIT.h | 3 + llvm/include/llvm/IR/DebugInfoMetadata.h | 33 +- llvm/include/llvm/IR/DebugLoc.h | 7 +- llvm/include/llvm/IR/Metadata.h | 6 +- llvm/include/llvm/MC/MCInstrAnalysis.h | 49 +- llvm/include/llvm/MC/MCParser/MCTargetAsmParser.h | 3 + llvm/include/llvm/Target/TargetInstrPredicate.td | 98 + llvm/lib/AsmParser/LLParser.cpp | 11 +- llvm/lib/Bitcode/Reader/BitcodeReader.cpp | 3 +- llvm/lib/Bitcode/Reader/MetadataLoader.cpp | 6 +- llvm/lib/Bitcode/Writer/BitcodeWriter.cpp | 51 +- llvm/lib/CodeGen/AsmPrinter/AddressPool.cpp | 12 +- llvm/lib/CodeGen/AsmPrinter/AddressPool.h | 6 + llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp | 12 +- llvm/lib/CodeGen/AsmPrinter/DwarfUnit.cpp | 7 + llvm/lib/CodeGen/AsmPrinter/DwarfUnit.h | 3 + llvm/lib/CodeGen/AtomicExpandPass.cpp | 38 +- llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp | 7 +- llvm/lib/CodeGen/MachineInstr.cpp | 36 + llvm/lib/CodeGen/MachineScheduler.cpp | 7 +- llvm/lib/CodeGen/MachineVerifier.cpp | 32 +- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 30 +- llvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp | 9 + llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 5 +- llvm/lib/IR/AsmWriter.cpp | 2 + llvm/lib/IR/DebugInfoMetadata.cpp | 19 +- llvm/lib/IR/DebugLoc.cpp | 17 +- llvm/lib/IR/LLVMContextImpl.h | 13 +- llvm/lib/MC/MCInstrAnalysis.cpp | 5 - llvm/lib/MC/MCParser/AsmParser.cpp | 2 + llvm/lib/Target/AArch64/AArch64.td | 5 + llvm/lib/Target/AArch64/AArch64ISelLowering.cpp | 10 +- llvm/lib/Target/AArch64/AArch64ISelLowering.h | 3 +- llvm/lib/Target/AArch64/AArch64MacroFusion.cpp | 20 + llvm/lib/Target/AArch64/AArch64Subtarget.cpp | 2 +- llvm/lib/Target/AArch64/AArch64Subtarget.h | 2 + llvm/lib/Target/AMDGPU/SIInstructions.td | 10 + llvm/lib/Target/ARM/ARM.td | 90 +- llvm/lib/Target/ARM/ARMAsmPrinter.cpp | 10 +- llvm/lib/Target/ARM/ARMISelLowering.cpp | 10 +- llvm/lib/Target/ARM/ARMISelLowering.h | 3 +- llvm/lib/Target/ARM/ARMSubtarget.cpp | 8 +- llvm/lib/Target/ARM/ARMSubtarget.h | 2 +- llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp | 7 +- llvm/lib/Target/BPF/MCTargetDesc/BPFMCAsmInfo.h | 4 +- llvm/lib/Target/Hexagon/HexagonISelLowering.cpp | 9 +- llvm/lib/Target/Hexagon/HexagonISelLowering.h | 3 +- llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp | 153 +- .../Target/Mips/Disassembler/MipsDisassembler.cpp | 29 + .../Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp | 6 + llvm/lib/Target/Mips/MicroMips32r6InstrInfo.td | 4 +- llvm/lib/Target/Mips/MicroMipsInstrInfo.td | 28 +- llvm/lib/Target/Mips/MicroMipsSizeReduction.cpp | 115 +- llvm/lib/Target/Mips/MipsDelaySlotFiller.cpp | 5 +- llvm/lib/Target/Mips/MipsRegisterBankInfo.cpp | 3 + llvm/lib/Target/Mips/MipsRegisterInfo.td | 28 + llvm/lib/Target/PowerPC/PPCISelLowering.cpp | 3 +- llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp | 22 +- llvm/lib/Target/RISCV/RISCVInstrInfo.td | 18 +- .../lib/Target/WebAssembly/WebAssemblyInstrSIMD.td | 70 +- .../Target/X86/MCTargetDesc/X86MCTargetDesc.cpp | 78 +- llvm/lib/Target/X86/X86ISelLowering.cpp | 141 +- llvm/lib/Target/X86/X86ISelLowering.h | 9 + llvm/lib/Target/X86/X86RegisterInfo.h | 2 + llvm/lib/Target/X86/X86ScheduleBtVer2.td | 62 + .../Transforms/InstCombine/InstCombineCompares.cpp | 16 +- .../Transforms/Instrumentation/GCOVProfiling.cpp | 3 +- llvm/lib/Transforms/Scalar/SCCP.cpp | 64 +- llvm/lib/Transforms/Utils/BuildLibCalls.cpp | 2 + llvm/lib/Transforms/Utils/SimplifyLibCalls.cpp | 5 +- llvm/test/Assembler/dilocation.ll | 13 +- llvm/test/Bitcode/DILocation-implicit-code.ll | 190 + llvm/test/Bitcode/DILocation-implicit-code.ll.bc | Bin 0 -> 4680 bytes llvm/test/CodeGen/AArch64/extract-bits.ll | 717 ++ .../CodeGen/AArch64/misched-fusion-crypto-eor.mir | 75 + llvm/test/CodeGen/AMDGPU/sitofp.f16.ll | 19 + llvm/test/CodeGen/AMDGPU/uitofp.f16.ll | 19 + llvm/test/CodeGen/ARM/unwind-fp.ll | 15 + llvm/test/CodeGen/Hexagon/swp-epilog-phi6.ll | 2 +- .../CodeGen/Hexagon/verify-liveness-at-def.mir | 74 + .../micromips-sizereduction/micromips-movep.ll | 29 + .../micromips-sizereduction/micromips-movep.mir | 86 + llvm/test/CodeGen/PowerPC/crash.ll | 17 + llvm/test/CodeGen/X86/2012-01-12-extract-sv.ll | 5 +- llvm/test/CodeGen/X86/GlobalISel/add-ext.ll | 228 + llvm/test/CodeGen/X86/GlobalISel/add-scalar.ll | 3 +- llvm/test/CodeGen/X86/GlobalISel/and-scalar.ll | 10 +- llvm/test/CodeGen/X86/GlobalISel/ashr-scalar.ll | 73 +- llvm/test/CodeGen/X86/GlobalISel/binop.ll | 4 +- llvm/test/CodeGen/X86/GlobalISel/callingconv.ll | 6 +- llvm/test/CodeGen/X86/GlobalISel/ext-x86-64.ll | 19 +- llvm/test/CodeGen/X86/GlobalISel/ext.ll | 20 +- llvm/test/CodeGen/X86/GlobalISel/lshr-scalar.ll | 69 +- llvm/test/CodeGen/X86/GlobalISel/memop-scalar.ll | 18 +- llvm/test/CodeGen/X86/GlobalISel/mul-scalar.ll | 31 +- llvm/test/CodeGen/X86/GlobalISel/or-scalar.ll | 10 +- llvm/test/CodeGen/X86/GlobalISel/phi.ll | 62 +- llvm/test/CodeGen/X86/GlobalISel/ptrtoint.ll | 12 +- .../CodeGen/X86/GlobalISel/shl-scalar-widening.ll | 37 +- llvm/test/CodeGen/X86/GlobalISel/shl-scalar.ll | 65 +- llvm/test/CodeGen/X86/GlobalISel/sub-scalar.ll | 10 +- llvm/test/CodeGen/X86/GlobalISel/trunc.ll | 12 +- llvm/test/CodeGen/X86/GlobalISel/undef.ll | 3 +- llvm/test/CodeGen/X86/GlobalISel/xor-scalar.ll | 10 +- llvm/test/CodeGen/X86/add.ll | 87 +- llvm/test/CodeGen/X86/addcarry.ll | 40 +- llvm/test/CodeGen/X86/and-encoding.ll | 18 +- llvm/test/CodeGen/X86/andimm8.ll | 11 +- llvm/test/CodeGen/X86/anyext.ll | 3 +- llvm/test/CodeGen/X86/apm.ll | 4 +- llvm/test/CodeGen/X86/atomic-eflags-reuse.ll | 48 +- llvm/test/CodeGen/X86/atomic128.ll | 3 +- llvm/test/CodeGen/X86/avg.ll | 10 +- llvm/test/CodeGen/X86/avoid-sfb.ll | 76 +- llvm/test/CodeGen/X86/avx-intel-ocl.ll | 2 +- llvm/test/CodeGen/X86/avx-logic.ll | 29 + llvm/test/CodeGen/X86/avx-vinsertf128.ll | 9 +- llvm/test/CodeGen/X86/avx512-arith.ll | 4 +- llvm/test/CodeGen/X86/avx512-calling-conv.ll | 4 +- llvm/test/CodeGen/X86/avx512-insert-extract.ll | 32 +- llvm/test/CodeGen/X86/avx512-intrinsics-upgrade.ll | 28 +- llvm/test/CodeGen/X86/avx512-mask-op.ll | 15 +- llvm/test/CodeGen/X86/avx512-regcall-NoMask.ll | 45 +- llvm/test/CodeGen/X86/avx512-schedule.ll | 38 +- llvm/test/CodeGen/X86/avx512-select.ll | 6 +- llvm/test/CodeGen/X86/avx512bw-mask-op.ll | 20 +- llvm/test/CodeGen/X86/avx512dq-mask-op.ll | 12 +- llvm/test/CodeGen/X86/avx512vl-arith.ll | 8 +- llvm/test/CodeGen/X86/bigstructret.ll | 14 +- llvm/test/CodeGen/X86/bitcast-i256.ll | 4 +- .../test/CodeGen/X86/bitcast-int-to-vector-bool.ll | 6 +- llvm/test/CodeGen/X86/bitreverse.ll | 57 +- .../CodeGen/X86/bmi-intrinsics-fast-isel-x86_64.ll | 8 +- llvm/test/CodeGen/X86/bmi-intrinsics-fast-isel.ll | 8 +- llvm/test/CodeGen/X86/bmi.ll | 4 +- llvm/test/CodeGen/X86/bmi2.ll | 28 +- llvm/test/CodeGen/X86/bool-math.ll | 33 +- llvm/test/CodeGen/X86/bool-simplify.ll | 4 +- llvm/test/CodeGen/X86/bswap-rotate.ll | 3 +- llvm/test/CodeGen/X86/bswap-wide-int.ll | 16 +- llvm/test/CodeGen/X86/bswap.ll | 15 +- llvm/test/CodeGen/X86/bswap_tree.ll | 8 +- llvm/test/CodeGen/X86/bswap_tree2.ll | 18 +- llvm/test/CodeGen/X86/bt.ll | 12 +- llvm/test/CodeGen/X86/btc_bts_btr.ll | 79 +- llvm/test/CodeGen/X86/bypass-slow-division-64.ll | 27 +- llvm/test/CodeGen/X86/clear-highbits.ll | 56 +- llvm/test/CodeGen/X86/clear-lowbits.ll | 106 +- llvm/test/CodeGen/X86/cmov-into-branch.ll | 31 +- llvm/test/CodeGen/X86/cmov.ll | 11 +- llvm/test/CodeGen/X86/cmovcmov.ll | 18 +- llvm/test/CodeGen/X86/cmp.ll | 8 +- llvm/test/CodeGen/X86/cmpxchg-clobber-flags.ll | 4 +- llvm/test/CodeGen/X86/cmpxchg-i128-i1.ll | 22 +- llvm/test/CodeGen/X86/combine-add.ll | 12 +- llvm/test/CodeGen/X86/combine-rotates.ll | 2 +- llvm/test/CodeGen/X86/combine-sdiv.ll | 281 +- llvm/test/CodeGen/X86/combine-srem.ll | 20 +- llvm/test/CodeGen/X86/combine-udiv.ll | 2 +- llvm/test/CodeGen/X86/combine-urem.ll | 2 +- llvm/test/CodeGen/X86/conditional-indecrement.ll | 36 +- llvm/test/CodeGen/X86/dagcombine-cse.ll | 4 - llvm/test/CodeGen/X86/dagcombine-select.ll | 21 +- llvm/test/CodeGen/X86/divide-by-constant.ll | 54 +- llvm/test/CodeGen/X86/divrem.ll | 9 +- llvm/test/CodeGen/X86/divrem8_ext.ll | 4 + llvm/test/CodeGen/X86/extract-bits.ll | 5642 +++++++++++++ llvm/test/CodeGen/X86/extract-lowbits.ll | 1153 ++- llvm/test/CodeGen/X86/extractelement-load.ll | 11 +- llvm/test/CodeGen/X86/fast-isel-fold-mem.ll | 2 +- llvm/test/CodeGen/X86/fast-isel-select-cmov.ll | 16 +- llvm/test/CodeGen/X86/fast-isel-select-cmov2.ll | 188 +- .../CodeGen/X86/fast-isel-select-pseudo-cmov.ll | 11 +- llvm/test/CodeGen/X86/fast-isel-sext-zext.ll | 8 +- llvm/test/CodeGen/X86/fast-isel-shift.ll | 112 +- llvm/test/CodeGen/X86/fast-isel-store.ll | 5 +- llvm/test/CodeGen/X86/fixup-bw-copy.ll | 28 +- llvm/test/CodeGen/X86/fma.ll | 15 +- llvm/test/CodeGen/X86/fold-vector-sext-crash2.ll | 8 +- llvm/test/CodeGen/X86/funnel-shift-rot.ll | 26 +- llvm/test/CodeGen/X86/funnel-shift.ll | 24 +- llvm/test/CodeGen/X86/ghc-cc64.ll | 4 +- llvm/test/CodeGen/X86/hipe-cc64.ll | 3 +- llvm/test/CodeGen/X86/i128-mul.ll | 12 +- llvm/test/CodeGen/X86/iabs.ll | 9 +- llvm/test/CodeGen/X86/imul.ll | 34 +- llvm/test/CodeGen/X86/insertps-combine.ll | 5 +- llvm/test/CodeGen/X86/lea-opt.ll | 33 +- llvm/test/CodeGen/X86/legalize-shift-64.ll | 7 +- llvm/test/CodeGen/X86/legalize-shl-vec.ll | 60 +- llvm/test/CodeGen/X86/machine-combiner-int.ll | 57 +- llvm/test/CodeGen/X86/machine-cp.ll | 64 +- llvm/test/CodeGen/X86/machine-cse.ll | 10 +- llvm/test/CodeGen/X86/madd.ll | 4 +- llvm/test/CodeGen/X86/mask-negated-bool.ll | 4 +- llvm/test/CodeGen/X86/misched-matmul.ll | 2 +- llvm/test/CodeGen/X86/mul-constant-i16.ll | 7 +- llvm/test/CodeGen/X86/mul-constant-i32.ll | 38 +- llvm/test/CodeGen/X86/mul-constant-i64.ll | 24 +- llvm/test/CodeGen/X86/mul-i1024.ll | 1443 ++-- llvm/test/CodeGen/X86/mul-i256.ll | 226 +- llvm/test/CodeGen/X86/mul-i512.ll | 1481 ++-- llvm/test/CodeGen/X86/mul128.ll | 6 +- llvm/test/CodeGen/X86/mul64.ll | 2 +- llvm/test/CodeGen/X86/mwaitx-schedule.ll | 18 +- llvm/test/CodeGen/X86/mwaitx.ll | 17 +- llvm/test/CodeGen/X86/negate-i1.ll | 29 +- llvm/test/CodeGen/X86/negate-shift.ll | 4 +- llvm/test/CodeGen/X86/negate.ll | 3 +- llvm/test/CodeGen/X86/no-sse2-avg.ll | 2 +- llvm/test/CodeGen/X86/not-and-simplify.ll | 11 +- llvm/test/CodeGen/X86/oddshuffles.ll | 72 +- llvm/test/CodeGen/X86/palignr.ll | 9 +- llvm/test/CodeGen/X86/peep-setb.ll | 39 +- llvm/test/CodeGen/X86/pku.ll | 2 +- llvm/test/CodeGen/X86/pmaddubsw.ll | 2 +- llvm/test/CodeGen/X86/pmulh.ll | 4 +- llvm/test/CodeGen/X86/pr12360.ll | 3 +- llvm/test/CodeGen/X86/pr13577.ll | 1 - llvm/test/CodeGen/X86/pr15705.ll | 6 +- llvm/test/CodeGen/X86/pr15981.ll | 4 +- llvm/test/CodeGen/X86/pr23664.ll | 7 +- llvm/test/CodeGen/X86/pr28173.ll | 3 +- llvm/test/CodeGen/X86/pr34592.ll | 43 +- llvm/test/CodeGen/X86/pr34653.ll | 204 +- llvm/test/CodeGen/X86/pr34657.ll | 6 +- llvm/test/CodeGen/X86/promote-i16.ll | 6 +- llvm/test/CodeGen/X86/ptest.ll | 56 +- llvm/test/CodeGen/X86/reduce-trunc-shl.ll | 4 +- llvm/test/CodeGen/X86/rot16.ll | 28 +- llvm/test/CodeGen/X86/rot64.ll | 32 +- llvm/test/CodeGen/X86/rotate.ll | 69 +- llvm/test/CodeGen/X86/rotate2.ll | 7 +- llvm/test/CodeGen/X86/rotate4.ll | 61 +- llvm/test/CodeGen/X86/sar_fold64.ll | 5 +- llvm/test/CodeGen/X86/sat-add.ll | 22 +- llvm/test/CodeGen/X86/scalar_widen_div.ll | 9 +- llvm/test/CodeGen/X86/schedule-x86-64-shld.ll | 92 +- llvm/test/CodeGen/X86/schedule-x86_64.ll | 40 +- llvm/test/CodeGen/X86/select.ll | 54 +- llvm/test/CodeGen/X86/select_const.ll | 17 +- llvm/test/CodeGen/X86/selectcc-to-shiftand.ll | 36 +- llvm/test/CodeGen/X86/setcc-logic.ll | 10 +- llvm/test/CodeGen/X86/sext-i1.ll | 2 +- llvm/test/CodeGen/X86/shift-and.ll | 28 +- llvm/test/CodeGen/X86/shift-bmi2.ll | 177 +- llvm/test/CodeGen/X86/shift-double-x86_64.ll | 39 +- llvm/test/CodeGen/X86/shift-double.ll | 63 +- llvm/test/CodeGen/X86/shift-pair.ll | 4 +- llvm/test/CodeGen/X86/shuffle-of-insert.ll | 48 +- llvm/test/CodeGen/X86/signbit-shift.ll | 12 +- llvm/test/CodeGen/X86/sret-implicit.ll | 4 +- llvm/test/CodeGen/X86/sse1.ll | 36 +- llvm/test/CodeGen/X86/sse3-intrinsics-x86.ll | 4 +- llvm/test/CodeGen/X86/sse3-schedule.ll | 68 +- .../X86/sse42-intrinsics-fast-isel-x86_64.ll | 2 +- .../test/CodeGen/X86/sse42-intrinsics-fast-isel.ll | 94 +- llvm/test/CodeGen/X86/sse42-intrinsics-x86.ll | 6 +- llvm/test/CodeGen/X86/sse42-intrinsics-x86_64.ll | 4 +- llvm/test/CodeGen/X86/sse42-schedule.ll | 320 +- llvm/test/CodeGen/X86/sttni.ll | 50 +- llvm/test/CodeGen/X86/subcarry.ll | 62 +- llvm/test/CodeGen/X86/swift-return.ll | 24 +- llvm/test/CodeGen/X86/swifterror.ll | 22 +- llvm/test/CodeGen/X86/system-intrinsics-xsetbv.ll | 4 +- .../CodeGen/X86/tbm-intrinsics-fast-isel-x86_64.ll | 32 +- llvm/test/CodeGen/X86/tbm-intrinsics-fast-isel.ll | 32 +- llvm/test/CodeGen/X86/tbm_patterns.ll | 162 +- llvm/test/CodeGen/X86/trunc-subvector.ll | 9 +- llvm/test/CodeGen/X86/twoaddr-lea.ll | 4 +- llvm/test/CodeGen/X86/umul-with-overflow.ll | 2 +- .../CodeGen/X86/umulo-128-legalisation-lowering.ll | 8 +- ...old-masked-merge-scalar-constmask-innerouter.ll | 142 +- ...asked-merge-scalar-constmask-interleavedbits.ll | 142 +- ...merge-scalar-constmask-interleavedbytehalves.ll | 142 +- ...unfold-masked-merge-scalar-constmask-lowhigh.ll | 24 +- .../X86/unfold-masked-merge-scalar-variablemask.ll | 293 +- ...nfold-masked-merge-vector-variablemask-const.ll | 32 +- .../X86/unfold-masked-merge-vector-variablemask.ll | 1802 ++-- .../test/CodeGen/X86/update-terminator-debugloc.ll | 2 +- llvm/test/CodeGen/X86/urem-power-of-two.ll | 8 +- llvm/test/CodeGen/X86/urem-seteq-optsize.ll | 2 +- llvm/test/CodeGen/X86/urem-seteq-vec-nonsplat.ll | 41 +- llvm/test/CodeGen/X86/urem-seteq-vec-splat.ll | 24 +- llvm/test/CodeGen/X86/use-add-flags.ll | 8 +- llvm/test/CodeGen/X86/vec_cast.ll | 2 + llvm/test/CodeGen/X86/vec_extract-sse4.ll | 4 +- llvm/test/CodeGen/X86/vec_insert-3.ll | 1 - llvm/test/CodeGen/X86/vector-bitreverse.ll | 54 +- llvm/test/CodeGen/X86/vector-blend.ll | 36 +- llvm/test/CodeGen/X86/vector-compare-results.ll | 8766 ++++++++++---------- .../X86/vector-constrained-fp-intrinsics.ll | 234 +- llvm/test/CodeGen/X86/vector-idiv-sdiv-128.ll | 76 +- llvm/test/CodeGen/X86/vector-idiv-sdiv-256.ll | 138 +- llvm/test/CodeGen/X86/vector-idiv-sdiv-512.ll | 106 +- llvm/test/CodeGen/X86/vector-idiv-udiv-128.ll | 102 +- llvm/test/CodeGen/X86/vector-idiv-udiv-256.ll | 84 +- llvm/test/CodeGen/X86/vector-idiv-udiv-512.ll | 90 +- llvm/test/CodeGen/X86/vector-interleave.ll | 2 +- llvm/test/CodeGen/X86/vector-mul.ll | 150 +- llvm/test/CodeGen/X86/vector-pcmp.ll | 6 +- llvm/test/CodeGen/X86/vector-reduce-fadd-fast.ll | 26 +- llvm/test/CodeGen/X86/vector-rotate-128.ll | 26 +- llvm/test/CodeGen/X86/vector-shift-ashr-128.ll | 39 +- llvm/test/CodeGen/X86/vector-shift-lshr-128.ll | 39 +- llvm/test/CodeGen/X86/vector-shuffle-128-v2.ll | 48 +- llvm/test/CodeGen/X86/vector-shuffle-128-v4.ll | 6 +- .../CodeGen/X86/vector-shuffle-combining-sse4a.ll | 4 +- .../CodeGen/X86/vector-shuffle-combining-ssse3.ll | 2 +- llvm/test/CodeGen/X86/vector-shuffle-combining.ll | 10 +- llvm/test/CodeGen/X86/vector-trunc.ll | 2 - llvm/test/CodeGen/X86/vector-zext.ll | 6 +- llvm/test/CodeGen/X86/vectorcall.ll | 9 +- llvm/test/CodeGen/X86/vselect-minmax.ll | 454 +- llvm/test/CodeGen/X86/vselect.ll | 4 +- llvm/test/CodeGen/X86/widen_bitops-0.ll | 12 +- llvm/test/CodeGen/X86/widen_bitops-1.ll | 12 +- llvm/test/CodeGen/X86/widen_load-2.ll | 22 +- llvm/test/CodeGen/X86/widen_load-3.ll | 20 +- llvm/test/CodeGen/X86/win64_vararg.ll | 4 +- llvm/test/CodeGen/X86/x64-cet-intrinsics.ll | 4 +- llvm/test/CodeGen/X86/x86-64-bittest-logic.ll | 24 +- .../CodeGen/X86/x86-64-double-shifts-Oz-Os-O2.ll | 4 +- llvm/test/CodeGen/X86/x86-cmov-converter.ll | 32 +- llvm/test/CodeGen/X86/x86-shrink-wrapping.ll | 67 +- llvm/test/CodeGen/X86/xaluo.ll | 132 +- llvm/test/CodeGen/X86/xchg-nofold.ll | 21 +- llvm/test/CodeGen/X86/xmulo.ll | 51 +- llvm/test/CodeGen/X86/xor.ll | 147 +- llvm/test/DebugInfo/COFF/pieces.ll | 16 +- llvm/test/DebugInfo/PowerPC/tls-fission.ll | 1 + .../WebAssembly/dbg-value-live-interval.ll | 2 +- llvm/test/DebugInfo/X86/debug_addr.ll | 2 +- llvm/test/DebugInfo/X86/live-debug-values.ll | 2 +- llvm/test/DebugInfo/X86/live-debug-variables.ll | 2 +- llvm/test/DebugInfo/X86/pieces-3.ll | 7 +- llvm/test/DebugInfo/X86/tls.ll | 1 + llvm/test/MC/ARM/implicit-it-generation.s | 4 +- llvm/test/MC/RISCV/rv32i-invalid.s | 2 - llvm/test/MC/RISCV/rv32i-valid.s | 10 + llvm/test/MC/RISCV/rvi-aliases-valid.s | 32 +- llvm/test/MC/WebAssembly/simd-encodings.s | 148 +- llvm/test/ThinLTO/X86/Inputs/cfi-distributed.ll | 23 +- llvm/test/ThinLTO/X86/cfi-distributed.ll | 24 +- ...lize-low-bit-mask-v2-and-icmp-eq-to-icmp-ule.ll | 93 +- ...lize-low-bit-mask-v2-and-icmp-ne-to-icmp-ugt.ll | 93 +- ...lize-low-bit-mask-v3-and-icmp-eq-to-icmp-ule.ll | 69 +- ...lize-low-bit-mask-v3-and-icmp-ne-to-icmp-ugt.ll | 69 +- ...lize-low-bit-mask-v4-and-icmp-eq-to-icmp-ule.ll | 43 +- ...lize-low-bit-mask-v4-and-icmp-ne-to-icmp-ugt.ll | 43 +- llvm/test/Transforms/InstCombine/fdiv-cos-sin.ll | 19 +- llvm/test/Transforms/InstCombine/strcmp-memcmp.ll | 15 + .../SCCP/switch-undef-constantfoldterminator.ll | 47 + .../llvm-mca/X86/BtVer2/zero-idioms-avx-256.s | 322 + llvm/tools/llvm-mca/lib/InstrBuilder.cpp | 30 +- llvm/unittests/ADT/BitVectorTest.cpp | 31 + llvm/unittests/XRay/CMakeLists.txt | 1 - llvm/utils/TableGen/CodeGenDAGPatterns.cpp | 9 +- llvm/utils/TableGen/CodeGenSchedule.cpp | 212 + llvm/utils/TableGen/CodeGenSchedule.h | 141 + llvm/utils/TableGen/PredicateExpander.cpp | 155 + llvm/utils/TableGen/PredicateExpander.h | 33 +- llvm/utils/TableGen/SubtargetEmitter.cpp | 45 +- llvm/utils/benchmark/README.LLVM | 2 + llvm/utils/benchmark/src/cycleclock.h | 2 +- llvm/utils/benchmark/src/internal_macros.h | 3 + .../googlemock/include/gmock/gmock-matchers.h | 2 +- 486 files changed, 23991 insertions(+), 12151 deletions(-) create mode 100644 clang/test/SemaObjCXX/warn-thread-safety-analysis.mm create mode 100644 libcxx/test/std/utilities/variant/variant.relops/relops_bool_co [...] create mode 100644 lld/test/ELF/Inputs/ppc64le-quadword-ldst.o create mode 100644 lld/test/ELF/lto/ppc64le.ll create mode 100644 lld/test/ELF/ppc64-toc-addis-nop-lqsq.s create mode 100644 lld/test/ELF/ppc64-toc-addis-nop.s create mode 100644 lld/test/ELF/ppc64-tocopt-option.s create mode 100644 lldb/packages/Python/lldbsuite/test/functionalities/data-format [...] create mode 100644 lldb/packages/Python/lldbsuite/test/functionalities/data-format [...] create mode 100644 lldb/packages/Python/lldbsuite/test/functionalities/data-format [...] create mode 100644 lldb/packages/Python/lldbsuite/test/functionalities/target_crea [...] create mode 100644 lldb/packages/Python/lldbsuite/test/functionalities/target_crea [...] create mode 100644 lldb/packages/Python/lldbsuite/test/functionalities/target_crea [...] create mode 100644 lldb/packages/Python/lldbsuite/test/functionalities/target_crea [...] create mode 100644 lldb/packages/Python/lldbsuite/test/functionalities/target_crea [...] create mode 100644 lldb/source/Plugins/Language/CPlusPlus/LibCxxVariant.cpp create mode 100644 lldb/source/Plugins/Language/CPlusPlus/LibCxxVariant.h create mode 100644 llvm/test/Bitcode/DILocation-implicit-code.ll create mode 100644 llvm/test/Bitcode/DILocation-implicit-code.ll.bc create mode 100644 llvm/test/CodeGen/AArch64/extract-bits.ll create mode 100644 llvm/test/CodeGen/AArch64/misched-fusion-crypto-eor.mir create mode 100644 llvm/test/CodeGen/ARM/unwind-fp.ll create mode 100644 llvm/test/CodeGen/Hexagon/verify-liveness-at-def.mir create mode 100644 llvm/test/CodeGen/Mips/micromips-sizereduction/micromips-movep.ll create mode 100644 llvm/test/CodeGen/Mips/micromips-sizereduction/micromips-movep.mir create mode 100644 llvm/test/CodeGen/X86/GlobalISel/add-ext.ll create mode 100644 llvm/test/CodeGen/X86/extract-bits.ll create mode 100644 llvm/test/Transforms/SCCP/switch-undef-constantfoldterminator.ll create mode 100644 llvm/test/tools/llvm-mca/X86/BtVer2/zero-idioms-avx-256.s