This is an automated email from the git hooks/post-receive script.

tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk_tk1/llvm-release-arm-spec2k6-O3 in repository toolchain/ci/glibc.

from d59630f995 arm: CVE-2020-6096: Fix multiarch memcpy for negative length [...] adds afc53d52dc AArch64: Align ENTRY to a cacheline adds ade1fa24e3 AArch64: Add optimized Q-register memcpy adds 236287f869 AArch64: Improve backwards memmove performance adds ad34abcad5 AArch64: Rename IS_ARES to IS_NEOVERSE_N1 adds 704e18d66d aarch64: Increase small and medium cases for __memcpy_generic adds 80259cd098 [AArch64] Improve integer memcpy adds 24c0d68815 AArch64: Use __memcpy_simd on Neoverse N2/V1 adds 61e8ae9b66 aarch64: Fix DT_AARCH64_VARIANT_PCS handling [BZ #26798]

No new revisions were added by this update.

Summary of changes: sysdeps/aarch64/dl-machine.h | 12 +- sysdeps/aarch64/memcpy.S | 211 +++++++++++---------- sysdeps/aarch64/multiarch/Makefile | 2 +- sysdeps/aarch64/multiarch/ifunc-impl-list.c | 2 + sysdeps/aarch64/multiarch/memcpy.c | 8 +- sysdeps/aarch64/multiarch/memcpy_advsimd.S | 248 +++++++++++++++++++++++++ sysdeps/aarch64/multiarch/memmove.c | 6 +- sysdeps/aarch64/sysdep.h | 2 +- sysdeps/unix/sysv/linux/aarch64/cpu-features.h | 8 +- 9 files changed, 387 insertions(+), 112 deletions(-) create mode 100644 sysdeps/aarch64/multiarch/memcpy_advsimd.S