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from e67db33ecdb AMDGPU Tests: Change a case to be run with -O0 new 47a46192bbb [NVPTX,CUDA] Added llvm.nvvm.fns intrinsic and matching __n [...] new 138b4f20216 InstructionSimplify: 'extractelement' with an undef index is undef new a7566ef3eff [X86] Attempt to fix a ubsan failure in the autoupgrade of [...] new 72e969ff83b [X86][AVX] Regenerate vpmovm2*/vpmov*2m avx512 schedule tests new 47aefda7c62 [X86][AVX512] Tag aligned/unaligned move instruction schedu [...]

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Summary of changes: include/llvm/IR/IntrinsicsNVVM.td | 5 + lib/Analysis/InstructionSimplify.cpp | 5 + lib/IR/AutoUpgrade.cpp | 2 +- lib/Target/NVPTX/NVPTXIntrinsics.td | 27 ++ lib/Target/X86/X86InstrAVX512.td | 137 ++++---- lib/Target/X86/X86InstrSSE.td | 16 +- test/CodeGen/NVPTX/fns.ll | 36 ++ test/CodeGen/X86/avx-schedule.ll | 8 +- test/CodeGen/X86/avx2-schedule.ll | 32 +- test/CodeGen/X86/avx512-schedule.ll | 68 ++-- test/CodeGen/X86/avx512-shuffle-schedule.ll | 384 ++++++++++----------- .../InstSimplify/2011-09-05-InsertExtractValue.ll | 7 + 12 files changed, 412 insertions(+), 315 deletions(-) create mode 100644 test/CodeGen/NVPTX/fns.ll