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unknown user pushed a change to branch aarch64/sve-acle-branch in repository gcc.

from eb6a48d3aea [SVE ACLE] Fix constraints for lane indices new adb15e22197 [SVE ACLE] Add support for indexed forms of LD1RQ new 79ecda74929 [SVE ACLE] Match predicated shifts in ADR patterns new 219c377a35c [SVE ACLE] Don't allow unpacked predicate constant moves before RA new ca8a1d55519 [SVE ACLE] Prefer svptest comparisons to come first new e9d4ae762b5 [SVE ACLE] Make ccmp treat ~x on booleans as x == 0

The 5 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference.

Summary of changes: gcc/ccmp.c | 37 ++++-- gcc/config/aarch64/aarch64-protos.h | 2 + gcc/config/aarch64/aarch64-sve-builtins.c | 3 + gcc/config/aarch64/aarch64-sve.md | 126 ++++++++++++--------- gcc/config/aarch64/aarch64.c | 82 +++++++++++++- gcc/config/aarch64/predicates.md | 8 +- gcc/lra-constraints.c | 25 +++- .../gcc.target/aarch64/sve-acle/asm/ld1rq_f16.c | 3 +- .../gcc.target/aarch64/sve-acle/asm/ld1rq_f32.c | 3 +- .../gcc.target/aarch64/sve-acle/asm/ld1rq_f64.c | 3 +- .../gcc.target/aarch64/sve-acle/asm/ld1rq_s16.c | 3 +- .../gcc.target/aarch64/sve-acle/asm/ld1rq_s32.c | 3 +- .../gcc.target/aarch64/sve-acle/asm/ld1rq_s64.c | 3 +- .../gcc.target/aarch64/sve-acle/asm/ld1rq_s8.c | 3 +- .../gcc.target/aarch64/sve-acle/asm/ld1rq_u16.c | 3 +- .../gcc.target/aarch64/sve-acle/asm/ld1rq_u32.c | 3 +- .../gcc.target/aarch64/sve-acle/asm/ld1rq_u64.c | 3 +- .../gcc.target/aarch64/sve-acle/asm/ld1rq_u8.c | 3 +- .../gcc.target/aarch64/sve-acle/general/pnext_4.c | 45 ++++++++ .../gcc.target/aarch64/sve-acle/general/pnext_5.c | 45 ++++++++ .../gcc.target/aarch64/sve-acle/general/pnext_6.c | 46 ++++++++ .../gcc.target/aarch64/sve-acle/general/pnext_7.c | 45 ++++++++ 22 files changed, 397 insertions(+), 100 deletions(-) create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/general/pnext_4.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/general/pnext_5.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/general/pnext_6.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/general/pnext_7.c