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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-lts-allyesconfig in repository toolchain/ci/llvm-project.

from e0363adb75f [Attributor][Fix] Never override given argument numbers adds 124cae7d3fc Remove extra ';' to silent compiler warning. adds 9450b0084af [X86] Remove offset of 8 from the call to FuseInst for UNPC [...] adds c7f9559d659 [Driver] Simplify -lgcc & -lgcc_s adds e9dc9c2bebb [Driver] Simplify AddLibgcc adds 44a4bf95ddf [MachineOutliner] Add missing initializers for OutlinedFunc [...] adds a3f9240bfbb SlotIndexes - add missing initializer. NFCI. adds f66f5ff38ab VirtRegMap - add missing initializers. NFCI. adds 864474c9c72 [BitcodeReader] Use tighter upper bound to validate forward [...] adds 19d3fdb08b7 Recommit "[BitcodeReader] Validate OpNum, before accessing [...] adds 03d5e28fe94 [x86] add test for sub-with-flags opportunity (PR40483); NFC adds 34c067331e4 [Hashing] hash_1to3_bytes - avoid trunc(v + zext(x)) NFCI. adds 57190b3974f [InstCombine] Add assume context test; NFC new 194b337f332 Avoid eager template instantiation caused by the variant na [...] new 8eb86a15c5c [GitSVN][NFC] Mark dry-run commits as such in the log output new 8f1d7d1c55c consistency in the release notes new 273857d1ea9 Harden variant test added in r366022 new aae0cb67ed7 Cleanup whitespace in <variant>. NFC. new 24cacf9c56f [clang][Driver][ARM] Favor -mfpu over default CPU features new fff5dc0b173 Support __seg_fs and __seg_gs on x86

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Summary of changes: clang/docs/LanguageExtensions.rst | 4 ++ clang/docs/ReleaseNotes.rst | 4 +- clang/lib/Basic/Targets/X86.cpp | 5 ++ clang/lib/Driver/ToolChains/Arch/ARM.cpp | 6 +- clang/lib/Driver/ToolChains/CommonArgs.cpp | 40 +++++------ clang/lib/Sema/SemaDecl.cpp | 5 +- clang/test/CodeGen/arm-target-features.c | 2 +- clang/test/Preprocessor/x86_seg_fs_gs.c | 7 ++ libcxx/include/variant | 32 ++++++--- .../variant.variant/variant.ctor/T.pass.cpp | 14 +++- llvm/include/llvm/ADT/Hashing.h | 2 +- llvm/include/llvm/Bitstream/BitstreamReader.h | 8 ++- llvm/include/llvm/CodeGen/MachineOutliner.h | 6 +- llvm/include/llvm/CodeGen/SlotIndexes.h | 2 +- llvm/include/llvm/CodeGen/VirtRegMap.h | 6 +- llvm/include/llvm/Support/ARMTargetParser.def | 1 + llvm/lib/Bitcode/Reader/BitcodeReader.cpp | 6 +- llvm/lib/Bitcode/Reader/MetadataLoader.cpp | 20 ++++-- llvm/lib/Bitcode/Reader/ValueList.cpp | 8 ++- llvm/lib/Bitcode/Reader/ValueList.h | 9 ++- llvm/lib/Support/ARMTargetParser.cpp | 30 ++------- llvm/lib/Target/X86/X86InstrInfo.cpp | 2 +- llvm/test/Bitcode/Inputs/invalid-fcmp-opnum.bc | Bin 0 -> 908 bytes llvm/test/Bitcode/invalid.test | 5 ++ llvm/test/Bitcode/pr18704.ll | 2 +- llvm/test/CodeGen/X86/combine-sbb.ll | 47 ++++++++++++- llvm/test/CodeGen/X86/pr42616.ll | 11 +++ .../Transforms/InstCombine/assume_inevitable.ll | 74 +++++++++++++++++++++ llvm/unittests/Support/TargetParserTest.cpp | 15 +++-- llvm/utils/git-svn/git-llvm | 4 +- 30 files changed, 284 insertions(+), 93 deletions(-) create mode 100644 clang/test/Preprocessor/x86_seg_fs_gs.c create mode 100644 llvm/test/Bitcode/Inputs/invalid-fcmp-opnum.bc create mode 100644 llvm/test/CodeGen/X86/pr42616.ll create mode 100644 llvm/test/Transforms/InstCombine/assume_inevitable.ll