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from 2e53035953b [RISCV] Generate address sequences suitable for mcmodel=medium new d2fa304a073 [AArch64] Add v8.5-a Memory Tagging STGM/LDGM instructions new 415b5e48b63 [RISCV] Attach VK_RISCV_CALL to symbols upon creation new b9913c3ee52 [AArch64] Add v8.5-a Memory Tagging STZGM instruction new a7bc052caeb gn build: Merge r357383

The 4 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference.

Summary of changes: lib/Target/AArch64/AArch64InstrFormats.td | 2 +- lib/Target/AArch64/AArch64InstrInfo.td | 13 ++-- lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp | 9 --- .../AArch64/Disassembler/AArch64Disassembler.cpp | 27 ------- lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp | 34 +++++++++ .../RISCV/MCTargetDesc/RISCVMCCodeEmitter.cpp | 6 +- lib/Target/RISCV/RISCVISelLowering.cpp | 6 +- lib/Target/RISCV/RISCVInstrInfo.td | 16 +++- lib/Target/RISCV/RISCVMCInstLower.cpp | 3 + lib/Target/RISCV/Utils/RISCVBaseInfo.h | 1 + test/MC/AArch64/armv8.5a-mte-error.s | 86 +++++++++++++--------- test/MC/AArch64/armv8.5a-mte.s | 38 +++++++--- .../AArch64/armv8.5a-mte-unpredictable.txt | 7 -- test/MC/Disassembler/AArch64/armv8.5a-mte.txt | 24 ++++-- utils/gn/secondary/lld/COFF/BUILD.gn | 1 + 15 files changed, 161 insertions(+), 112 deletions(-) delete mode 100644 test/MC/Disassembler/AArch64/armv8.5a-mte-unpredictable.txt