This is an automated email from the git hooks/post-receive script.
unknown user pushed a change to branch hjl/erms/2.22 in repository glibc.
from 157c571 X86-64: Add dummy memcopy.h and wordcopy.c new df2b390 Detect Intel Goldmont and Airmont processors new 3038902 Move sysdeps/x86_64/cacheinfo.c to sysdeps/x86 new 8642c9a Remove x86 ifunc-defines.sym and rtld-global-offsets.sym new 6118b2d Support non-inclusive caches on Intel processors new aba9d00 Call init_cpu_features only if SHARED is defined new dff8bcd Remove alignments on jump targets in memset new 201aebf Check the HTT bit before counting logical threads new 07f9439 Correct Intel processor level type mask from CPUID new ed46697 Remove special L2 cache case for Knights Landing new b60dda5 Count number of logical processors sharing L2 cache
The 10 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference.
Summary of changes: sysdeps/i386/dl-machine.h | 4 + sysdeps/i386/i686/cacheinfo.c | 2 +- sysdeps/i386/i686/multiarch/Makefile | 1 - sysdeps/i386/i686/multiarch/ifunc-defines.sym | 19 -- sysdeps/x86/Makefile | 2 +- sysdeps/{x86_64 => x86}/cacheinfo.c | 244 ++++++++++++++------- sysdeps/x86/cpu-features-offsets.sym | 16 ++ sysdeps/x86/cpu-features.c | 8 + sysdeps/x86/cpu-features.h | 6 +- sysdeps/x86/rtld-global-offsets.sym | 7 - sysdeps/x86_64/dl-machine.h | 4 + sysdeps/x86_64/multiarch/Makefile | 1 - sysdeps/x86_64/multiarch/ifunc-defines.sym | 20 -- .../x86_64/multiarch/memset-vec-unaligned-erms.S | 37 +--- 14 files changed, 213 insertions(+), 158 deletions(-) delete mode 100644 sysdeps/i386/i686/multiarch/ifunc-defines.sym rename sysdeps/{x86_64 => x86}/cacheinfo.c (79%) delete mode 100644 sysdeps/x86/rtld-global-offsets.sym delete mode 100644 sysdeps/x86_64/multiarch/ifunc-defines.sym