This is an automated email from the git hooks/post-receive script.

tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-release-arm-mainline-allyesconfig in repository toolchain/ci/llvm-project.

from e99a087fff6 Merging r373389: adds 0a64fe56809 [ELF] Fix lld build on Windows/MinGW adds ed3f33f9dca [PowerPC] Implementing overflow version for XO-Form instructions adds 52ac91476dc [PowerPC] Fix crash in peephole optimization adds 64bdd8bc9fb [COFF] Don't error if the only inputs are from /wholearchive: adds 474037d798d Merging r370113: adds 98b1752888c Merging r366572: adds b9297dcdf2a [PowerPC] Do not emit HW loop if the body contains calls to [...]

No new revisions were added by this update.

Summary of changes: lld/COFF/Driver.cpp | 8 +- lld/ELF/Symbols.h | 24 +-- lld/test/COFF/entry-inference.test | 5 + lld/test/COFF/out.test | 5 +- lld/test/COFF/wholearchive.s | 4 + .../include/llvm/Demangle/MicrosoftDemangleNodes.h | 2 + llvm/lib/Target/PowerPC/P9InstrResources.td | 42 ++++-- llvm/lib/Target/PowerPC/PPCInstr64Bit.td | 44 +++--- llvm/lib/Target/PowerPC/PPCInstrInfo.cpp | 6 +- llvm/lib/Target/PowerPC/PPCInstrInfo.td | 110 ++++++++++---- llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp | 4 + llvm/lib/Target/RISCV/RISCVRegisterInfo.h | 6 + llvm/test/CodeGen/PowerPC/pr43527.ll | 75 +++++++++ llvm/test/CodeGen/PowerPC/pr44183.ll | 56 +++++++ .../MC/Disassembler/PowerPC/ppc64-encoding.txt | 126 ++++++++++++++++ .../MC/Disassembler/PowerPC/ppc64le-encoding.txt | 126 ++++++++++++++++ .../MC/PowerPC/invalid-instructions-spellcheck.s | 2 +- llvm/test/MC/PowerPC/ppc64-encoding.s | 168 +++++++++++++++------ 18 files changed, 683 insertions(+), 130 deletions(-) create mode 100644 llvm/test/CodeGen/PowerPC/pr43527.ll create mode 100644 llvm/test/CodeGen/PowerPC/pr44183.ll