This is an automated email from the git hooks/post-receive script.
tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_cross/gnu-master-arm-build_cross in repository toolchain/ci/binutils-gdb.
from ccdc02ed07 Fix function call regression in new evaluator adds 2dfa8341e0 ELF DWARF in PE output adds 3044062c34 Automatic date update in version.in adds 67b0f68480 bfd: strip symbols not representable in COFF/PE symbol table adds 319419837c x86: correct decoding of nop/reserved space (0f18 ... 0x1f) adds 00ec187565 x86: re-arrange order of decode for various legacy opcodes adds 14d10c6ccc x86: re-arrange order of decode for various VEX opcodes adds 13954a3119 x86: re-arrange order of decode for various mask reg opcodes adds fc681dd6a1 x86: re-arrange order of decode for various EVEX opcodes adds 066f82b96a x86: reuse VEX entries for EVEX vperm{q,pd} adds 85ba7507f6 x86: reuse further VEX entries for EVEX adds 32e31ad7da x86: re-arrange enumerator and table entry order adds b763d508db x86/Intel: correct AVX512 S/G disassembly adds 7056f312d0 Use bool for "parse_completion" adds 0b9f3e5463 Automatic date update in version.in adds ebdcad3fdd RISC-V: Improve multiple relax passes problem. adds da944c8a70 x86: remove stray uses of xmmq_mode adds ac7a231133 x86: drop a few redundant EVEX-related checks adds fd1fd06186 x86: re-order logic in OP_XMM()
No new revisions were added by this update.
Summary of changes: bfd/ChangeLog | 27 + bfd/cofflink.c | 11 + bfd/elf.c | 17 +- bfd/elfnn-riscv.c | 48 +- bfd/elfxx-riscv.h | 6 + bfd/version.h | 2 +- gas/ChangeLog | 18 + gas/testsuite/gas/i386/avx512f-intel.d | 256 +-- gas/testsuite/gas/i386/avx512f_vl-intel.d | 384 ++-- gas/testsuite/gas/i386/avx512pf-intel.d | 256 +-- gas/testsuite/gas/i386/i386.exp | 1 + gas/testsuite/gas/i386/nops-8.d | 2327 ++++++++++++++++++++++ gas/testsuite/gas/i386/nops-8.s | 19 + gas/testsuite/gas/i386/prefetch-intel.d | 8 +- gas/testsuite/gas/i386/prefetch.d | 8 +- gas/testsuite/gas/i386/x86-64-avx512f-intel.d | 260 +-- gas/testsuite/gas/i386/x86-64-avx512f_vl-intel.d | 448 ++--- gas/testsuite/gas/i386/x86-64-avx512pf-intel.d | 256 +-- gas/testsuite/gas/i386/x86-64-prefetch-intel.d | 8 +- gas/testsuite/gas/i386/x86-64-prefetch.d | 8 +- gdb/ChangeLog | 11 + gdb/ada-lang.c | 10 +- gdb/ada-lang.h | 12 +- gdb/parser-defs.h | 4 +- ld/ChangeLog | 18 + ld/emultempl/riscvelf.em | 6 +- ld/scripttempl/mcorepe.sc | 2 +- ld/testsuite/ld-riscv-elf/ld-riscv-elf.exp | 1 + ld/testsuite/ld-riscv-elf/restart-relax.d | 14 + ld/testsuite/ld-riscv-elf/restart-relax.s | 17 + ld/testsuite/ld-scripts/pr22267.d | 3 +- ld/testsuite/ld-scripts/pr22267.t | 2 +- opcodes/ChangeLog | 318 +++ opcodes/i386-dis-evex-len.h | 338 +--- opcodes/i386-dis-evex-mod.h | 64 +- opcodes/i386-dis-evex-prefix.h | 4 +- opcodes/i386-dis-evex-reg.h | 20 +- opcodes/i386-dis-evex-w.h | 148 +- opcodes/i386-dis-evex.h | 66 +- opcodes/i386-dis.c | 1812 ++++++----------- 40 files changed, 4616 insertions(+), 2622 deletions(-) create mode 100644 gas/testsuite/gas/i386/nops-8.d create mode 100644 gas/testsuite/gas/i386/nops-8.s create mode 100644 ld/testsuite/ld-riscv-elf/restart-relax.d create mode 100644 ld/testsuite/ld-riscv-elf/restart-relax.s