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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-next-allyesconfig in repository toolchain/ci/llvm-project.

from 8330dcadb84 [llvm-rc] Allow -1 for menu item IDs adds d2dd0fac483 Fix `-Wsign-compare` warning. NFC. adds cb6389360b0 Fix GCC warning on enum class bitfield. NFC. adds 14db82c929d [lldb][NFC] Fix typo in TestInvalidArgsLog adds 9619c2cc9a2 [clang][Syntax] Handle macro arguments in spelledForExpanded adds a44bf59c93b [SCCP] Remove unused toLatticeValue helper (NFC). adds 81f173ed0e2 [SCCP] Remove LatticeVal alias now that transition is done (NFC). adds 6a4f8423ae6 [libc] Only use __has_builtin on clang adds e6112a56dde [AsmPrinter] Emit .weak directive for weak linkage on COFF [...] adds 03bc311a16e [CorrelatedValuePropagation] Remove redundant if statement [...] adds fdc41aa22c6 [lld][ELF] Mark empty NOLOAD output sections SHT_NOBITS ins [...] adds 337b671b0d2 [InstCombine] Change limit-max-iterations test case; NFC adds 672e8bfbfcd [InstCombine] Fix worklist management in foldXorOfICmps() adds 3ab3f3c5d58 After 09158252f777c2e2f06a86b154c44abcbcf9bb74, fix build w [...] adds e8743c0f389 Const-initialize ParsedAttrInfos adds b1f78baeaa1 [InstCombine] Reduce code duplication in GEP of PHI transform; NFC adds 30d712103fa [InstCombine] Use replaceOperand() API in GEP transforms adds e5bf5037d86 [CodeGen] Fix sinking local values in lpads with phis adds 347e31c052d Remove constexpr that MSVC doesn't like adds 4065e92195b Upgrade some instances of std::sort to llvm::sort. NFC. adds ced0d1f42b3 [BPF] support 128bit int explicitly in layout spec adds 2d24d74b859 [AMDGPU] Stabilize sort order adds d3b6e1f1f93 [ADT] Automatically forward llvm::sort to array_pod_sort if safe adds 97cc1275c7d [InstCombine] Merge two functions; NFC adds 2215dcf1d75 [InstCombine] Remove unreachable blocks before DCE adds ba2e72c54ec [MDBuilder] Don't use stable sort for sorting integers. adds b578f130a72 [COFF] Stabilize sort adds dd030036f0a Put back initializers that were dropped in 0ab5b5b8581d9f29 [...] adds 9564f46766f AMDGPU: Make use of default operands adds 09d40218539 Fix compatibility for __builtin_stdarg_start adds fc93787d7e8 [MC][PowerPC] Make .reloc support arbitrary relocation types adds c0aa97b6327 [X86] Add cost model test cases for fmin/fmax reduction. adds 4bf015c035e [AlignmentFromAssumptions] Fix a SCEV assertion resulting f [...] adds 6dab8067123 [mlir] Add exp2 conversion to llvm.intr.exp2 adds a7115d51be0 [X86] X86CallFrameOptimization - generalize slow push code path adds 6ba63510720 [PostOrderIterator] Use SmallVector to store stack; NFC adds 49d00824bbb [VPlan] Use one VPWidenRecipe per original IR instruction. (NFC).

No new revisions were added by this update.

Summary of changes: clang-tools-extra/clang-doc/Representation.cpp | 6 +- clang-tools-extra/clang-tidy/ClangTidy.cpp | 2 +- .../clang-tidy/ClangTidyDiagnosticConsumer.cpp | 4 +- clang-tools-extra/clangd/index/Relation.cpp | 2 +- clang-tools-extra/modularize/CoverageChecker.cpp | 2 +- clang-tools-extra/modularize/Modularize.cpp | 2 +- clang/examples/Attribute/Attribute.cpp | 7 +- clang/include/clang/Basic/Builtins.def | 2 +- clang/include/clang/Sema/ParsedAttr.h | 4 +- clang/include/clang/Tooling/Syntax/Tokens.h | 18 +- clang/lib/Basic/Targets/BPF.h | 4 +- clang/lib/CodeGen/CGCUDANV.cpp | 29 +- clang/lib/CodeGen/CGCUDARuntime.h | 19 +- clang/lib/Sema/ParsedAttr.cpp | 4 +- clang/lib/Tooling/Syntax/Tokens.cpp | 101 +++- clang/test/CodeGen/target-data.c | 4 +- clang/test/Driver/lto-jobs.c | 2 +- clang/test/SemaCXX/vararg-non-pod.cpp | 7 + clang/tools/clang-scan-deps/ClangScanDeps.cpp | 30 +- clang/unittests/Tooling/Syntax/TokensTest.cpp | 58 ++- clang/utils/TableGen/ClangAttrEmitter.cpp | 35 +- clang/utils/TableGen/ClangOpenCLBuiltinEmitter.cpp | 2 +- clang/utils/TableGen/SveEmitter.cpp | 2 +- libc/src/string/memory_utils/memcpy_utils.h | 4 +- lld/COFF/PDB.cpp | 2 + lld/ELF/ScriptParser.cpp | 1 + lld/test/ELF/linkerscript/noload.s | 8 +- .../log/invalid-args/TestInvalidArgsLog.py | 2 +- llvm/include/llvm/ADT/PostOrderIterator.h | 3 +- llvm/include/llvm/ADT/STLExtras.h | 22 +- llvm/include/llvm/MC/MCAsmInfo.h | 7 +- llvm/include/llvm/Target/TargetOptions.h | 2 + llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp | 2 +- llvm/lib/CodeGen/SelectionDAG/FastISel.cpp | 17 +- llvm/lib/IR/MDBuilder.cpp | 2 +- llvm/lib/MC/MCAsmInfoCOFF.cpp | 2 +- llvm/lib/Support/Threading.cpp | 40 +- llvm/lib/Target/AMDGPU/GCNRegBankReassign.cpp | 8 +- llvm/lib/Target/AMDGPU/GCNRegPressure.h | 2 +- llvm/lib/Target/AMDGPU/SIInstructions.td | 46 +- llvm/lib/Target/AMDGPU/VOP1Instructions.td | 4 +- llvm/lib/Target/BPF/BPFTargetMachine.cpp | 4 +- .../Target/PowerPC/MCTargetDesc/PPCAsmBackend.cpp | 47 +- .../PowerPC/MCTargetDesc/PPCELFObjectWriter.cpp | 6 +- llvm/lib/Target/X86/X86CallFrameOptimization.cpp | 2 +- llvm/lib/Target/X86/X86PartialReduction.cpp | 2 +- .../Transforms/InstCombine/InstCombineAndOrXor.cpp | 1 + .../InstCombine/InstructionCombining.cpp | 76 +-- .../Transforms/Scalar/AlignmentFromAssumptions.cpp | 5 + .../Scalar/CorrelatedValuePropagation.cpp | 8 +- llvm/lib/Transforms/Scalar/SCCP.cpp | 210 ++++---- llvm/lib/Transforms/Vectorize/LoopVectorize.cpp | 17 +- llvm/lib/Transforms/Vectorize/VPRecipeBuilder.h | 5 +- llvm/lib/Transforms/Vectorize/VPlan.cpp | 3 +- llvm/lib/Transforms/Vectorize/VPlan.h | 25 +- llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp | 15 +- llvm/test/Analysis/CostModel/X86/reduce-fmax.ll | 110 +++++ llvm/test/Analysis/CostModel/X86/reduce-fmin.ll | 110 +++++ llvm/test/CodeGen/BPF/i128.ll | 67 +++ llvm/test/CodeGen/X86/atomic-idempotent.ll | 547 ++++++++++++++++----- .../CodeGen/X86/{coff-weak.ll => coff-linkonce.ll} | 0 llvm/test/CodeGen/X86/coff-weak.ll | 51 +- llvm/test/CodeGen/X86/dllexport-x86_64.ll | 16 +- llvm/test/CodeGen/X86/dllexport.ll | 14 +- llvm/test/CodeGen/X86/sink-local-value.ll | 36 ++ llvm/test/MC/PowerPC/ppc32-reloc-directive.s | 9 + llvm/test/MC/PowerPC/ppc64-reloc-directive.s | 9 + .../AlignmentFromAssumptions/amdgpu-crash.ll | 33 ++ llvm/test/Transforms/InstCombine/gepphigep.ll | 2 +- .../Transforms/InstCombine/limit-max-iterations.ll | 67 ++- .../InstCombine/xor-of-icmps-with-extra-uses.ll | 2 +- .../Transforms/Vectorize/VPlanHCFGTest.cpp | 26 +- mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td | 1 + mlir/include/mlir/Dialect/StandardOps/IR/Ops.td | 8 + .../Conversion/StandardToLLVM/StandardToLLVM.cpp | 2 + .../StandardToLLVM/convert-to-llvmir.mlir | 22 +- mlir/test/Target/llvmir-intrinsics.mlir | 9 + 77 files changed, 1469 insertions(+), 618 deletions(-) create mode 100644 llvm/test/Analysis/CostModel/X86/reduce-fmax.ll create mode 100644 llvm/test/Analysis/CostModel/X86/reduce-fmin.ll create mode 100644 llvm/test/CodeGen/BPF/i128.ll copy llvm/test/CodeGen/X86/{coff-weak.ll => coff-linkonce.ll} (100%) create mode 100644 llvm/test/Transforms/AlignmentFromAssumptions/amdgpu-crash.ll