This is an automated email from the git hooks/post-receive script.

tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-stable-allyesconfig in repository toolchain/ci/llvm-monorepo.

from 30ffad93013 [CodeGen] Replace '@' characters in block descriptors' symb [...] adds 8cac4ec796c [X86] Add custom type legalization for SIGN_EXTEND_VECTOR_I [...] adds 72c2927e891 [X86] Don't mark SEXTLOAD from v4i8/v4i16/v8i8 as Custom on [...] adds e222fdea47b [test] Remove flakiness decorator from TestObjCDynamicSBType adds 4ef2450ad58 [PowerPC] Fix ADDE, SUBE do not know how to promote operator adds 649be5807e4 [NFC] Fixed extra semicolon warning -This line, and those b [...] adds a4edcbf2554 [TypeName] Simplify operator!=. NFCI. adds 4f304dc353e [Type] Simplify operator!=. NFC. adds 0ca1077be16 [PowerPC] Fix machine verify pass error for PATCHPOINT pseu [...] adds 8bc6a184a03 [CommandInterpreter] Simplify PreprocessCommand. (NFCI) adds 12ab244e48c DeclAccessPair visualizer should be expandable adds 4517247c90c [llvm-objcopy] [COFF] Use Error/Expected returns instead of [...] adds 680216afb84 [AArch64] Implement the .arch_extension directive

No new revisions were added by this update.

Summary of changes: clang/utils/ClangVisualizers/clang.natvis | 4 + .../call-function/TestCallStopAndContinue.py | 2 - lldb/source/Interpreter/CommandInterpreter.cpp | 244 ++++---- lldb/source/Symbol/Type.cpp | 9 +- .../CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp | 5 + llvm/lib/Support/Error.cpp | 2 +- .../Target/AArch64/AsmParser/AArch64AsmParser.cpp | 47 ++ llvm/lib/Target/PowerPC/PPCISelLowering.cpp | 11 +- llvm/lib/Target/X86/X86ISelLowering.cpp | 55 +- llvm/test/CodeGen/PowerPC/ppc64-anyregcc-crash.ll | 2 +- llvm/test/CodeGen/PowerPC/ppc64-anyregcc.ll | 2 +- llvm/test/CodeGen/PowerPC/ppc64-patchpoint.ll | 8 +- llvm/test/CodeGen/PowerPC/ppc64-stackmap.ll | 2 +- llvm/test/CodeGen/PowerPC/pr39815.ll | 31 + llvm/test/CodeGen/X86/madd.ll | 94 ++- llvm/test/CodeGen/X86/pmovsx-inreg.ll | 18 +- llvm/test/CodeGen/X86/pmul.ll | 106 ++-- llvm/test/CodeGen/X86/vec_cast.ll | 7 +- llvm/test/CodeGen/X86/vec_int_to_fp.ll | 27 +- llvm/test/CodeGen/X86/vector-sext.ll | 696 ++++++++------------- llvm/test/CodeGen/X86/vsel-cmp-load.ll | 14 +- .../MC/AArch64/directive-arch_extension-nosimd.s | 6 + .../MC/AArch64/directive-arch_extension-simd.s | 6 + llvm/tools/llvm-objcopy/COFF/COFFObjcopy.cpp | 8 +- llvm/tools/llvm-objcopy/COFF/Reader.cpp | 54 +- llvm/tools/llvm-objcopy/COFF/Reader.h | 11 +- llvm/tools/llvm-objcopy/COFF/Writer.cpp | 37 +- llvm/tools/llvm-objcopy/COFF/Writer.h | 9 +- 28 files changed, 742 insertions(+), 775 deletions(-) create mode 100644 llvm/test/CodeGen/PowerPC/pr39815.ll create mode 100644 llvm/test/MC/AArch64/directive-arch_extension-nosimd.s create mode 100644 llvm/test/MC/AArch64/directive-arch_extension-simd.s