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from ad1bdf6 [AArch64] Guard Misaligned 128-bit store penalty by subtarget [...] new b782ce7 [x86] use a single shufps for 256-bit vectors when it can sav [...] new d834e08 [GlobalISel] Drop workaround for Legalizer member/class shari [...] new 94ab0f2 [libFuzzer] doc update

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Summary of changes: docs/LibFuzzer.rst | 3 -- lib/Target/AArch64/AArch64TargetMachine.cpp | 2 +- lib/Target/ARM/ARMTargetMachine.cpp | 2 +- lib/Target/X86/X86ISelLowering.cpp | 14 +++++++++- lib/Target/X86/X86TargetMachine.cpp | 2 +- test/CodeGen/X86/pmul.ll | 16 ++++------- test/CodeGen/X86/vector-shuffle-256-v8.ll | 43 ++++++++--------------------- 7 files changed, 34 insertions(+), 48 deletions(-)