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unknown user pushed a change to branch users/ibhagat/try-sframe-next in repository binutils-gdb.

discards 5e2ead1b945 [5/5] sframe: doc: update documentation for pauth key in SF [...] discards 948100e6931 [4/5] gas: sframe: testsuite: add testcase for .cfi_b_key_frame discards a098f30a407 [3/5] objdump/readelf: sframe: emit marker for SFrame FDE w [...] discards e8ccffdc559 [2/5] gas: sframe: add support for .cfi_b_key_frame discards b25bdcee547 [1/5] sframe.h: add support for .cfi_b_key_frame adds bd1473135af Automatic date update in version.in adds 309b9a1abf7 gprofng: PR29646 Various warnings adds 09d236daec8 sim: dv-core: add hw_detach_address method [PR sim/25211] adds 043f950abeb sim: ppc: change spreg switch table generation to compile-time adds b3737aadf1b Re: x86: remove i386-opc.c adds 9d099144928 PR29915, bfdio.c does not compile with mingw.org's MinGW adds 106791196f9 bfd: Discard symbol regardless of warning flag adds a61ce0ce48c Fix install-strip target adds 0d90ae96c56 Automatic date update in version.in adds ee3314c4360 sim: ppc: move spreg.[ch] files to the source tree adds 897903a2104 sim: ppc: drop old dgen.c generator adds d026e67ed41 sim: move register headers into sim/ namespace [PR sim/29869] adds ffeb72b44c8 sim: sim_cpu: invert sim_cpu storage adds 6adb1071134 sim: bfin: invert sim_cpu storage adds 6780d3731ea sim: ft32: invert sim_cpu storage adds 1c867d708c2 sim: msp430: invert sim_cpu storage adds 778ef9bcbb2 sim: moxie: invert sim_cpu storage adds f246dc72853 sim: avr: invert sim_cpu storage adds 9dfc46c3d95 sim: microblaze: invert sim_cpu storage adds 6a08ae198bb sim: aarch64: invert sim_cpu storage adds 620dd532fe2 sim: mcore: invert sim_cpu storage adds 6d53d069929 sim: v850: invert sim_cpu storage adds 8e9408080bf sim: mips: invert sim_cpu storage adds 79d784aef98 sim: m68hc11: invert sim_cpu storage adds 3fbdc6f9084 sim: h8300: invert sim_cpu storage adds 86ecb89bb72 sim: example-synacor: invert sim_cpu storage adds 3d165c11f0a sim: pru: invert sim_cpu storage adds 5409cab77ed sim: riscv: invert sim_cpu storage adds 53891d9a7cc sim: cgen: prep for inverting sim_cpu storage adds ef7878a2865 sim: bpf: invert sim_cpu storage adds 8681713743b sim: cris: invert sim_cpu storage adds 811727abbd8 sim: frv: invert sim_cpu storage adds 06f4b7b6d11 sim: iq2000: invert sim_cpu storage adds 63c56923057 sim: lm32: invert sim_cpu storage adds 9a9db21d129 sim: m32r: invert sim_cpu storage adds 4c3c31719b1 sim: or1k: invert sim_cpu storage adds 4a21ad1e766 sim: enable common sim_cpu usage everywhere adds 8df77a27a3a sim: fully merge sim_cpu_base into sim_cpu adds 8f2c64de86b PR29922, SHT_NOBITS section avoids section size sanity check adds c63d4862812 enable-non-contiguous-regions warnings adds 6b7d3204b5a gprofng/testsuite: restrict testing to native configurations adds 9c19e9ec4df x86: rename CheckRegSize to CheckOperandSize adds a7a32d588f2 Keep the .drectve section when performing a relocateable link. adds 75393a2d54b Fix an attempt to allocate an unreasonably large amount of [...] adds ea6ed58e630 Updated Romanian translation for the BFD sub-directory. adds 68ce1575fc9 gdb/c++: validate 'using' directives based on the current line adds 99118062785 Use toplevel configure for GMP and MPFR for gdb adds f7cb9bba3d5 Fix compiling of top.c adds d28fbc7197b PR29925, Memory leak in find_abstract_instance adds e9c4e2d24f9 Automatic date update in version.in adds d47ea1b9c1f sim: build: hoist lists of common objects up adds 3d042117867 sim: build: hoist lists of hw devices up adds f4ac2306058 sim: hw-config.h: move generation to top-level adds 0fb6c560ffa sim: mips: always resolve active bfd mach dynamically adds 2d5700ad4e6 sim: mips: move subtarget defines to top-level configure adds 19b11256a55 sim: mips: move bitsize defines to top-level configure adds d455df988ab sim: mips: move fpu bitsize defines to top-level configure adds 2011a547790 sim: mips: match target on cpu settings adds 4d97c5c833e x86: re-work ISA extension dependency handling adds 5091b9ee34b x86: correct what gets disabled by certain ".arch .no*" adds 88bd2203efa x86: correct SSE dependencies adds b20f4261740 x86: add dependencies on AVX2 adds b236b82a1ae x86: rework noavx512-1 testcase adds 9a019125a64 x86: correct dependencies of a few AVX512 sub-features adds af1ad9aac5b x86: correct XSAVE* dependencies adds 25626f7939d x86: add dependencies on VMX adds 0919e770af0 x86: add dependencies on SVME adds 760ab3d0dbe x86: correct/improve TSX controls adds a5ce326cfeb gas: re-arrange listing output for .irp and alike adds 41eed6e1878 sframe.h: add support for .cfi_b_key_frame adds 3369de90b81 gas: sframe: add support for .cfi_b_key_frame adds 95e829affb0 objdump/readelf: sframe: emit marker for SFrame FDE with B key adds d429702d9e9 gas: sframe: testsuite: add testcase for .cfi_b_key_frame adds 2440ed038a2 sframe: doc: update documentation for pauth key in SFrame FDE new fa37c6deeba libsframe: fix a memory leak in sframe_decode new 24f8c4d336b libsframe: testsuite: fix memory leaks in testcases

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Summary of changes: Makefile.def | 2 + Makefile.in | 2 + bfd/ChangeLog | 4 + bfd/bfdio.c | 11 +- bfd/config.in | 4 + bfd/configure | 12 + bfd/configure.ac | 1 + bfd/dwarf2.c | 43 +- bfd/elf32-arm.c | 2 +- bfd/elf32-csky.c | 2 +- bfd/elf32-hppa.c | 6 +- bfd/elf32-m68hc11.c | 2 +- bfd/elf32-m68hc12.c | 2 +- bfd/elf32-metag.c | 2 +- bfd/elf32-nios2.c | 2 +- bfd/elf64-ppc.c | 29 +- bfd/elflink.c | 20 +- bfd/elfnn-aarch64.c | 2 +- bfd/po/ro.po | 4039 ++++++++++---------- bfd/version.h | 2 +- bfd/xcofflink.c | 2 +- binutils/ChangeLog | 6 + binutils/objdump.c | 4 +- configure | 67 +- configure.ac | 45 +- gas/config/tc-i386.c | 109 +- gas/doc/c-i386.texi | 5 +- gas/listing.c | 24 +- gas/testsuite/gas/i386/i386.exp | 2 +- gas/testsuite/gas/i386/noavx512-1.l | 823 ++-- gas/testsuite/gas/i386/noavx512-1.s | 177 +- gdb/Makefile.in | 16 +- gdb/README | 28 +- gdb/arm-tdep.c | 2 +- gdb/bfin-tdep.c | 2 +- gdb/config.in | 6 - gdb/configure | 1014 +---- gdb/configure.ac | 31 +- gdb/cp-namespace.c | 15 +- gdb/doc/gdb.texinfo | 13 +- gdb/dwarf2/read.c | 29 +- gdb/frv-tdep.c | 2 +- gdb/ft32-tdep.c | 2 +- gdb/lm32-tdep.c | 2 +- gdb/m32c-tdep.c | 2 +- gdb/namespace.c | 25 + gdb/namespace.h | 16 +- gdb/rs6000-tdep.c | 2 +- gdb/sh-tdep.c | 2 +- gdb/target-float.c | 8 - gdb/testsuite/gdb.cp/nsusing.cc | 3 +- gdb/testsuite/gdb.cp/nsusing.exp | 16 +- gdb/top.c | 9 - gprofng/common/core_pcbe.c | 2 + gprofng/libcollector/iolib.c | 2 +- gprofng/libcollector/iotrace.c | 7 +- gprofng/libcollector/libcol_util.c | 2 +- gprofng/libcollector/linetrace.c | 2 +- gprofng/src/Command.cc | 2 +- gprofng/src/Function.cc | 2 + gprofng/src/Settings.cc | 2 +- gprofng/src/checks.cc | 2 +- gprofng/src/ipc.cc | 12 +- gprofng/testsuite/gprofng.display/display.exp | 7 + include/{gdb => sim}/sim-aarch64.h | 0 include/{gdb => sim}/sim-arm.h | 0 include/{gdb => sim}/sim-bfin.h | 0 include/{gdb => sim}/sim-cr16.h | 0 include/{gdb => sim}/sim-d10v.h | 0 include/{gdb => sim}/sim-frv.h | 0 include/{gdb => sim}/sim-ft32.h | 0 include/{gdb => sim}/sim-h8300.h | 0 include/{gdb => sim}/sim-lm32.h | 0 include/{gdb => sim}/sim-m32c.h | 0 include/{gdb => sim}/sim-ppc.h | 0 include/{gdb => sim}/sim-riscv.h | 0 include/{gdb => sim}/sim-rl78.h | 0 include/{gdb => sim}/sim-rx.h | 0 include/{gdb => sim}/sim-sh.h | 0 ld/ChangeLog | 7 + ld/ldlang.c | 38 +- ld/scripttempl/pe.sc | 2 +- ld/scripttempl/pep.sc | 2 +- ld/testsuite/ld-arm/arm-elf.exp | 1 + ld/testsuite/ld-arm/non-contiguous-arm.d | 2 +- ld/testsuite/ld-arm/non-contiguous-arm4.d | 2 +- ld/testsuite/ld-arm/non-contiguous-arm7.d | 4 + ld/testsuite/ld-arm/non-contiguous-arm7.err | 4 + ld/testsuite/ld-arm/non-contiguous-arm7.ld | 32 + ld/testsuite/ld-arm/non-contiguous-arm7.s | 16 + ld/testsuite/ld-powerpc/non-contiguous-powerpc.d | 2 +- ld/testsuite/ld-powerpc/non-contiguous-powerpc64.d | 2 +- libsframe/sframe-impl.h | 15 +- libsframe/sframe.c | 9 + libsframe/testsuite/libsframe.decode/be-flipping.c | 3 + libsframe/testsuite/libsframe.decode/frecnt-1.c | 3 + libsframe/testsuite/libsframe.decode/frecnt-2.c | 3 + opcodes/i386-gen.c | 821 ++-- opcodes/i386-init.h | 1287 ++++--- opcodes/i386-opc.h | 6 +- opcodes/i386-opc.tbl | 1014 ++--- opcodes/po/POTFILES.in | 1 - sim/Makefile.in | 285 +- sim/aarch64/cpustate.c | 242 +- sim/aarch64/cpustate.h | 2 +- sim/aarch64/interp.c | 5 +- sim/aarch64/sim-main.h | 6 +- sim/aarch64/simulator.c | 5 +- sim/arch-subdir.mk.in | 8 +- sim/arm/sim-main.h | 5 - sim/arm/wrapper.c | 2 +- sim/avr/interp.c | 199 +- sim/avr/sim-main.h | 6 +- sim/bfin/Makefile.in | 35 +- sim/bfin/interp.c | 5 +- sim/bfin/local.mk | 34 + sim/bfin/machs.c | 2 +- sim/bfin/sim-main.h | 8 +- sim/bpf/cpu.h | 2 +- sim/bpf/sim-if.c | 2 +- sim/bpf/sim-main.h | 14 +- sim/common/Make-common.in | 65 +- sim/common/cgen-cpu.h | 5 + sim/common/dv-core.c | 18 + sim/common/local.mk | 75 + sim/common/sim-cpu.c | 18 +- sim/common/sim-cpu.h | 61 +- sim/configure | 79 +- sim/configure.ac | 1 + sim/cr16/interp.c | 2 +- sim/cr16/sim-main.h | 5 - sim/cris/Makefile.in | 6 +- sim/cris/cpuv10.h | 2 +- sim/cris/cpuv32.h | 2 +- sim/cris/cris-tmpl.c | 19 +- sim/cris/local.mk | 3 + sim/cris/sim-if.c | 31 +- sim/cris/sim-main.h | 15 +- sim/cris/traps.c | 412 +- sim/d10v/interp.c | 2 +- sim/d10v/sim-main.h | 5 - sim/example-synacor/interp.c | 3 +- sim/example-synacor/sim-main.c | 72 +- sim/example-synacor/sim-main.h | 7 +- sim/frv/cpu.h | 2 +- sim/frv/frv.c | 2 +- sim/frv/sim-if.c | 2 +- sim/frv/sim-main.h | 35 +- sim/ft32/ft32-sim.h | 4 +- sim/ft32/interp.c | 181 +- sim/ft32/sim-main.h | 9 - sim/h8300/compile.c | 61 +- sim/h8300/sim-main.h | 9 +- sim/iq2000/cpu.h | 2 +- sim/iq2000/sim-if.c | 3 +- sim/iq2000/sim-main.h | 11 +- sim/lm32/Makefile.in | 6 +- sim/lm32/cpu.h | 2 +- sim/lm32/lm32-sim.h | 2 +- sim/lm32/local.mk | 3 + sim/lm32/sim-if.c | 3 +- sim/lm32/sim-main.h | 12 +- sim/m32c/gdb-if.c | 2 +- sim/m32r/Makefile.in | 6 +- sim/m32r/cpu.h | 2 +- sim/m32r/cpu2.h | 2 +- sim/m32r/cpux.h | 2 +- sim/m32r/local.mk | 3 + sim/m32r/sim-if.c | 3 +- sim/m32r/sim-main.h | 13 +- sim/m68hc11/Makefile.in | 4 +- sim/m68hc11/dv-m68hc11.c | 134 +- sim/m68hc11/dv-m68hc11eepr.c | 42 +- sim/m68hc11/dv-m68hc11sio.c | 76 +- sim/m68hc11/dv-m68hc11spi.c | 45 +- sim/m68hc11/dv-m68hc11tim.c | 128 +- sim/m68hc11/emulos.c | 4 +- sim/m68hc11/interp.c | 59 +- sim/m68hc11/interrupts.c | 14 +- sim/m68hc11/local.mk | 3 + sim/m68hc11/m68hc11_sim.c | 195 +- sim/m68hc11/sim-main.h | 114 +- sim/mcore/interp.c | 59 +- sim/mcore/sim-main.h | 7 +- sim/microblaze/interp.c | 7 +- sim/microblaze/microblaze.h | 2 +- sim/microblaze/sim-main.h | 5 +- sim/mips/Makefile.in | 10 +- sim/mips/acinclude-top.m4 | 61 + sim/mips/aclocal.m4 | 2 - sim/mips/configure | 227 +- sim/mips/configure.ac | 126 +- sim/mips/interp.c | 112 +- sim/mips/local.mk | 3 + sim/mips/sim-main.h | 62 +- sim/mn10300/Makefile.in | 4 +- sim/mn10300/local.mk | 3 + sim/mn10300/sim-main.h | 11 - sim/moxie/interp.c | 9 +- sim/moxie/sim-main.h | 16 +- sim/msp430/msp430-sim.c | 212 +- sim/msp430/msp430-sim.h | 2 +- sim/msp430/sim-main.h | 10 +- sim/or1k/cpu.h | 2 +- sim/or1k/or1k.c | 36 +- sim/or1k/sim-if.c | 3 +- sim/or1k/sim-main.h | 12 +- sim/or1k/traps.c | 18 +- sim/ppc/Makefile.in | 37 +- sim/ppc/configure | 2 +- sim/ppc/configure.ac | 2 +- sim/ppc/dgen.c | 335 -- sim/ppc/gdb-sim.c | 2 +- sim/ppc/local.mk | 10 + sim/ppc/options.c | 4 - sim/ppc/spreg-gen.py | 305 ++ sim/ppc/spreg.c | 1175 ++++++ sim/ppc/spreg.h | 108 + sim/pru/interp.c | 30 +- sim/pru/pru.h | 2 +- sim/pru/sim-main.h | 5 +- sim/riscv/interp.c | 3 +- sim/riscv/sim-main.c | 441 ++- sim/riscv/sim-main.h | 5 +- sim/rl78/gdb-if.c | 2 +- sim/rx/gdb-if.c | 2 +- sim/sh/interp.c | 2 +- sim/sh/sim-main.h | 5 - sim/v850/interp.c | 15 +- sim/v850/sim-main.h | 22 +- sim/v850/v850.igen | 4 +- 231 files changed, 8614 insertions(+), 7916 deletions(-) rename include/{gdb => sim}/sim-aarch64.h (100%) rename include/{gdb => sim}/sim-arm.h (100%) rename include/{gdb => sim}/sim-bfin.h (100%) rename include/{gdb => sim}/sim-cr16.h (100%) rename include/{gdb => sim}/sim-d10v.h (100%) rename include/{gdb => sim}/sim-frv.h (100%) rename include/{gdb => sim}/sim-ft32.h (100%) rename include/{gdb => sim}/sim-h8300.h (100%) rename include/{gdb => sim}/sim-lm32.h (100%) rename include/{gdb => sim}/sim-m32c.h (100%) rename include/{gdb => sim}/sim-ppc.h (100%) rename include/{gdb => sim}/sim-riscv.h (100%) rename include/{gdb => sim}/sim-rl78.h (100%) rename include/{gdb => sim}/sim-rx.h (100%) rename include/{gdb => sim}/sim-sh.h (100%) create mode 100644 ld/testsuite/ld-arm/non-contiguous-arm7.d create mode 100644 ld/testsuite/ld-arm/non-contiguous-arm7.err create mode 100644 ld/testsuite/ld-arm/non-contiguous-arm7.ld create mode 100644 ld/testsuite/ld-arm/non-contiguous-arm7.s create mode 100644 sim/mips/acinclude-top.m4 delete mode 100644 sim/ppc/dgen.c create mode 100755 sim/ppc/spreg-gen.py create mode 100644 sim/ppc/spreg.c create mode 100644 sim/ppc/spreg.h