This is an automated email from the git hooks/post-receive script.
tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk/llvm-master-arm-spec2k6-O2 in repository toolchain/ci/llvm-project.
from 00e3968b8a4 DWARF: port debug_ranges/rnglists over to DWARFContext adds 0aecabae141 Revert "Revert r363377: [yaml2obj] - Allow setting custom s [...] adds 76d575312d6 [LLD][ELF] - Fix test case after r363401 adds d1cc2e1543e [ARM] Add MVE horizontal accumulation instructions adds 2dd0053d3ad EditlineTest: Improve error message adds 0feebef501f [libcxx] Add XFAIL for facet test when back-deploying to ol [...] adds 492d71cc99d AMDGPU: Fold readlane intrinsics of constants adds d85dd0f0c9e [Attributor] Introduce bit-encodings for abstract states adds 282d34ee78c [Attributor] Disable the Attributor by default and fix a comment adds 7ea378b940b [CodeGenPrepare] propagate debuginfo when copying a shuffle adds c2864c0de07 GlobalISel: Avoid producing Illegal copies in RegBankSelect adds 75312aa805c [x86] move vector shift tests for PR37428; NFC adds 38be2c65b62 Make crashlog.py less noisy adds 573ffd88a0e Python 3: decode string as utf-8 to avoid type mismatch. adds cabce71845f [AMDGPU] Enable the implicit arguments for HIP (CLANG) adds 7a21113ce80 Reland: [Remarks] Refactor optimization remarks setup adds cdf339266b4 [AMDGPU] gfx1010 BoolReg definition. NFC. adds fece7c6c831 [FPEnv] Lower STRICT_FP_EXTEND and STRICT_FP_ROUND nodes in [...] adds ffeb01c113a [AMDGPU] Don't constrain callees with inlinehint from inlin [...] adds 96a15796fbe Remove two unused parameters adds 2874d285b9f build: don't attempt to run config.guess on Windows adds bea12861558 Wrap a test to 80 columns adds f2e60fc4e8c [SimpligyCFG] NFC intended, remove GCD that was only used f [...] adds c9e3dbb0a51 [PowerPC][NFC] Format comments in P9InstrResrouce.td adds 5c7fcbdc4ba [GISel]: Fix pattern matcher for m_OneUse adds e1b4b1b46e4 Revert [LFTR] Rename variable to minimize confusion [NFC] adds a19809045c0 Revert [LFTR] Stylistic cleanup as suggested in last review [...] adds dcdd12b68c2 Revert Fix a bug w/inbounds invalidation in LFTR adds 24cdcadcc5e C++ DR712 and others: handle non-odr-use resulting from an [...] adds 27252a1f954 PR23833, DR2140: an lvalue-to-rvalue conversion on a glvalu [...] adds 14059d2a136 Remove unused SK_LValueToRValue initialization step. adds b20fefc89b8 [COFF] Allow setting subsystem versions while inferring the [...] adds 6f047ae58ba [MinGW] Support the --{major,minor}-{os,subsystem}-version options adds ff4e0a9f3e4 [MinGW] Support the --subsystem=val option in joined form adds f79d3bc7242 [GlobalISel] Add a G_BRJT opcode. adds 5254f0a9aba [OpenMP] Avoid emitting maps for target link variables when [...] adds 3819e68b9c9 gn build: Simplify Target build files adds 6e4957eb77f gn build: Add NVPTX target adds 28defa70ead Remove stale comment and disabled code (NFC) adds 0b0851399e3 [Remarks] Use the RemarkSetup error in setupOptimizationRemarks adds 2b9f6caa71f build: extract LLVM distribution target handling adds 6df47ef22b2 Don't try to parse ObjC method if CU isn't ObjC adds 2ade4f6f72e attempt to unbreak buildbots adds 0784e01a98a [libFuzzer] Disable len_control by default if LLVMFuzzerCus [...] adds 1b091540d28 [JITLink] Move JITLinkMemoryManager into its own header. adds 3f39123d15b [libFuzzer] simplify the DFT trace collection using the new [...] adds 7fa2b74e988 Use getOperatorSpelling to get the spelling of an overloade [...] adds da70fc0c5f5 PR42071: Reject weird names for non-type template parameters. adds 501bb982b93 [x86] add test for 256-bit blendv with AVX targets; NFC adds b48e44a65cf [OpenMP] Add task alloc function adds 49b965079b1 Use unsigned for bitfields to avoid sign extension adds 545a9fe1063 [OpenMP] Add target task alloc function with device ID adds 0a72bfbfdc8 UpdateTestChecks: Consider .section as end of function for AMDGPU adds 1509fde8916 AMDGPU: Add baseline test for call waitcnt insertion adds 1c5a87956fb AMDGPU: Set isTrap on S_TRAP adds 9e5fa333782 AMDGPU: Fix dropping memref for ds append/consume adds c3b1d730d69 [COFF] Handle .eh_frame$symbol as associative comdat for MinGW adds 2de984cd304 [COFF] Strip section name suffix from mingw comdats adds f4335b8e3c6 Implement GetSharedLibraryInfoAddress adds bb0a6105992 AMDGPU: Fix capitalized register names in asm constraints adds e6efb6433f7 SROA: Add baseline test for addrspacecast changes adds bbab7acedf4 [PowerPC][NFC] Comments update and remove some unused def adds 282dac717eb SROA: Allow eliminating addrspacecasted allocas adds 5501dda2479 [Remarks][NFC] Improve testing and documentation of -foptim [...] adds af857b93df3 Add --print-supported-cpus flag for clang. adds aa41e92e17a AMDGPU: Avoid most waitcnts before calls adds 05e48cb9fab Include the file in the new unknown codeview subsection warning adds 6cb2d9dbd2d [CodeGen][ObjC] Annotate retain-agnostic ObjC globals with [...] adds a704a8f28c4 [ObjC][ARC] Delete ObjC runtime calls on global variables a [...] adds 2fa6838e5fe [libFuzzer] fix -Werror build adds db88fc56b96 [libFuzzer] implement a better queue for the fork mode. Add [...] adds d2210af3322 [MBP] Move a latch block with conditional exit and multi pr [...] adds 9967a6c60ab [X86] Add checks that immediate for reducesd/ss fits in 8-bits. adds 0feed5d585f [libFuzzer] in autofocus mode, give more weight to function [...] adds 69394bedc54 adding more fmf propagation for selects plus tests adds 9a2e7784b15 Fixed the --print-supported-cpus test adds 0d44f129bb9 Revert "GlobalISel: Avoid producing Illegal copies in RegBa [...] adds dda3597288d Add a map_range function for applying map_iterator to a range. adds 9487278010c Reapply "GlobalISel: Avoid producing Illegal copies in RegB [...] adds dc2fd6a14e7 [InstCombine] Add tests to show missing fold opportunity fo [...] adds 0b1ea8cb282 Improve error message when '=' is missing in {ASAN,...}_OPTIONS. adds f1e6f5713ca [clangd] Index API and implementations for relations adds 968b5f84af2 Revert "adding more fmf propagation for selects plus tests" adds 744870f4690 [compiler-rt] Respect CMAKE_NM adds ad6bb86b2dc adding more fmf propagation for selects plus updated tests adds 899a3072f09 [objcopy] Error when --preserve-dates is specified with sta [...] adds 44cc4e93516 [RISCV] Simplify RISCVAsmBackend::writeNopData(). NFC adds e1aa69f7557 [RISCV] Regenerate remat.ll and atomic-rmw.ll after D43256 adds 0bb4d46b2be [clang] perform semantic checking in constant context adds 9145562b487 [SimplifyIndVar] Simplify non-overflowing saturating add/sub adds 8550fb386a3 [SCEV] Use unsigned/signed intersection type in SCEV adds 077f13c612c [analyzer] ReturnVisitor: Bypass everything to see inlined calls adds b6dc09e725b [BranchProbability] Delete a redundant overflow check adds 83c7b61052b [clang] Add storage for APValue in ConstantExpr adds 922759a63d7 [Clang] Rename -split-dwarf-file to -split-dwarf-output adds 2d51adcb571 [PowerPC] Set the innermost hot loop to align 32 bytes adds e1dc495e630 [Clang] Harmonize Split DWARF options with llc adds 680c43b73a3 [NFC][MCA][X86] Add baseline test coverage for AMD Barcelon [...] adds 5dd61974f94 [NFC][MCA][X86] Add one more 'clear super register' pattern [...] adds 990f3ceb676 [X86][AVX] Decode constant bits from insert_subvector(c1, c2, c3) adds 90e87af303a [X86][AVX] Handle lane-crossing shuffle(extract_subvector(x [...] adds 456ca5d7f70 [X86] CombineShuffleWithExtract - assert all src ops types [...] adds 0a29028072f Recommit r363298 "[lit] Disable test on darwin when buildin [...] adds 186ca60e512 add header to help with template testing adds b3fc9fde2c7 Fix gcc-05.4 bot failures caused by in r363481 "[clangd] In [...] adds f6db5342240 gn build: Merge r363444 adds a552508841a [clangd] Type hierarchy subtypes adds fcffc2faccf [X86] CombineShuffleWithExtract - handle cases with differe [...] adds d14389c0a55 [x86] split 256-bit vector selects if operands are vector concats adds 9ff09d49dae [analyzer][NFC] Tease apart and clang-format NoStoreFuncVisitor adds 33b46a6df0b [analyzer] Track indices of arrays adds c8d88ad1a91 [CodeGenPrepare][x86] shift both sides of a vector select w [...] adds e20b388e2f9 [analyzer] Push correct version of 'Track indices of arrays' adds 52500216727 [AMDGPU] gfx10 conditional registers handling adds 490e83cd438 AMDGPU/GFX10: Support DLC bit in llvm.amdgcn.s.buffer.load [...] adds 4d4ef2a1671 [analyzer] ReturnVisitor: more portable test case adds 6d71be4e67e AMDGPU: Be explicit about whether the high-word in SI_PC_AD [...] adds 41abf2766e2 AMDGPU: Prepare for explicit absolute relocations in code g [...] adds 3a92aa29992 [docs] Fix a few problems with clang-tool docs to get the b [...] adds 2da0b89d92f [AsmPrinter] Make EmitLinkage and EmitVisibility public adds 9d8c94dfd76 [docs] Fix another bot warning by adding a blank line to se [...] adds 9b2d96024ae [docs] Fix another bot error by setting highlight language [...] adds 5a663bd77ac [InstSimplify] Fix addo/subo undef folds (PR42209) adds 9f2f1270096 [X86] Add TB_NO_REVERSE to some folding table entries where [...] adds 13de174b4c4 [llvm-objcopy] Add elf32-sparc and elf32-sparcel target adds 4f157320676 [yaml2obj][MachO] Don't fill dummy data for virtual sections adds 1d1cf30b738 PowerPC: Optimize SPE double parameter calling setup adds ee62c40eae9 [SimplifyCFG] Fix prof branch_weights MD while removing unr [...] adds a71ce4f1e8e DWARF: Avoid storing DIERefs in long-lived containers adds a9e5d2f35dd Re-commit r357452 (take 3): "SimplifyCFG SinkCommonCodeFrom [...] adds 966f4e874e0 [ARM] Extract some code from ARMConstantIslandPass adds f7c0b3aeb22 [ARM] Add ARMBasicBlockInfo.cpp adds a059efa885f [ARM] Remove ARMComputeBlockSize adds 5d6ee76c163 Describe stack-id as an enum adds 89d6905c595 [ARM] Fix -Wunused-variable in -DLLVM_ENABLE_ASSERTIONS=off [...] adds 4bde5d3c081 [ARM] Fix another -Wunused-variable in -DLLVM_ENABLE_ASSERT [...] adds 43cf5ae48a0 [lldb] [test] Skip watchpoint tests on NetBSD if userdbregs [...] adds 25a043e78a9 [NFC][Codegen] Standalone tests for icmp eq/ne (urem %x, C) [...] adds ac14f7b10cf [lit] Delete empty lines at the end of lit.local.cfg NFC adds 46f9cbe28d4 [llvm-objdump] Use %08 instead of %016 to print leading add [...] adds 60d6fb2a634 [SCEV] Use NoWrapFlags when expanding a simple mul adds 9d81915fcaa Recommit [OpenCL] Move OpenCLBuiltins.td and remove unused include adds ef78e55205e [SelectionDAG] Fold insert_subvector(undef, extract_subvect [...] adds 5401c2db6ee Fix clang -Wcovered-switch-default after stack-id change by D60137 adds 2e46312ffd1 [DAGCombiner] [CodeGenPrepare] More comprehensive GEP splitting adds d5323f6a707 [libunwind][AArch64] Fix libunwind::Registers_arm64::jumpto adds 74ac20158a0 Test forward references in IntrinsicEmitter on Neon LD(2|3|4) adds 83773b77a5a [LV] Deny irregular types in interleavedAccessCanBeWidened adds 37b75336823 Promote -fdebug-compilation-dir from a cc1 flag to clang an [...] adds d2aab283e25 gn build: Merge r363530 adds 582f2692945 AsmPrinter: add doc-string for EmitLinkage adds d3d2edf901d [lldb] [test] Watchpoint tests can be always run as root on NetBSD adds f1e2827170b [X86][SSE] Avoid unnecessary stack codegen in NT store code [...] adds e40f879eb2c [HIP] Add the interface deriving the stub name of device kernels. adds d53027697ca [clangd] Detect C++ for extension-less source files in vsco [...] adds 7dc917603be [clangd] Bump vscode-clangd v0.0.15. adds 1bd3d00e7e5 [CodeGen] Check for HardwareLoop Latch ExitBlock adds 2dda1ff0380 Fix a '>= 0' test on unsigned that I inadvertantly introduc [...] adds e683eba0ed3 AMDGPU: Cleanup custom PseudoSourceValue definitions adds 29e792659b6 AMDGPU/GlobalISel: Fix default mapping for non-register operands adds f3b64d80bcc AMDGPU: Mark exp/exp.compr as inaccessiblememonly new b10f0978334 AMDGPU: Ignore subtarget for InferAddressSpaces new 1df203d78e4 InferAddressSpaces: Fix cloning original addrspacecast
The 2 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference.
Summary of changes: clang-tools-extra/clangd/ClangdServer.cpp | 11 +- clang-tools-extra/clangd/FindSymbols.cpp | 60 +- clang-tools-extra/clangd/FindSymbols.h | 5 + clang-tools-extra/clangd/XRefs.cpp | 54 +- clang-tools-extra/clangd/XRefs.h | 6 +- .../clangd/clients/clangd-vscode/package.json | 6 +- clang-tools-extra/clangd/index/Background.cpp | 26 +- clang-tools-extra/clangd/index/FileIndex.cpp | 70 +- clang-tools-extra/clangd/index/FileIndex.h | 13 +- clang-tools-extra/clangd/index/Index.cpp | 6 + clang-tools-extra/clangd/index/Index.h | 19 + clang-tools-extra/clangd/index/IndexAction.cpp | 9 +- clang-tools-extra/clangd/index/IndexAction.h | 1 + clang-tools-extra/clangd/index/MemIndex.cpp | 30 +- clang-tools-extra/clangd/index/MemIndex.h | 27 +- clang-tools-extra/clangd/index/Merge.cpp | 27 +- clang-tools-extra/clangd/index/Merge.h | 3 + clang-tools-extra/clangd/index/Relation.h | 27 + clang-tools-extra/clangd/index/Serialization.cpp | 6 +- clang-tools-extra/clangd/index/dex/Dex.cpp | 30 +- clang-tools-extra/clangd/index/dex/Dex.h | 26 +- clang-tools-extra/clangd/indexer/IndexerMain.cpp | 8 + clang-tools-extra/clangd/test/type-hierarchy.test | 31 +- .../clangd/unittests/BackgroundIndexTests.cpp | 26 +- .../clangd/unittests/CodeCompleteTests.cpp | 44 +- clang-tools-extra/clangd/unittests/DexTests.cpp | 85 +- .../clangd/unittests/DiagnosticsTests.cpp | 5 +- .../clangd/unittests/FileIndexTests.cpp | 55 +- .../clangd/unittests/IndexActionTests.cpp | 1 + clang-tools-extra/clangd/unittests/IndexTests.cpp | 49 +- clang-tools-extra/clangd/unittests/TestTU.cpp | 5 +- .../clangd/unittests/TypeHierarchyTests.cpp | 154 +- clang-tools-extra/docs/ReleaseNotes.rst | 5 +- .../clang-tidy/checks/android-cloexec-pipe.rst | 1 + .../cppcoreguidelines-pro-type-member-init.rst | 1 + clang/docs/ClangCommandLineReference.rst | 4 + clang/docs/CommandGuide/clang.rst | 6 + clang/docs/ReleaseNotes.rst | 2 +- clang/docs/UsersManual.rst | 12 + clang/include/clang/AST/APValue.h | 8 +- clang/include/clang/AST/ASTContext.h | 7 + clang/include/clang/AST/Expr.h | 117 +- clang/include/clang/AST/Stmt.h | 29 +- clang/include/clang/AST/TextNodeDumper.h | 3 + clang/include/clang/Basic/CMakeLists.txt | 6 - clang/include/clang/Basic/CodeGenOptions.h | 7 +- clang/include/clang/Basic/DiagnosticASTKinds.td | 2 + clang/include/clang/Basic/DiagnosticDriverKinds.td | 2 +- clang/include/clang/Basic/DiagnosticSemaKinds.td | 2 + clang/include/clang/Driver/CC1Options.td | 6 +- clang/include/clang/Driver/Options.td | 15 +- clang/include/clang/Frontend/FrontendOptions.h | 3 + clang/include/clang/Sema/DeclSpec.h | 7 +- clang/include/clang/Sema/Initialization.h | 9 - clang/include/clang/Sema/Sema.h | 13 +- clang/include/clang/Serialization/ASTReader.h | 5 + clang/include/clang/Serialization/ASTWriter.h | 3 + clang/lib/AST/APValue.cpp | 5 +- clang/lib/AST/ASTContext.cpp | 3 + clang/lib/AST/ASTImporter.cpp | 7 + clang/lib/AST/DeclPrinter.cpp | 8 +- clang/lib/AST/DeclarationName.cpp | 8 +- clang/lib/AST/Expr.cpp | 146 +- clang/lib/AST/ExprConstant.cpp | 59 +- clang/lib/AST/StmtPrinter.cpp | 15 +- clang/lib/AST/TextNodeDumper.cpp | 9 + clang/lib/CodeGen/BackendUtil.cpp | 11 +- clang/lib/CodeGen/CGBlocks.cpp | 4 +- clang/lib/CodeGen/CGCUDANV.cpp | 26 +- clang/lib/CodeGen/CGCUDARuntime.h | 5 + clang/lib/CodeGen/CGDecl.cpp | 80 +- clang/lib/CodeGen/CGExpr.cpp | 109 +- clang/lib/CodeGen/CGExprAgg.cpp | 3 +- clang/lib/CodeGen/CGExprScalar.cpp | 4 +- clang/lib/CodeGen/CGOpenMPRuntime.cpp | 68 +- clang/lib/CodeGen/CGOpenMPRuntime.h | 3 + clang/lib/CodeGen/CodeGenAction.cpp | 51 +- clang/lib/CodeGen/CodeGenModule.cpp | 11 +- clang/lib/CodeGen/CodeGenModule.h | 7 + clang/lib/CodeGen/TargetInfo.cpp | 3 +- clang/lib/Driver/Driver.cpp | 14 +- clang/lib/Driver/ToolChains/Clang.cpp | 18 +- clang/lib/Frontend/CompilerInvocation.cpp | 2 + clang/lib/Sema/CMakeLists.txt | 8 + clang/lib/Sema/DeclSpec.cpp | 6 +- .../clang/Basic => lib/Sema}/OpenCLBuiltins.td | 0 clang/lib/Sema/Sema.cpp | 1 + clang/lib/Sema/SemaChecking.cpp | 180 +- clang/lib/Sema/SemaCodeComplete.cpp | 5 +- clang/lib/Sema/SemaDecl.cpp | 66 +- clang/lib/Sema/SemaExpr.cpp | 159 +- clang/lib/Sema/SemaInit.cpp | 23 - clang/lib/Sema/SemaLookup.cpp | 2 +- clang/lib/Sema/SemaOpenMP.cpp | 3 +- clang/lib/Sema/SemaOverload.cpp | 2 +- clang/lib/Sema/SemaTemplate.cpp | 2 + clang/lib/Serialization/ASTReader.cpp | 56 + clang/lib/Serialization/ASTReaderStmt.cpp | 21 +- clang/lib/Serialization/ASTWriter.cpp | 55 + clang/lib/Serialization/ASTWriterStmt.cpp | 10 + .../StaticAnalyzer/Core/BugReporterVisitors.cpp | 761 +-- clang/lib/StaticAnalyzer/Core/ExprEngineC.cpp | 7 +- clang/test/AST/ast-dump-color.cpp | 4 +- .../Analysis/diagnostics/track_subexpressions.cpp | 64 + .../inlining/placement-new-fp-suppression.cpp | 136 + clang/test/Analysis/new-ctor-null-throw.cpp | 32 +- clang/test/Analysis/new-ctor-null.cpp | 7 +- clang/test/Analysis/nullptr.cpp | 12 +- clang/test/CXX/basic/basic.def.odr/p2.cpp | 80 + clang/test/CXX/drs/dr20xx.cpp | 197 +- clang/test/CXX/drs/dr21xx.cpp | 36 + clang/test/CXX/drs/dr23xx.cpp | 42 +- clang/test/CXX/drs/dr6xx.cpp | 17 + clang/test/CXX/drs/dr7xx.cpp | 36 + clang/test/CodeGen/opt-record.c | 3 + clang/test/CodeGen/split-debug-filename.c | 2 +- clang/test/CodeGen/split-debug-output.c | 7 + clang/test/CodeGen/split-debug-single-file.c | 4 +- clang/test/CodeGen/thinlto-split-dwarf.c | 12 +- .../CodeGenCUDA/amdgpu-hip-implicit-kernarg.cu | 8 + clang/test/CodeGenCXX/no-odr-use.cpp | 46 + clang/test/CodeGenCXX/nrvo.cpp | 1 - clang/test/CodeGenCXX/nullptr.cpp | 47 + clang/test/CodeGenCXX/stack-reuse-exceptions.cpp | 2 +- .../CodeGenCXX/static-local-in-local-class.cpp | 2 +- clang/test/CodeGenObjC/attr-objc-arc-inert.m | 16 + clang/test/CodeGenObjC/exceptions.m | 2 +- clang/test/Driver/cl-options.c | 1 + clang/test/Driver/clang_f_opts.c | 6 +- clang/test/Driver/fuchsia.c | 2 +- clang/test/Driver/print-supported-cpus.c | 18 + clang/test/Driver/split-debug.c | 16 +- clang/test/Driver/split-debug.s | 4 +- clang/test/Misc/cc1as-split-dwarf.s | 2 +- clang/test/Modules/pch_container.m | 2 +- ...nvptx_target_requires_unified_shared_memory.cpp | 29 +- clang/test/OpenMP/target_depend_codegen.cpp | 4 +- .../OpenMP/target_enter_data_depend_codegen.cpp | 2 +- .../OpenMP/target_exit_data_depend_codegen.cpp | 2 +- .../test/OpenMP/target_parallel_depend_codegen.cpp | 4 +- .../OpenMP/target_parallel_for_depend_codegen.cpp | 4 +- .../target_parallel_for_simd_depend_codegen.cpp | 4 +- clang/test/OpenMP/target_simd_depend_codegen.cpp | 4 +- clang/test/OpenMP/target_teams_depend_codegen.cpp | 4 +- .../target_teams_distribute_depend_codegen.cpp | 4 +- ...eams_distribute_parallel_for_depend_codegen.cpp | 4 +- ...distribute_parallel_for_simd_depend_codegen.cpp | 4 +- ...target_teams_distribute_simd_depend_codegen.cpp | 4 +- clang/test/OpenMP/target_update_depend_codegen.cpp | 2 +- clang/test/Parser/cxx-template-decl.cpp | 8 + clang/test/SemaCXX/attr-nonnull.cpp | 32 + clang/test/SemaCXX/constant-expression-cxx11.cpp | 9 +- ...clang-check-mac-libcxx-fixed-compilation-db.cpp | 2 + clang/test/lit.cfg.py | 3 + clang/tools/driver/cc1_main.cpp | 25 + clang/tools/driver/cc1as_main.cpp | 12 +- clang/www/cxx_dr_status.html | 14 +- compiler-rt/cmake/Modules/SanitizerUtils.cmake | 10 +- compiler-rt/lib/asan/asan_flags.cc | 6 +- compiler-rt/lib/cfi/cfi.cpp | 4 +- compiler-rt/lib/dfsan/dfsan.cc | 2 +- compiler-rt/lib/fuzzer/FuzzerDataFlowTrace.cpp | 91 +- compiler-rt/lib/fuzzer/FuzzerDataFlowTrace.h | 2 + compiler-rt/lib/fuzzer/FuzzerDriver.cpp | 12 +- compiler-rt/lib/fuzzer/FuzzerFlags.def | 3 +- compiler-rt/lib/fuzzer/FuzzerFork.cpp | 103 +- compiler-rt/lib/fuzzer/FuzzerLoop.cpp | 3 + compiler-rt/lib/fuzzer/FuzzerOptions.h | 1 + compiler-rt/lib/fuzzer/dataflow/DataFlow.cpp | 120 +- compiler-rt/lib/fuzzer/tests/FuzzerUnittest.cpp | 8 +- compiler-rt/lib/hwasan/hwasan.cpp | 7 +- compiler-rt/lib/lsan/lsan.cc | 2 +- compiler-rt/lib/msan/msan.cc | 6 +- compiler-rt/lib/sanitizer_common/sancov_flags.cc | 2 +- .../lib/sanitizer_common/sanitizer_flag_parser.cc | 29 +- .../lib/sanitizer_common/sanitizer_flag_parser.h | 7 +- .../sanitizer_common/scripts/gen_dynamic_list.py | 7 +- compiler-rt/lib/scudo/scudo_flags.cpp | 2 +- compiler-rt/lib/tsan/dd/dd_rtl.cc | 2 +- compiler-rt/lib/tsan/rtl/tsan_flags.cc | 6 +- compiler-rt/lib/tsan/rtl/tsan_flags.h | 3 +- compiler-rt/lib/tsan/rtl/tsan_rtl.cc | 5 +- compiler-rt/lib/ubsan/ubsan_flags.cc | 2 +- compiler-rt/lib/xray/xray_flags.cc | 2 +- compiler-rt/test/fuzzer/Labels20Test.cpp | 41 + compiler-rt/test/fuzzer/OnlySomeBytesTest.cpp | 3 +- compiler-rt/test/fuzzer/dataflow.test | 100 +- compiler-rt/test/fuzzer/fuzzer-custommutator.test | 6 + compiler-rt/test/fuzzer/only-some-bytes-fork.test | 2 +- libcxx/src/locale.cpp | 2 +- .../facet.num.get.members/get_long.pass.cpp | 10 + libcxx/test/support/template_cost_testing.h | 36 + .../utils/docker/scripts/docker_start_buildbots.sh | 6 +- libcxx/utils/docker/scripts/run_buildbot_new.sh | 5 +- libunwind/src/UnwindRegistersRestore.S | 11 +- lld/COFF/DriverUtils.cpp | 6 +- lld/COFF/InputFiles.cpp | 9 +- lld/COFF/PDB.cpp | 2 +- lld/COFF/Writer.cpp | 8 +- lld/ELF/Relocations.cpp | 6 +- lld/MinGW/Driver.cpp | 25 +- lld/MinGW/Options.td | 17 + lld/test/COFF/associative-comdat-mingw-i386.s | 37 + lld/test/COFF/eh_frame_suffix_sorting.s | 39 + lld/test/COFF/subsystem-inference.test | 4 + lld/test/COFF/subsystem.test | 9 + lld/test/ELF/arm-thunk-multipass-plt.s | 14 +- lld/test/ELF/arm-tls-gd32.s | 2 +- lld/test/ELF/comdat-discarded-error.s | 4 +- lld/test/ELF/gnu-ifunc-noplt-i386.s | 12 +- .../ELF/invalid/undefined-local-symbol-in-dso.test | 2 +- lld/test/ELF/ppc32-call-stub-nopic.s | 2 +- lld/test/ELF/ppc32-call-stub-pic.s | 2 +- lld/test/MinGW/driver.test | 16 + lldb/examples/python/crashlog.py | 46 +- lldb/packages/Python/lldbsuite/test/dotest.py | 27 + .../Plugins/Process/Linux/NativeProcessLinux.cpp | 22 +- .../Plugins/Process/Linux/NativeProcessLinux.h | 10 +- lldb/source/Plugins/Process/POSIX/CMakeLists.txt | 2 + .../Plugins/Process/POSIX/NativeProcessELF.cpp | 110 + .../Plugins/Process/POSIX/NativeProcessELF.h | 46 + lldb/source/Plugins/SymbolFile/DWARF/DIERef.h | 4 - .../SymbolFile/DWARF/DWARFASTParserClang.cpp | 2 +- .../Plugins/SymbolFile/DWARF/ManualDWARFIndex.cpp | 44 +- .../Plugins/SymbolFile/DWARF/SymbolFileDWARF.cpp | 70 +- .../Plugins/SymbolFile/DWARF/SymbolFileDWARF.h | 7 +- lldb/source/Symbol/Symtab.cpp | 19 - lldb/unittests/Editline/CMakeLists.txt | 1 - lldb/unittests/Editline/EditlineTest.cpp | 14 +- lldb/unittests/Host/NativeProcessProtocolTest.cpp | 150 +- lldb/unittests/Process/CMakeLists.txt | 1 + lldb/unittests/Process/POSIX/CMakeLists.txt | 8 + .../Process/POSIX/NativeProcessELFTest.cpp | 155 + .../TestingSupport/Host/NativeProcessTestUtils.h | 150 + llvm/CMakeLists.txt | 32 +- llvm/cmake/modules/GetHostTriple.cmake | 24 +- llvm/cmake/modules/LLVMDistributionSupport.cmake | 36 + llvm/include/llvm/ADT/APFloat.h | 11 + llvm/include/llvm/ADT/STLExtras.h | 7 + llvm/include/llvm/Analysis/ObjCARCInstKind.h | 4 + llvm/include/llvm/Analysis/PtrUseVisitor.h | 4 + llvm/include/llvm/Analysis/TargetTransformInfo.h | 10 +- llvm/include/llvm/CodeGen/AsmPrinter.h | 16 +- .../llvm/CodeGen/GlobalISel/MIPatternMatch.h | 3 +- .../llvm/CodeGen/GlobalISel/MachineIRBuilder.h | 14 + .../llvm/CodeGen/GlobalISel/RegisterBankInfo.h | 6 + llvm/include/llvm/CodeGen/MIRYamlMapping.h | 18 +- llvm/include/llvm/CodeGen/TargetFrameLowering.h | 19 + .../include/llvm/ExecutionEngine/JITLink/JITLink.h | 73 +- .../ExecutionEngine/JITLink/JITLinkMemoryManager.h | 99 + llvm/include/llvm/IR/IntrinsicsAArch64.td | 20 +- llvm/include/llvm/IR/IntrinsicsAMDGPU.td | 10 +- llvm/include/llvm/IR/RemarkStreamer.h | 34 + llvm/include/llvm/LTO/Config.h | 10 +- llvm/include/llvm/LTO/LTO.h | 6 +- llvm/include/llvm/MC/MCExpr.h | 2 + llvm/include/llvm/Support/TargetOpcodes.def | 3 + llvm/include/llvm/Target/GenericOpcodes.td | 9 + llvm/include/llvm/Transforms/IPO/Attributor.h | 88 +- llvm/lib/Analysis/InstructionSimplify.cpp | 19 +- llvm/lib/Analysis/ObjCARCInstKind.cpp | 35 + llvm/lib/Analysis/PtrUseVisitor.cpp | 8 +- llvm/lib/Analysis/ScalarEvolution.cpp | 51 +- llvm/lib/Analysis/ScalarEvolutionExpander.cpp | 4 +- llvm/lib/CodeGen/CodeGenPrepare.cpp | 59 +- llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp | 11 + llvm/lib/CodeGen/GlobalISel/RegisterBankInfo.cpp | 30 +- llvm/lib/CodeGen/HardwareLoops.cpp | 16 +- llvm/lib/CodeGen/MIRParser/MIRParser.cpp | 9 + llvm/lib/CodeGen/MIRPrinter.cpp | 5 +- llvm/lib/CodeGen/MachineBlockPlacement.cpp | 283 +- llvm/lib/CodeGen/MachineFrameInfo.cpp | 4 +- llvm/lib/CodeGen/MachineVerifier.cpp | 12 + llvm/lib/CodeGen/PrologEpilogInserter.cpp | 22 +- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 120 +- llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp | 3 + llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 6 + llvm/lib/ExecutionEngine/JITLink/CMakeLists.txt | 1 + llvm/lib/ExecutionEngine/JITLink/JITLink.cpp | 90 - .../JITLink/JITLinkMemoryManager.cpp | 105 + llvm/lib/IR/RemarkStreamer.cpp | 35 + llvm/lib/LTO/LTO.cpp | 36 +- llvm/lib/LTO/LTOBackend.cpp | 10 +- llvm/lib/LTO/LTOCodeGenerator.cpp | 27 +- llvm/lib/LTO/ThinLTOCodeGenerator.cpp | 11 +- llvm/lib/MC/MCExpr.cpp | 4 + llvm/lib/MC/MCSubtargetInfo.cpp | 35 +- llvm/lib/Support/APFloat.cpp | 36 + llvm/lib/Support/BranchProbability.cpp | 4 - llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp | 24 +- llvm/lib/Target/AMDGPU/AMDGPUInline.cpp | 2 +- llvm/lib/Target/AMDGPU/AMDGPUMCInstLower.cpp | 13 +- llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp | 80 +- llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h | 4 + llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h | 3 +- .../Target/AMDGPU/MCTargetDesc/SIMCCodeEmitter.cpp | 8 +- llvm/lib/Target/AMDGPU/SIDefines.h | 7 - llvm/lib/Target/AMDGPU/SIFrameLowering.cpp | 34 +- llvm/lib/Target/AMDGPU/SIFrameLowering.h | 2 + llvm/lib/Target/AMDGPU/SIISelLowering.cpp | 135 +- llvm/lib/Target/AMDGPU/SIISelLowering.h | 2 +- llvm/lib/Target/AMDGPU/SIInsertSkips.cpp | 20 +- llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp | 162 +- llvm/lib/Target/AMDGPU/SIInstrInfo.cpp | 229 +- llvm/lib/Target/AMDGPU/SIInstrInfo.h | 9 +- llvm/lib/Target/AMDGPU/SIInstrInfo.td | 23 +- llvm/lib/Target/AMDGPU/SIInstructions.td | 7 +- llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp | 7 +- llvm/lib/Target/AMDGPU/SILowerControlFlow.cpp | 81 +- llvm/lib/Target/AMDGPU/SILowerI1Copies.cpp | 68 +- llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.h | 39 +- llvm/lib/Target/AMDGPU/SIOptimizeExecMasking.cpp | 87 +- .../Target/AMDGPU/SIOptimizeExecMaskingPreRA.cpp | 51 +- llvm/lib/Target/AMDGPU/SIPeepholeSDWA.cpp | 5 +- llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp | 29 +- llvm/lib/Target/AMDGPU/SIRegisterInfo.h | 15 + llvm/lib/Target/AMDGPU/SIRegisterInfo.td | 12 + llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp | 25 +- llvm/lib/Target/AMDGPU/SIWholeQuadMode.cpp | 50 +- llvm/lib/Target/AMDGPU/SMInstructions.td | 14 +- llvm/lib/Target/AMDGPU/SOPInstructions.td | 5 +- llvm/lib/Target/ARM/ARM.h | 5 - llvm/lib/Target/ARM/ARMBasicBlockInfo.cpp | 146 + llvm/lib/Target/ARM/ARMBasicBlockInfo.h | 48 + llvm/lib/Target/ARM/ARMComputeBlockSize.cpp | 80 - llvm/lib/Target/ARM/ARMConstantIslandPass.cpp | 158 +- llvm/lib/Target/ARM/ARMInstrFormats.td | 2 + llvm/lib/Target/ARM/ARMInstrMVE.td | 316 ++ llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp | 4 - llvm/lib/Target/ARM/CMakeLists.txt | 2 +- llvm/lib/Target/PowerPC/P9InstrResources.td | 157 +- llvm/lib/Target/PowerPC/PPCCallingConv.cpp | 54 + llvm/lib/Target/PowerPC/PPCCallingConv.td | 7 +- llvm/lib/Target/PowerPC/PPCISelLowering.cpp | 131 +- llvm/lib/Target/PowerPC/PPCISelLowering.h | 17 +- llvm/lib/Target/PowerPC/PPCInstrInfo.td | 12 + llvm/lib/Target/PowerPC/PPCInstrSPE.td | 12 +- llvm/lib/Target/PowerPC/PPCScheduleP9.td | 20 +- .../Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp | 10 +- llvm/lib/Target/RISCV/RISCVISelLowering.h | 1 + llvm/lib/Target/X86/X86ISelDAGToDAG.cpp | 155 +- llvm/lib/Target/X86/X86ISelLowering.cpp | 210 +- llvm/lib/Target/X86/X86InstrFoldTables.cpp | 18 +- llvm/lib/Transforms/IPO/Attributor.cpp | 2 +- .../Transforms/InstCombine/InstCombineCalls.cpp | 7 + llvm/lib/Transforms/ObjCARC/ObjCARCOpts.cpp | 13 + llvm/lib/Transforms/Scalar/IndVarSimplify.cpp | 123 +- llvm/lib/Transforms/Scalar/InferAddressSpaces.cpp | 8 +- llvm/lib/Transforms/Scalar/SROA.cpp | 51 +- llvm/lib/Transforms/Utils/SimplifyCFG.cpp | 62 +- llvm/lib/Transforms/Utils/SimplifyIndVar.cpp | 24 + llvm/lib/Transforms/Vectorize/LoopVectorize.cpp | 7 + llvm/test/Analysis/CostModel/ARM/lit.local.cfg | 1 - llvm/test/Analysis/CostModel/PowerPC/lit.local.cfg | 1 - llvm/test/Analysis/CostModel/RISCV/lit.local.cfg | 1 - llvm/test/Analysis/CostModel/X86/lit.local.cfg | 1 - .../extract-highbits-sameconstmask.ll | 6 +- .../ScalarEvolution/increasing-or-decreasing-iv.ll | 8 +- .../ScalarEvolution/infer-prestart-no-wrap.ll | 2 +- .../ScalarEvolution/lshr-shl-differentconstmask.ll | 2 +- llvm/test/Analysis/ScalarEvolution/sext-mul.ll | 4 +- .../AArch64/GlobalISel/arm64-irtranslator.ll | 6 +- .../AArch64/GlobalISel/arm64-regbankselect.mir | 2 +- .../CodeGen/AArch64/GlobalISel/call-translator.ll | 2 +- .../GlobalISel/fp128-legalize-crash-pr35690.mir | 2 +- .../GlobalISel/legalizer-info-validation.mir | 3 + .../AArch64/GlobalISel/select-gv-cmodel-large.mir | 2 +- .../AArch64/GlobalISel/select-gv-cmodel-tiny.mir | 2 +- .../CodeGen/AArch64/aarch64-mov-debug-locs.mir | 12 +- .../CodeGen/AArch64/branch-target-enforcment.mir | 4 +- llvm/test/CodeGen/AArch64/cfi_restore.mir | 4 +- llvm/test/CodeGen/AArch64/cmpxchg-idioms.ll | 2 +- .../dont-shrink-wrap-stack-mayloadorstore.mir | 4 +- llvm/test/CodeGen/AArch64/max-jump-table.ll | 48 +- llvm/test/CodeGen/AArch64/min-jump-table.ll | 30 +- llvm/test/CodeGen/AArch64/neg-imm.ll | 2 +- .../CodeGen/AArch64/reverse-csr-restore-seq.mir | 2 +- llvm/test/CodeGen/AArch64/select_fmf.ll | 78 + .../CodeGen/AArch64/spill-stack-realignment.mir | 4 +- llvm/test/CodeGen/AArch64/stack-id-pei-alloc.mir | 20 +- .../AArch64/stack-id-stackslot-scavenging.mir | 2 +- llvm/test/CodeGen/AArch64/tailmerging_in_mbp.ll | 5 +- llvm/test/CodeGen/AArch64/win64-jumptable.ll | 52 +- llvm/test/CodeGen/AArch64/wineh-frame5.mir | 2 +- llvm/test/CodeGen/AArch64/wineh-frame6.mir | 14 +- llvm/test/CodeGen/AArch64/wineh-frame7.mir | 14 +- llvm/test/CodeGen/AArch64/wineh-frame8.mir | 4 +- llvm/test/CodeGen/AArch64/wineh1.mir | 20 +- llvm/test/CodeGen/AArch64/wineh2.mir | 30 +- llvm/test/CodeGen/AArch64/wineh3.mir | 28 +- llvm/test/CodeGen/AArch64/wineh4.mir | 28 +- llvm/test/CodeGen/AArch64/wineh5.mir | 20 +- llvm/test/CodeGen/AArch64/wineh6.mir | 18 +- llvm/test/CodeGen/AArch64/wineh7.mir | 14 +- llvm/test/CodeGen/AArch64/wineh8.mir | 28 +- llvm/test/CodeGen/AArch64/wineh_shrinkwrap.mir | 2 +- .../GlobalISel/regbankselect-illegal-copy.mir | 18 + .../AMDGPU/GlobalISel/regbankselect-phi.mir | 166 +- .../GlobalISel/regbankselect-reg-sequence.mir | 4 +- llvm/test/CodeGen/AMDGPU/branch-relax-spill.ll | 4 +- llvm/test/CodeGen/AMDGPU/call-argument-types.ll | 49 +- .../CodeGen/AMDGPU/call-preserved-registers.ll | 2 +- llvm/test/CodeGen/AMDGPU/call-waitcnt.ll | 157 + llvm/test/CodeGen/AMDGPU/collapse-endcf.ll | 9 +- .../AMDGPU/divergent-branch-uniform-condition.ll | 41 +- llvm/test/CodeGen/AMDGPU/early-if-convert.ll | 2 +- .../test/CodeGen/AMDGPU/frame-index-elimination.ll | 4 +- llvm/test/CodeGen/AMDGPU/global_smrd_cfg.ll | 21 +- llvm/test/CodeGen/AMDGPU/hoist-cond.ll | 2 +- llvm/test/CodeGen/AMDGPU/i1-copy-from-loop.ll | 12 +- llvm/test/CodeGen/AMDGPU/indirect-addressing-si.ll | 12 +- llvm/test/CodeGen/AMDGPU/inline-constraints.ll | 2 +- llvm/test/CodeGen/AMDGPU/inline-maxbb.ll | 35 + llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.append.ll | 9 + llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.consume.ll | 9 + llvm/test/CodeGen/AMDGPU/llvm.amdgcn.interp.f16.ll | 4 +- .../CodeGen/AMDGPU/llvm.amdgcn.readfirstlane.ll | 2 +- llvm/test/CodeGen/AMDGPU/llvm.amdgcn.readlane.ll | 2 +- llvm/test/CodeGen/AMDGPU/llvm.amdgcn.writelane.ll | 2 +- llvm/test/CodeGen/AMDGPU/llvm.memcpy.ll | 2 +- llvm/test/CodeGen/AMDGPU/loop_break.ll | 2 +- llvm/test/CodeGen/AMDGPU/loop_exit_with_xor.ll | 4 +- llvm/test/CodeGen/AMDGPU/madmk.ll | 2 +- ...galizer-multiple-mem-operands-nontemporal-1.mir | 6 +- ...galizer-multiple-mem-operands-nontemporal-2.mir | 6 +- .../CodeGen/AMDGPU/mubuf-legalize-operands.mir | 285 +- llvm/test/CodeGen/AMDGPU/multilevel-break.ll | 56 +- .../AMDGPU/no-initializer-constant-addrspace.ll | 2 +- llvm/test/CodeGen/AMDGPU/optimize-negated-cond.ll | 8 +- llvm/test/CodeGen/AMDGPU/salu-to-valu.ll | 30 +- llvm/test/CodeGen/AMDGPU/sched-crash-dbg-value.mir | 2 +- .../CodeGen/AMDGPU/sgpr-spill-wrong-stack-id.mir | 14 +- llvm/test/CodeGen/AMDGPU/si-annotate-cf.ll | 12 +- llvm/test/CodeGen/AMDGPU/smrd-gfx10.ll | 37 + llvm/test/CodeGen/AMDGPU/smrd.ll | 85 +- llvm/test/CodeGen/AMDGPU/spill-m0.ll | 12 +- .../AMDGPU/stack-slot-color-sgpr-vgpr-spills.mir | 4 +- llvm/test/CodeGen/AMDGPU/uaddo.ll | 2 +- .../AMDGPU/undefined-physreg-sgpr-spill.mir | 4 +- llvm/test/CodeGen/AMDGPU/usubo.ll | 2 +- llvm/test/CodeGen/AMDGPU/valu-i1.ll | 2 +- llvm/test/CodeGen/AMDGPU/wqm.ll | 11 +- llvm/test/CodeGen/ARC/lit.local.cfg | 1 - llvm/test/CodeGen/ARM/2011-03-23-PeepholeBug.ll | 2 +- llvm/test/CodeGen/ARM/arm-and-tst-peephole.ll | 5 +- llvm/test/CodeGen/ARM/atomic-cmp.ll | 2 +- llvm/test/CodeGen/ARM/atomic-cmpxchg.ll | 26 +- llvm/test/CodeGen/ARM/cmpxchg-idioms.ll | 4 +- llvm/test/CodeGen/ARM/code-placement.ll | 4 +- llvm/test/CodeGen/ARM/constant-island-movwt.mir | 20 +- llvm/test/CodeGen/ARM/fp16-litpool-arm.mir | 2 +- llvm/test/CodeGen/ARM/fp16-litpool-thumb.mir | 4 +- llvm/test/CodeGen/ARM/fp16-litpool2-arm.mir | 2 +- llvm/test/CodeGen/ARM/fp16-litpool3-arm.mir | 2 +- llvm/test/CodeGen/ARM/lit.local.cfg | 1 - llvm/test/CodeGen/ARM/misched-fusion-aes.ll | 17 +- llvm/test/CodeGen/ARM/pr32578.ll | 2 +- .../CodeGen/ARM/register-scavenger-exceptions.mir | 6 +- llvm/test/CodeGen/ARM/swifterror.ll | 2 +- llvm/test/CodeGen/ARM/vector-spilling.ll | 4 +- llvm/test/CodeGen/AVR/lit.local.cfg | 1 - llvm/test/CodeGen/Generic/lit.local.cfg | 1 - llvm/test/CodeGen/Hexagon/bug6757-endloop.ll | 2 +- llvm/test/CodeGen/Hexagon/early-if-merge-loop.ll | 4 +- llvm/test/CodeGen/Hexagon/lit.local.cfg | 1 - .../CodeGen/Hexagon/loop-idiom/memmove-rt-check.ll | 2 +- llvm/test/CodeGen/Hexagon/prof-early-if.ll | 2 +- llvm/test/CodeGen/Hexagon/redundant-branching2.ll | 2 +- llvm/test/CodeGen/Lanai/lit.local.cfg | 1 - .../CodeGen/MIR/AArch64/mirCanonCopyCopyProp.mir | 14 +- .../CodeGen/MIR/AArch64/mirCanonIdempotent.mir | 14 +- .../MIR/AArch64/stack-object-local-offset.mir | 2 +- llvm/test/CodeGen/MIR/AMDGPU/stack-id.mir | 20 +- llvm/test/CodeGen/MIR/AMDGPU/target-flags.mir | 4 +- llvm/test/CodeGen/MIR/Generic/lit.local.cfg | 1 - .../CodeGen/MIR/X86/branch-folder-with-label.mir | 8 +- llvm/test/CodeGen/MIR/X86/diexpr-win32.mir | 10 +- llvm/test/CodeGen/MIR/X86/fixed-stack-di.mir | 2 +- llvm/test/CodeGen/MIR/X86/fixed-stack-objects.mir | 2 +- .../MIR/X86/spill-slot-fixed-stack-objects.mir | 2 +- llvm/test/CodeGen/MIR/X86/stack-objects.mir | 6 +- .../MIR/X86/variable-sized-stack-objects.mir | 4 +- llvm/test/CodeGen/MSP430/lit.local.cfg | 1 - .../GlobalISel/instruction-select/pointers.mir | 2 +- .../GlobalISel/instruction-select/stack_args.mir | 2 +- .../test/CodeGen/Mips/GlobalISel/legalizer/add.mir | 8 +- .../test/CodeGen/Mips/GlobalISel/legalizer/mul.mir | 8 +- .../CodeGen/Mips/GlobalISel/legalizer/pointers.mir | 2 +- .../Mips/GlobalISel/legalizer/stack_args.mir | 2 +- .../test/CodeGen/Mips/GlobalISel/legalizer/sub.mir | 8 +- .../Mips/GlobalISel/regbankselect/pointers.mir | 2 +- .../Mips/GlobalISel/regbankselect/stack_args.mir | 2 +- llvm/test/CodeGen/Mips/lit.local.cfg | 1 - llvm/test/CodeGen/Mips/micromips-eva.mir | 2 +- .../CodeGen/Mips/micromips-short-delay-slot.mir | 2 +- .../micromips-sizereduction/micromips-lwp-swp.mir | 24 +- .../micromips-sizereduction/micromips-movep.mir | 4 +- .../micromips-no-lwp-swp.mir | 16 +- .../PowerPC/NoCRFieldRedefWhenSpillingCRBIT.mir | 6 +- llvm/test/CodeGen/PowerPC/atomics-regression.ll | 312 +- llvm/test/CodeGen/PowerPC/cmp_elimination.ll | 11 +- .../CodeGen/PowerPC/convert-rr-to-ri-instrs.mir | 10 +- llvm/test/CodeGen/PowerPC/ctrloop-shortLoops.ll | 3 +- llvm/test/CodeGen/PowerPC/expand-foldable-isel.ll | 10 +- llvm/test/CodeGen/PowerPC/knowCRBitSpill.ll | 2 +- llvm/test/CodeGen/PowerPC/licm-remat.ll | 3 +- llvm/test/CodeGen/PowerPC/lit.local.cfg | 1 - llvm/test/CodeGen/PowerPC/loop-align.ll | 209 + llvm/test/CodeGen/PowerPC/setcr_bc.mir | 2 +- llvm/test/CodeGen/PowerPC/setcr_bc2.mir | 2 +- llvm/test/CodeGen/PowerPC/setcr_bc3.mir | 2 +- llvm/test/CodeGen/PowerPC/spe.ll | 8 +- llvm/test/CodeGen/RISCV/atomic-rmw.ll | 4938 ++++++++++---------- llvm/test/CodeGen/RISCV/remat.ll | 55 +- llvm/test/CodeGen/RISCV/split-offsets.ll | 126 + llvm/test/CodeGen/SPARC/lit.local.cfg | 1 - llvm/test/CodeGen/SystemZ/atomicrmw-minmax-01.ll | 6 +- llvm/test/CodeGen/SystemZ/atomicrmw-minmax-02.ll | 6 +- llvm/test/CodeGen/SystemZ/debuginstr-02.mir | 2 +- llvm/test/CodeGen/SystemZ/int-add-08.ll | 10 +- llvm/test/CodeGen/SystemZ/int-sub-05.ll | 10 +- llvm/test/CodeGen/SystemZ/lit.local.cfg | 1 - llvm/test/CodeGen/SystemZ/loop-01.ll | 4 +- llvm/test/CodeGen/SystemZ/loop-02.ll | 2 +- llvm/test/CodeGen/SystemZ/subregliveness-06.mir | 4 +- llvm/test/CodeGen/SystemZ/swifterror.ll | 4 +- llvm/test/CodeGen/Thumb/PR36658.mir | 4 +- .../test/CodeGen/Thumb/consthoist-physical-addr.ll | 12 +- llvm/test/CodeGen/Thumb/lit.local.cfg | 1 - llvm/test/CodeGen/Thumb2/high-reg-spill.mir | 2 +- llvm/test/CodeGen/Thumb2/ifcvt-cbz.mir | 12 +- llvm/test/CodeGen/Thumb2/lit.local.cfg | 1 - llvm/test/CodeGen/Thumb2/peephole-cmp.mir | 2 +- llvm/test/CodeGen/WinEH/lit.local.cfg | 1 - llvm/test/CodeGen/X86/GC/lit.local.cfg | 1 - .../X86/GlobalISel/x32-select-frameIndex.mir | 2 +- .../X86/GlobalISel/x86-legalize-inttoptr.mir | 2 +- .../X86/GlobalISel/x86-legalize-ptrtoint.mir | 8 +- .../CodeGen/X86/GlobalISel/x86-legalize-srem.mir | 12 +- .../CodeGen/X86/GlobalISel/x86-legalize-urem.mir | 12 +- .../X86/GlobalISel/x86-select-frameIndex.mir | 2 +- .../CodeGen/X86/GlobalISel/x86-select-inttoptr.mir | 2 +- .../CodeGen/X86/GlobalISel/x86-select-ptrtoint.mir | 8 +- .../CodeGen/X86/GlobalISel/x86-select-srem.mir | 12 +- .../CodeGen/X86/GlobalISel/x86-select-udiv.mir | 12 +- .../CodeGen/X86/GlobalISel/x86-select-urem.mir | 12 +- .../X86/GlobalISel/x86_64-select-frameIndex.mir | 2 +- llvm/test/CodeGen/X86/PR37310.mir | 4 +- llvm/test/CodeGen/X86/avoid-sfb-offset.mir | 4 +- .../CodeGen/X86/avx512-shuffles/partial_permute.ll | 534 +-- llvm/test/CodeGen/X86/block-placement.ll | 19 +- llvm/test/CodeGen/X86/cast-vsel.ll | 59 +- llvm/test/CodeGen/X86/code_placement.ll | 7 +- .../CodeGen/X86/code_placement_cold_loop_blocks.ll | 2 +- .../code_placement_ignore_succ_in_inner_loop.ll | 7 +- .../CodeGen/X86/code_placement_loop_rotation2.ll | 14 +- .../CodeGen/X86/code_placement_no_header_change.ll | 2 +- llvm/test/CodeGen/X86/conditional-tailcall.ll | 178 +- .../test/CodeGen/X86/constrained-fp80-trunc-ext.ll | 61 + llvm/test/CodeGen/X86/fdiv-combine.ll | 2 +- llvm/test/CodeGen/X86/known-signbits-vector.ll | 40 +- llvm/test/CodeGen/X86/lit.local.cfg | 1 - llvm/test/CodeGen/X86/loop-blocks.ll | 38 +- llvm/test/CodeGen/X86/loop-rotate.ll | 120 + llvm/test/CodeGen/X86/lsr-loop-exit-cond.ll | 66 +- llvm/test/CodeGen/X86/move_latch_to_loop_top.ll | 239 + llvm/test/CodeGen/X86/movtopush.mir | 6 +- llvm/test/CodeGen/X86/nontemporal-3.ll | 72 +- ...ower-of-two-or-zero-when-comparing-with-zero.ll | 256 + llvm/test/CodeGen/X86/pr30821.mir | 6 +- llvm/test/CodeGen/X86/pr38185.ll | 16 +- llvm/test/CodeGen/X86/prologepilog_deref_size.mir | 2 +- llvm/test/CodeGen/X86/ragreedy-hoist-spill.ll | 123 +- llvm/test/CodeGen/X86/regalloc-copy-hints.mir | 2 +- llvm/test/CodeGen/X86/reverse_branches.ll | 35 +- llvm/test/CodeGen/X86/shrink_wrap_dbg_value.mir | 4 +- .../test/CodeGen/X86/speculative-load-hardening.ll | 57 +- llvm/test/CodeGen/X86/swifterror.ll | 6 +- .../CodeGen/X86/tail-dup-merge-loop-headers.ll | 67 +- llvm/test/CodeGen/X86/tail-dup-repeat.ll | 25 +- .../CodeGen/X86/vector-shift-by-select-loop.ll | 585 +++ llvm/test/CodeGen/X86/vector-shift-lshr-128.ll | 100 +- llvm/test/CodeGen/X86/vector-shift-shl-128.ll | 1667 ------- llvm/test/CodeGen/X86/vector-shuffle-512-v8.ll | 22 +- .../CodeGen/X86/vector-shuffle-combining-avx.ll | 21 +- .../X86/vector-shuffle-combining-avx512bw.ll | 5 +- .../CodeGen/X86/vector-shuffle-combining-xop.ll | 5 +- llvm/test/CodeGen/X86/vselect-avx.ll | 41 + llvm/test/CodeGen/X86/widen_arith-1.ll | 16 +- llvm/test/CodeGen/X86/widen_arith-2.ll | 16 +- llvm/test/CodeGen/X86/widen_arith-3.ll | 16 +- llvm/test/CodeGen/X86/widen_arith-4.ll | 32 +- llvm/test/CodeGen/X86/widen_arith-5.ll | 16 +- llvm/test/CodeGen/X86/widen_arith-6.ll | 16 +- llvm/test/CodeGen/X86/widen_cast-4.ll | 32 +- .../CodeGen/X86/win_coreclr_chkstk_liveins.mir | 2 +- llvm/test/CodeGen/X86/x86-cmov-converter.ll | 2 +- llvm/test/CodeGen/XCore/lit.local.cfg | 1 - llvm/test/DebugInfo/AArch64/asan-stack-vars.mir | 60 +- .../AArch64/compiler-gen-bbs-livedebugvalues.mir | 6 +- llvm/test/DebugInfo/AArch64/lit.local.cfg | 1 - llvm/test/DebugInfo/ARM/cfi-eof-prologue.mir | 8 +- llvm/test/DebugInfo/ARM/lit.local.cfg | 1 - llvm/test/DebugInfo/Generic/lit.local.cfg | 1 - llvm/test/DebugInfo/MIR/AArch64/lit.local.cfg | 1 - llvm/test/DebugInfo/MIR/ARM/lit.local.cfg | 1 - .../MIR/ARM/live-debug-values-reg-copy.mir | 8 +- llvm/test/DebugInfo/MIR/Mips/last-inst-bundled.mir | 6 +- llvm/test/DebugInfo/MIR/Mips/lit.local.cfg | 1 - .../MIR/Mips/live-debug-values-reg-copy.mir | 8 +- .../DebugInfo/MIR/X86/dbg-stack-value-range.mir | 4 +- llvm/test/DebugInfo/MIR/X86/debug-loc-0.mir | 2 +- llvm/test/DebugInfo/MIR/X86/kill-after-spill.mir | 16 +- .../MIR/X86/live-debug-values-reg-copy.mir | 6 +- .../MIR/X86/live-debug-values-restore.mir | 14 +- llvm/test/DebugInfo/MIR/lit.local.cfg | 1 - llvm/test/DebugInfo/SystemZ/lit.local.cfg | 1 - llvm/test/DebugInfo/X86/PR37234.ll | 12 +- .../test/DebugInfo/X86/dbg-value-transfer-order.ll | 13 +- llvm/test/DebugInfo/X86/debug-loc-asan.mir | 22 +- llvm/test/DebugInfo/X86/debug-loc-offset.mir | 14 +- llvm/test/DebugInfo/X86/dw_op_minus.mir | 4 +- llvm/test/DebugInfo/X86/live-debug-vars-dse.mir | 2 +- llvm/test/DebugInfo/X86/pr19307.mir | 10 +- llvm/test/DebugInfo/X86/prolog-params.mir | 8 +- .../test/ExecutionEngine/JITLink/X86/lit.local.cfg | 1 - .../RuntimeDyld/AArch64/lit.local.cfg | 1 - .../ExecutionEngine/RuntimeDyld/ARM/lit.local.cfg | 1 - .../ExecutionEngine/RuntimeDyld/Mips/lit.local.cfg | 1 - .../RuntimeDyld/PowerPC/lit.local.cfg | 1 - .../RuntimeDyld/SystemZ/lit.local.cfg | 1 - .../ExecutionEngine/RuntimeDyld/X86/lit.local.cfg | 1 - .../AddressSanitizer/X86/lit.local.cfg | 1 - .../InstrProfiling/X86/lit.local.cfg | 1 - llvm/test/JitListener/lit.local.cfg | 1 - llvm/test/MC/ARM/AlignedBundling/lit.local.cfg | 1 - llvm/test/MC/ARM/lit.local.cfg | 1 - llvm/test/MC/ARM/mve-reductions-fp.s | 58 + llvm/test/MC/ARM/mve-reductions.s | 191 +- llvm/test/MC/AVR/lit.local.cfg | 1 - llvm/test/MC/AsmParser/lit.local.cfg | 1 - llvm/test/MC/BPF/lit.local.cfg | 1 - llvm/test/MC/COFF/ARM/lit.local.cfg | 1 - llvm/test/MC/COFF/cv-loc-unreachable-2.s | 2 +- llvm/test/MC/COFF/cv-loc-unreachable.s | 2 +- llvm/test/MC/COFF/lit.local.cfg | 1 - llvm/test/MC/Disassembler/AArch64/lit.local.cfg | 1 - llvm/test/MC/Disassembler/ARC/lit.local.cfg | 1 - llvm/test/MC/Disassembler/ARM/lit.local.cfg | 1 - llvm/test/MC/Disassembler/ARM/mve-reductions.txt | 212 + llvm/test/MC/Disassembler/Hexagon/lit.local.cfg | 1 - llvm/test/MC/Disassembler/Lanai/lit.local.cfg | 1 - llvm/test/MC/Disassembler/MSP430/lit.local.cfg | 1 - llvm/test/MC/Disassembler/Mips/lit.local.cfg | 1 - llvm/test/MC/Disassembler/PowerPC/lit.local.cfg | 1 - llvm/test/MC/Disassembler/RISCV/lit.local.cfg | 1 - llvm/test/MC/Disassembler/Sparc/lit.local.cfg | 1 - llvm/test/MC/Disassembler/SystemZ/lit.local.cfg | 1 - .../test/MC/Disassembler/WebAssembly/lit.local.cfg | 1 - llvm/test/MC/Disassembler/X86/lit.local.cfg | 1 - llvm/test/MC/ELF/lit.local.cfg | 1 - llvm/test/MC/Hexagon/lit.local.cfg | 1 - llvm/test/MC/Lanai/lit.local.cfg | 1 - llvm/test/MC/MSP430/lit.local.cfg | 1 - llvm/test/MC/MachO/AArch64/lit.local.cfg | 1 - llvm/test/MC/MachO/ARM/lit.local.cfg | 1 - llvm/test/MC/MachO/lit.local.cfg | 1 - llvm/test/MC/Mips/lit.local.cfg | 1 - llvm/test/MC/RISCV/lit.local.cfg | 1 - llvm/test/MC/Sparc/lit.local.cfg | 1 - llvm/test/MC/X86/AlignedBundling/lit.local.cfg | 1 - llvm/test/MachineVerifier/test_g_brjt.mir | 30 + llvm/test/Object/X86/lit.local.cfg | 1 - llvm/test/ObjectYAML/MachO/virtual_section.yaml | 226 + llvm/test/Other/X86/lit.local.cfg | 1 - llvm/test/ThinLTO/X86/lit.local.cfg | 1 - .../Transforms/ArgumentPromotion/X86/lit.local.cfg | 1 - .../Transforms/AtomicExpand/AArch64/lit.local.cfg | 1 - .../test/Transforms/AtomicExpand/ARM/lit.local.cfg | 1 - .../Transforms/CodeExtractor/X86/lit.local.cfg | 1 - .../CodeGenPrepare/AArch64/lit.local.cfg | 1 - .../Transforms/CodeGenPrepare/AMDGPU/lit.local.cfg | 1 - .../Transforms/CodeGenPrepare/ARM/lit.local.cfg | 1 - .../Transforms/CodeGenPrepare/X86/lit.local.cfg | 1 - .../Transforms/CodeGenPrepare/X86/vec-shift.ll | 69 +- .../ConstantHoisting/PowerPC/lit.local.cfg | 1 - .../Transforms/ConstantHoisting/X86/lit.local.cfg | 1 - .../Transforms/DivRemPairs/PowerPC/lit.local.cfg | 1 - llvm/test/Transforms/DivRemPairs/X86/lit.local.cfg | 1 - .../test/Transforms/ExpandMemCmp/X86/lit.local.cfg | 1 - .../Transforms/GlobalOpt/PowerPC/lit.local.cfg | 1 - .../Transforms/HardwareLoops/ARM/lit.local.cfg | 1 - .../test/Transforms/HardwareLoops/ARM/structure.ll | 76 + .../HardwareLoops/unconditional-latch.ll | 46 + .../test/Transforms/HotColdSplit/X86/lit.local.cfg | 1 - .../IndVarSimplify/2011-10-27-lftrnull.ll | 4 +- .../IndVarSimplify/2011-11-01-lftrptr.ll | 10 +- .../Transforms/IndVarSimplify/eliminate-sat.ll | 16 +- .../Transforms/IndVarSimplify/lftr-dead-ivs.ll | 8 +- llvm/test/Transforms/IndVarSimplify/lftr.ll | 2 +- .../Transforms/InferAddressSpaces/AMDGPU/icmp.ll | 26 +- .../AMDGPU/infer-addrspacecast.ll | 4 +- .../InferAddressSpaces/AMDGPU/intrinsics.ll | 20 +- .../InferAddressSpaces/AMDGPU/lit.local.cfg | 1 - .../InferAddressSpaces/AMDGPU/no-flat-addrspace.ll | 13 + .../AMDGPU/redundant-addrspacecast.ll | 27 + .../Transforms/InferAddressSpaces/AMDGPU/select.ll | 18 +- .../InferAddressSpaces/AMDGPU/volatile.ll | 9 +- llvm/test/Transforms/Inline/PowerPC/lit.local.cfg | 1 - llvm/test/Transforms/Inline/X86/lit.local.cfg | 1 - .../InstCombine/AMDGPU/amdgcn-intrinsics.ll | 70 +- .../Transforms/InstCombine/PowerPC/lit.local.cfg | 1 - .../InstCombine/lshr-and-negC-icmpeq-zero.ll | 238 + .../InstCombine/lshr-and-signbit-icmpeq-zero.ll | 236 + .../InstCombine/shl-and-negC-icmpeq-zero.ll | 237 + .../InstCombine/shl-and-signbit-icmpeq-zero.ll | 237 + .../InstCombine/signbit-lshr-and-icmpeq-zero.ll | 242 + .../InstCombine/signbit-shl-and-icmpeq-zero.ll | 244 + llvm/test/Transforms/InstCombine/with_overflow.ll | 1 + llvm/test/Transforms/InstSimplify/call.ll | 16 +- .../LoadStoreVectorizer/AMDGPU/lit.local.cfg | 1 - .../LoadStoreVectorizer/NVPTX/lit.local.cfg | 1 - .../LoadStoreVectorizer/X86/lit.local.cfg | 1 - .../test/Transforms/LoopIdiom/AMDGPU/lit.local.cfg | 1 - llvm/test/Transforms/LoopIdiom/X86/lit.local.cfg | 1 - .../LoopIdiom/X86/unordered-atomic-memcpy.ll | 8 +- llvm/test/Transforms/LoopIdiom/basic.ll | 12 +- .../LoopIdiom/memcpy-debugify-remarks.ll | 2 +- llvm/test/Transforms/LoopReroll/basic.ll | 2 +- llvm/test/Transforms/LoopReroll/complex_reroll.ll | 2 +- llvm/test/Transforms/LoopReroll/nonconst_lb.ll | 4 +- llvm/test/Transforms/LoopReroll/ptrindvar.ll | 2 +- .../LoopStrengthReduce/2011-10-06-ReusePhi.ll | 4 +- .../LoopStrengthReduce/AMDGPU/lit.local.cfg | 1 - .../LoopStrengthReduce/ARM/lit.local.cfg | 1 - .../LoopStrengthReduce/X86/lit.local.cfg | 1 - .../LoopStrengthReduce/post-inc-icmpzero.ll | 2 +- .../Transforms/LoopUnroll/AArch64/lit.local.cfg | 1 - .../Transforms/LoopUnroll/AMDGPU/lit.local.cfg | 1 - llvm/test/Transforms/LoopUnroll/ARM/lit.local.cfg | 1 - .../Transforms/LoopUnroll/Hexagon/lit.local.cfg | 1 - .../Transforms/LoopUnroll/PowerPC/lit.local.cfg | 1 - llvm/test/Transforms/LoopUnroll/X86/lit.local.cfg | 1 - .../Transforms/LoopVectorize/AArch64/lit.local.cfg | 1 - .../Transforms/LoopVectorize/ARM/lit.local.cfg | 1 - .../Transforms/LoopVectorize/PowerPC/lit.local.cfg | 1 - .../Transforms/LoopVectorize/X86/lit.local.cfg | 1 - .../X86/x86_fp80-interleaved-access.ll | 29 + llvm/test/Transforms/ObjCARC/inert-global.ll | 65 + llvm/test/Transforms/PGOProfile/X86/lit.local.cfg | 1 - .../Transforms/SLPVectorizer/AMDGPU/lit.local.cfg | 1 - .../Transforms/SLPVectorizer/SystemZ/lit.local.cfg | 1 - .../Transforms/SLPVectorizer/X86/lit.local.cfg | 1 - llvm/test/Transforms/SROA/addrspacecast.ll | 306 ++ llvm/test/Transforms/SROA/basictest.ll | 110 +- llvm/test/Transforms/SROA/phi-and-select.ll | 50 + .../Transforms/SafeStack/AArch64/lit.local.cfg | 1 - llvm/test/Transforms/SafeStack/ARM/lit.local.cfg | 1 - llvm/test/Transforms/SafeStack/X86/lit.local.cfg | 1 - .../AMDGPU/lit.local.cfg | 1 - .../SeparateConstOffsetFromGEP/NVPTX/lit.local.cfg | 1 - .../Transforms/SimplifyCFG/SPARC/lit.local.cfg | 1 - llvm/test/Transforms/SimplifyCFG/X86/lit.local.cfg | 1 - .../Transforms/SimplifyCFG/sink-common-code.ll | 44 + llvm/test/Transforms/SimplifyCFG/switch-profmd.ll | 35 + .../Transforms/StackProtector/X86/lit.local.cfg | 1 - .../ThinLTOBitcodeWriter/x86/lit.local.cfg | 1 - .../intrinsic-arg-overloading-struct-ret.ll | 79 + llvm/test/tools/dsymutil/ARM/lit.local.cfg | 1 - llvm/test/tools/gold/X86/opt-remarks.ll | 2 + llvm/test/tools/llvm-lib/lit.local.cfg | 1 - llvm/test/tools/llvm-lto2/X86/lit.local.cfg | 1 - llvm/test/tools/llvm-mc/lit.local.cfg | 1 - llvm/test/tools/llvm-mca/SystemZ/lit.local.cfg | 1 - .../X86/Barcelona/clear-super-register-1.s | 63 + .../X86/Barcelona/clear-super-register-2.s | 118 + .../X86/Barcelona/dependency-breaking-cmp.s | 70 + .../X86/Barcelona/dependency-breaking-pcmpeq.s | 107 + .../X86/Barcelona/dependency-breaking-pcmpgt.s | 108 + .../X86/Barcelona/dependency-breaking-sbb-1.s | 71 + .../X86/Barcelona/dependency-breaking-sbb-2.s | 78 + .../X86/Barcelona/int-to-fpu-forwarding-1.s | 194 + .../X86/Barcelona/int-to-fpu-forwarding-2.s | 182 + .../X86/Barcelona/int-to-fpu-forwarding-3.s | 74 + .../test/tools/llvm-mca/X86/Barcelona/one-idioms.s | 96 + .../llvm-mca/X86/Barcelona/partial-reg-update-2.s | 47 + .../llvm-mca/X86/Barcelona/partial-reg-update-3.s | 76 + .../llvm-mca/X86/Barcelona/partial-reg-update-4.s | 77 + .../llvm-mca/X86/Barcelona/partial-reg-update-5.s | 59 + .../llvm-mca/X86/Barcelona/partial-reg-update-6.s | 79 + .../llvm-mca/X86/Barcelona/partial-reg-update-7.s | 98 + .../llvm-mca/X86/Barcelona/partial-reg-update.s | 47 + .../tools/llvm-mca/X86/Barcelona/rcu-statistics.s | 64 + .../tools/llvm-mca/X86/Barcelona/read-advance-1.s | 48 + .../tools/llvm-mca/X86/Barcelona/read-advance-2.s | 47 + .../tools/llvm-mca/X86/Barcelona/read-advance-3.s | 47 + .../X86/Barcelona/reg-move-elimination-1.s | 80 + .../X86/Barcelona/reg-move-elimination-2.s | 121 + .../X86/Barcelona/reg-move-elimination-3.s | 106 + .../X86/Barcelona/reg-move-elimination-4.s | 92 + .../X86/Barcelona/reg-move-elimination-5.s | 92 + .../X86/Barcelona/reg-move-elimination-6.s | 98 + .../X86/{Generic => Barcelona}/resources-3dnow.s | 0 .../X86/{Generic => Barcelona}/resources-cmov.s | 0 .../X86/{Generic => Barcelona}/resources-cmpxchg.s | 0 .../X86/{Generic => Barcelona}/resources-lea.s | 0 .../X86/{Generic => Barcelona}/resources-lzcnt.s | 0 .../X86/{Generic => Barcelona}/resources-mmx.s | 0 .../X86/{Generic => Barcelona}/resources-popcnt.s | 0 .../{Generic => Barcelona}/resources-prefetchw.s | 0 .../X86/{Generic => Barcelona}/resources-sse1.s | 0 .../X86/{Generic => Barcelona}/resources-sse2.s | 0 .../X86/{Generic => Barcelona}/resources-sse3.s | 0 .../X86/{Generic => Barcelona}/resources-sse4a.s | 0 .../X86/{Generic => Barcelona}/resources-x86_32.s | 0 .../X86/{Generic => Barcelona}/resources-x86_64.s | 0 .../X86/{Generic => Barcelona}/resources-x87.s | 0 .../tools/llvm-mca/X86/Barcelona/zero-idioms.s | 242 + .../llvm-mca/X86/BdVer2/clear-super-register-3.s | 112 + llvm/test/tools/llvm-mca/X86/cpus.s | 6 + llvm/test/tools/llvm-mca/X86/lit.local.cfg | 1 - llvm/test/tools/llvm-mca/X86/read-after-ld-1.s | 190 +- .../tools/llvm-mca/X86/register-file-statistics.s | 71 +- .../tools/llvm-mca/X86/scheduler-queue-usage.s | 10 + .../test/tools/llvm-mca/X86/sqrt-rsqrt-rcp-memop.s | 25 + llvm/test/tools/llvm-mca/lit.local.cfg | 1 - .../tools/llvm-objcopy/ELF/cross-arch-headers.test | 12 + .../llvm-objcopy/ELF/invalid-preserve-dates.test | 23 + llvm/test/tools/llvm-objdump/Mips/lit.local.cfg | 1 - .../tools/llvm-objdump/PowerPC/branch-offset.s | 4 +- .../tools/llvm-objdump/X86/print-symbol-addr.s | 35 +- llvm/test/tools/llvm-readobj/AArch64/lit.local.cfg | 1 - llvm/test/tools/llvm-readobj/ARM/lit.local.cfg | 1 - .../Inputs/wrong-shstrtab-type.elf-x86-64 | Bin 541 -> 0 bytes .../llvm-readobj/elf-wrong-shstrtab-type.test | 21 +- llvm/test/tools/yaml2obj/elf-symtab-shinfo.yaml | 20 +- llvm/test/tools/yaml2obj/elf-symtab-shtype.yaml | 20 +- .../tools/yaml2obj/explicit-dynsym-no-dynstr.yaml | 2 +- .../tools/yaml2obj/implicit-sections-types.test | 69 + .../yaml2obj/symtab-implicit-sections-flags.yaml | 4 +- llvm/tools/gold/gold-plugin.cpp | 18 +- llvm/tools/llc/llc.cpp | 48 +- llvm/tools/llvm-lto2/llvm-lto2.cpp | 29 +- llvm/tools/llvm-objcopy/CopyConfig.cpp | 17 +- llvm/tools/llvm-objdump/llvm-objdump.cpp | 13 +- llvm/tools/opt/opt.cpp | 54 +- llvm/tools/yaml2obj/yaml2elf.cpp | 8 +- llvm/tools/yaml2obj/yaml2macho.cpp | 18 +- .../CodeGen/GlobalISel/PatternMatchTest.cpp | 25 + llvm/utils/UpdateTestChecks/asm.py | 2 +- llvm/utils/gn/TODO.txt | 2 +- .../gn/secondary/llvm/include/llvm/Config/BUILD.gn | 12 +- .../llvm/lib/ExecutionEngine/JITLink/BUILD.gn | 1 + .../llvm/lib/Target/AArch64/MCTargetDesc/BUILD.gn | 1 - .../llvm/lib/Target/AArch64/TargetInfo/BUILD.gn | 4 - .../llvm/lib/Target/AArch64/Utils/BUILD.gn | 3 + .../gn/secondary/llvm/lib/Target/ARM/BUILD.gn | 2 +- .../llvm/lib/Target/ARM/MCTargetDesc/BUILD.gn | 2 +- .../llvm/lib/Target/ARM/TargetInfo/BUILD.gn | 4 - .../secondary/llvm/lib/Target/ARM/Utils/BUILD.gn | 3 + .../llvm/lib/Target/BPF/MCTargetDesc/BUILD.gn | 27 +- .../llvm/lib/Target/BPF/TargetInfo/BUILD.gn | 4 - llvm/utils/gn/secondary/llvm/lib/Target/BUILD.gn | 6 +- .../llvm/lib/Target/Hexagon/MCTargetDesc/BUILD.gn | 24 +- .../llvm/lib/Target/Hexagon/TargetInfo/BUILD.gn | 5 - .../llvm/lib/Target/Lanai/MCTargetDesc/BUILD.gn | 27 +- .../llvm/lib/Target/Lanai/TargetInfo/BUILD.gn | 1 - .../gn/secondary/llvm/lib/Target/NVPTX/BUILD.gn | 69 + .../llvm/lib/Target/NVPTX/MCTargetDesc/BUILD.gn | 51 + .../Target/{Lanai => NVPTX}/TargetInfo/BUILD.gn | 5 +- .../llvm/lib/Target/PowerPC/MCTargetDesc/BUILD.gn | 28 +- .../llvm/lib/Target/PowerPC/TargetInfo/BUILD.gn | 4 - .../secondary/llvm/lib/Target/RISCV/Utils/BUILD.gn | 3 + .../llvm/lib/Target/Sparc/MCTargetDesc/BUILD.gn | 27 +- .../llvm/lib/Target/Sparc/TargetInfo/BUILD.gn | 2 - .../lib/Target/WebAssembly/MCTargetDesc/BUILD.gn | 28 +- .../lib/Target/WebAssembly/TargetInfo/BUILD.gn | 4 - .../llvm/lib/Target/X86/MCTargetDesc/BUILD.gn | 27 +- .../llvm/lib/Target/X86/TargetInfo/BUILD.gn | 4 - .../utils/gn/secondary/llvm/lib/Target/targets.gni | 3 + .../llvm/lib/Target/targets_with_asm_parsers.gni | 9 + .../llvm/lib/Target/targets_with_disassemblers.gni | 9 + openmp/runtime/src/kmp.h | 6 + openmp/runtime/src/kmp_tasking.cpp | 10 + 884 files changed, 21246 insertions(+), 9752 deletions(-) rename clang/{include/clang/Basic => lib/Sema}/OpenCLBuiltins.td (100%) create mode 100644 clang/test/Analysis/inlining/placement-new-fp-suppression.cpp create mode 100644 clang/test/CXX/basic/basic.def.odr/p2.cpp create mode 100644 clang/test/CodeGen/split-debug-output.c create mode 100644 clang/test/CodeGenCUDA/amdgpu-hip-implicit-kernarg.cu create mode 100644 clang/test/CodeGenCXX/no-odr-use.cpp create mode 100644 clang/test/CodeGenObjC/attr-objc-arc-inert.m create mode 100644 clang/test/Driver/print-supported-cpus.c create mode 100644 compiler-rt/test/fuzzer/Labels20Test.cpp create mode 100644 libcxx/test/support/template_cost_testing.h create mode 100644 lld/test/COFF/associative-comdat-mingw-i386.s create mode 100644 lld/test/COFF/eh_frame_suffix_sorting.s create mode 100644 lldb/source/Plugins/Process/POSIX/NativeProcessELF.cpp create mode 100644 lldb/source/Plugins/Process/POSIX/NativeProcessELF.h create mode 100644 lldb/unittests/Process/POSIX/CMakeLists.txt create mode 100644 lldb/unittests/Process/POSIX/NativeProcessELFTest.cpp create mode 100644 lldb/unittests/TestingSupport/Host/NativeProcessTestUtils.h create mode 100644 llvm/cmake/modules/LLVMDistributionSupport.cmake create mode 100644 llvm/include/llvm/ExecutionEngine/JITLink/JITLinkMemoryManager.h create mode 100644 llvm/lib/ExecutionEngine/JITLink/JITLinkMemoryManager.cpp create mode 100644 llvm/lib/Target/ARM/ARMBasicBlockInfo.cpp delete mode 100644 llvm/lib/Target/ARM/ARMComputeBlockSize.cpp create mode 100644 llvm/test/CodeGen/AArch64/select_fmf.ll create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-illegal-copy.mir create mode 100644 llvm/test/CodeGen/AMDGPU/call-waitcnt.ll create mode 100644 llvm/test/CodeGen/AMDGPU/smrd-gfx10.ll create mode 100644 llvm/test/CodeGen/PowerPC/loop-align.ll create mode 100644 llvm/test/CodeGen/RISCV/split-offsets.ll create mode 100644 llvm/test/CodeGen/X86/constrained-fp80-trunc-ext.ll create mode 100644 llvm/test/CodeGen/X86/loop-rotate.ll create mode 100644 llvm/test/CodeGen/X86/move_latch_to_loop_top.ll create mode 100644 llvm/test/CodeGen/X86/omit-urem-of-power-of-two-or-zero-when-co [...] create mode 100644 llvm/test/CodeGen/X86/vector-shift-by-select-loop.ll create mode 100644 llvm/test/MC/ARM/mve-reductions-fp.s create mode 100644 llvm/test/MachineVerifier/test_g_brjt.mir create mode 100644 llvm/test/ObjectYAML/MachO/virtual_section.yaml create mode 100644 llvm/test/Transforms/HardwareLoops/unconditional-latch.ll create mode 100644 llvm/test/Transforms/InferAddressSpaces/AMDGPU/no-flat-addrspace.ll create mode 100644 llvm/test/Transforms/InferAddressSpaces/AMDGPU/redundant-addrsp [...] create mode 100644 llvm/test/Transforms/InstCombine/lshr-and-negC-icmpeq-zero.ll create mode 100644 llvm/test/Transforms/InstCombine/lshr-and-signbit-icmpeq-zero.ll create mode 100644 llvm/test/Transforms/InstCombine/shl-and-negC-icmpeq-zero.ll create mode 100644 llvm/test/Transforms/InstCombine/shl-and-signbit-icmpeq-zero.ll create mode 100644 llvm/test/Transforms/InstCombine/signbit-lshr-and-icmpeq-zero.ll create mode 100644 llvm/test/Transforms/InstCombine/signbit-shl-and-icmpeq-zero.ll create mode 100644 llvm/test/Transforms/LoopVectorize/X86/x86_fp80-interleaved-access.ll create mode 100644 llvm/test/Transforms/ObjCARC/inert-global.ll create mode 100644 llvm/test/Transforms/SROA/addrspacecast.ll create mode 100644 llvm/test/Transforms/SimplifyCFG/switch-profmd.ll create mode 100644 llvm/test/Verifier/intrinsic-arg-overloading-struct-ret.ll create mode 100644 llvm/test/tools/llvm-mca/X86/Barcelona/clear-super-register-1.s create mode 100644 llvm/test/tools/llvm-mca/X86/Barcelona/clear-super-register-2.s create mode 100644 llvm/test/tools/llvm-mca/X86/Barcelona/dependency-breaking-cmp.s create mode 100644 llvm/test/tools/llvm-mca/X86/Barcelona/dependency-breaking-pcmpeq.s create mode 100644 llvm/test/tools/llvm-mca/X86/Barcelona/dependency-breaking-pcmpgt.s create mode 100644 llvm/test/tools/llvm-mca/X86/Barcelona/dependency-breaking-sbb-1.s create mode 100644 llvm/test/tools/llvm-mca/X86/Barcelona/dependency-breaking-sbb-2.s create mode 100644 llvm/test/tools/llvm-mca/X86/Barcelona/int-to-fpu-forwarding-1.s create mode 100644 llvm/test/tools/llvm-mca/X86/Barcelona/int-to-fpu-forwarding-2.s create mode 100644 llvm/test/tools/llvm-mca/X86/Barcelona/int-to-fpu-forwarding-3.s create mode 100644 llvm/test/tools/llvm-mca/X86/Barcelona/one-idioms.s create mode 100644 llvm/test/tools/llvm-mca/X86/Barcelona/partial-reg-update-2.s create mode 100644 llvm/test/tools/llvm-mca/X86/Barcelona/partial-reg-update-3.s create mode 100644 llvm/test/tools/llvm-mca/X86/Barcelona/partial-reg-update-4.s create mode 100644 llvm/test/tools/llvm-mca/X86/Barcelona/partial-reg-update-5.s create mode 100644 llvm/test/tools/llvm-mca/X86/Barcelona/partial-reg-update-6.s create mode 100644 llvm/test/tools/llvm-mca/X86/Barcelona/partial-reg-update-7.s create mode 100644 llvm/test/tools/llvm-mca/X86/Barcelona/partial-reg-update.s create mode 100644 llvm/test/tools/llvm-mca/X86/Barcelona/rcu-statistics.s create mode 100644 llvm/test/tools/llvm-mca/X86/Barcelona/read-advance-1.s create mode 100644 llvm/test/tools/llvm-mca/X86/Barcelona/read-advance-2.s create mode 100644 llvm/test/tools/llvm-mca/X86/Barcelona/read-advance-3.s create mode 100644 llvm/test/tools/llvm-mca/X86/Barcelona/reg-move-elimination-1.s create mode 100644 llvm/test/tools/llvm-mca/X86/Barcelona/reg-move-elimination-2.s create mode 100644 llvm/test/tools/llvm-mca/X86/Barcelona/reg-move-elimination-3.s create mode 100644 llvm/test/tools/llvm-mca/X86/Barcelona/reg-move-elimination-4.s create mode 100644 llvm/test/tools/llvm-mca/X86/Barcelona/reg-move-elimination-5.s create mode 100644 llvm/test/tools/llvm-mca/X86/Barcelona/reg-move-elimination-6.s copy llvm/test/tools/llvm-mca/X86/{Generic => Barcelona}/resources-3dnow.s (100%) copy llvm/test/tools/llvm-mca/X86/{Generic => Barcelona}/resources-cmov.s (100%) copy llvm/test/tools/llvm-mca/X86/{Generic => Barcelona}/resources-cmpxchg.s (100%) copy llvm/test/tools/llvm-mca/X86/{Generic => Barcelona}/resources-lea.s (100%) copy llvm/test/tools/llvm-mca/X86/{Generic => Barcelona}/resources-lzcnt.s (100%) copy llvm/test/tools/llvm-mca/X86/{Generic => Barcelona}/resources-mmx.s (100%) copy llvm/test/tools/llvm-mca/X86/{Generic => Barcelona}/resources-popcnt.s (100%) copy llvm/test/tools/llvm-mca/X86/{Generic => Barcelona}/resources-prefetchw.s (100%) copy llvm/test/tools/llvm-mca/X86/{Generic => Barcelona}/resources-sse1.s (100%) copy llvm/test/tools/llvm-mca/X86/{Generic => Barcelona}/resources-sse2.s (100%) copy llvm/test/tools/llvm-mca/X86/{Generic => Barcelona}/resources-sse3.s (100%) copy llvm/test/tools/llvm-mca/X86/{Generic => Barcelona}/resources-sse4a.s (100%) copy llvm/test/tools/llvm-mca/X86/{Generic => Barcelona}/resources-x86_32.s (100%) copy llvm/test/tools/llvm-mca/X86/{Generic => Barcelona}/resources-x86_64.s (100%) copy llvm/test/tools/llvm-mca/X86/{Generic => Barcelona}/resources-x87.s (100%) create mode 100644 llvm/test/tools/llvm-mca/X86/Barcelona/zero-idioms.s create mode 100644 llvm/test/tools/llvm-mca/X86/BdVer2/clear-super-register-3.s create mode 100644 llvm/test/tools/llvm-objcopy/ELF/invalid-preserve-dates.test delete mode 100644 llvm/test/tools/llvm-readobj/Inputs/wrong-shstrtab-type.elf-x86-64 create mode 100644 llvm/test/tools/yaml2obj/implicit-sections-types.test create mode 100644 llvm/utils/gn/secondary/llvm/lib/Target/NVPTX/BUILD.gn create mode 100644 llvm/utils/gn/secondary/llvm/lib/Target/NVPTX/MCTargetDesc/BUILD.gn copy llvm/utils/gn/secondary/llvm/lib/Target/{Lanai => NVPTX}/TargetInfo/BUILD.gn (59%) create mode 100644 llvm/utils/gn/secondary/llvm/lib/Target/targets_with_asm_parsers.gni create mode 100644 llvm/utils/gn/secondary/llvm/lib/Target/targets_with_disassemblers.gni