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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu_cross_build/master-aarch64 in repository toolchain/ci/binutils-gdb.

from c9fed6655f PATCH [4/4] arm: Add Tag_PACRET_use build attribute adds 4eb629d50d gdbserver: Check r_version < 1 for Linux debugger interface adds c0154a4a21 gdb: Don't assume r_ldsomap when r_version > 1 on Linux adds 5d9cff510e opcodes: Fix the auxiliary register numbers for ARC HS adds c316c0b29d gdb: fix thread_step_over_chain_length adds 8ae5245324 Automatic date update in version.in adds 9335d9f823 sim: rename ChangeLog files to ChangeLog-2021 adds 10d8e25c4d sim: nltvals: localize TARGET_<ERRNO> defines adds 9068c4a488 gdb: fix spacing on CCLD silent rules adds a3e8dd2ad3 Another ld script backtrack adds 89c905a342 [GOLD] PowerPC64 relocation overflow for -Os register save/r [...] adds a86733d63d Re: as: Replace the removed symbol with the versioned symbol adds bc0df0fa47 [gdb] [rs6000] Add ppc64*_gnu_triplet_regexp methods. adds 533f04079c [gdb] [rs6000] Add ppc64_linux_gcc_target_options method. adds 76bed1fdbd Automatic date update in version.in adds 8ddf46454a gdb/solib: Refactor scan_dyntag adds 7e40d574be x86: Avoid abort on invalid broadcast adds ca22cf5ed5 x86: Put back 3 aborts in OP_E_memory adds 9413ea1609 gdb: use bool in notify_command_param_changed_p and do_set_command adds f28b723787 Automatic date update in version.in adds 082cf6944a sim: nltvals: switch output mode to a directory adds 49e96aa482 Automatic date update in version.in adds ca4f6fe4fb Automatic date update in version.in adds fe7f0b0135 sim: m32r: add __linux__ hack for non-Linux hosts adds a12ea97b9d Automatic date update in version.in adds d53f8a8472 [gdb/testsuite] Fix dw2-ranges-psym.exp with -readnow adds 5ef670d81f [gdb/testsuite] Add dummy start and end CUs in dwarf assembly adds 74cdc3e088 [gdb/testsuite] Use compiler-generated instead of gas-genera [...] adds a9680e0e54 [gdb] Fix 'not in executable format' error message adds d30c6bef12 Fix a latent bug in dw2-ranges-overlap.exp adds ba67587722 Automatic date update in version.in adds ee077885e5 FT32: Remove recursion in ft32_opcode adds d4f5b5e214 objdump -S test fail on mingw adds 5c133c1095 Real programmers don't configure gcc using --with-ld adds d58e54bd27 Fix two regressions caused by CU / TU merging adds f120bef247 Automatic date update in version.in adds 0b98060864 Automatic date update in version.in adds 89662f6901 gdb: remove some stray newlines in debug output adds 77d63f99d6 Automatic date update in version.in adds 698c974ffc [gdb/testsuite] Add label option to proc cu adds 9f63756509 [gdb/testsuite] Support .debug_aranges in dwarf assembly adds 1d4a20b576 [gdb/testsuite] Add .debug_aranges in more test-cases adds 6a6429e19b [gdb/testsuite] Generate .debug_aranges entry for dummy CU adds 426f7bbfd4 [gdb/testsuite] Generate .debug_aranges in gdb.dlang/watch-loc.exp adds 34daac4b16 [gdb/symtab] Don't write .gdb_index symbol table with empty entries adds bfc25dcdad Automatic date update in version.in adds b05929a20e PR28264, ld.bfd crash on linking efivar with LTO adds 7de7786bb7 ld: Change indirect symbol from IR to undefined adds 6481316162 Automatic date update in version.in adds cb03dd22b3 Automatic date update in version.in adds 590d3faada [gdb/testsuite] Improve argument syntax of proc arange adds 9b9b1092f0 RISC-V: PR27916, Support mapping symbols. new f947f96797 [gdb/cli] Don't assert on empty string for core-file

The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference.

Summary of changes: bfd/cpu-riscv.c | 9 + bfd/cpu-riscv.h | 3 + bfd/elflink.c | 23 +- bfd/elfnn-riscv.c | 25 +- bfd/linker.c | 2 +- bfd/version.h | 2 +- binutils/readelf.c | 2 +- binutils/testsuite/binutils-all/objcopy.exp | 18 +- binutils/testsuite/binutils-all/objdump.exp | 15 +- binutils/testsuite/binutils-all/readelf.s-64 | 4 +- .../testsuite/binutils-all/readelf.s-64-unused | 4 +- binutils/testsuite/binutils-all/readelf.ss | 2 + binutils/testsuite/binutils-all/readelf.ss-64 | 7 +- .../testsuite/binutils-all/readelf.ss-64-unused | 7 +- binutils/testsuite/binutils-all/readelf.ss-unused | 2 + binutils/testsuite/lib/binutils-common.exp | 12 + gas/config/tc-riscv.c | 201 +- gas/config/tc-riscv.h | 24 + gas/testsuite/gas/i386/bad-bcast.d | 14 + gas/testsuite/gas/i386/bad-bcast.s | 3 + gas/testsuite/gas/i386/i386.exp | 1 + gas/testsuite/gas/riscv/mapping-01.s | 17 + gas/testsuite/gas/riscv/mapping-01a.d | 17 + gas/testsuite/gas/riscv/mapping-01b.d | 21 + gas/testsuite/gas/riscv/mapping-02.s | 12 + gas/testsuite/gas/riscv/mapping-02a.d | 15 + gas/testsuite/gas/riscv/mapping-02b.d | 16 + gas/testsuite/gas/riscv/mapping-03.s | 11 + gas/testsuite/gas/riscv/mapping-03a.d | 20 + gas/testsuite/gas/riscv/mapping-03b.d | 24 + gas/testsuite/gas/riscv/mapping-04.s | 13 + gas/testsuite/gas/riscv/mapping-04a.d | 15 + gas/testsuite/gas/riscv/mapping-04b.d | 23 + gas/testsuite/gas/riscv/mapping-norelax-03a.d | 21 + gas/testsuite/gas/riscv/mapping-norelax-03b.d | 25 + gas/testsuite/gas/riscv/mapping-norelax-04a.d | 16 + gas/testsuite/gas/riscv/mapping-norelax-04b.d | 24 + gas/testsuite/gas/riscv/no-relax-align-2.d | 3 +- gas/testsuite/gas/symver/symver16.d | 4 +- gdb/aarch64-linux-tdep.c | 2 +- gdb/alpha-linux-tdep.c | 2 +- gdb/amd64-linux-tdep.c | 4 +- gdb/arc-linux-tdep.c | 2 +- gdb/arm-linux-tdep.c | 2 +- gdb/cli/cli-setshow.c | 32 +- gdb/corelow.c | 3 +- gdb/cris-linux-tdep.c | 2 +- gdb/csky-linux-tdep.c | 2 +- gdb/dwarf2/index-write.c | 3 + gdb/dwarf2/read.c | 114 +- gdb/dwarf2/read.h | 10 - gdb/exec.c | 8 +- gdb/hppa-linux-tdep.c | 2 +- gdb/i386-linux-tdep.c | 2 +- gdb/ia64-linux-tdep.c | 2 +- gdb/linux-nat.c | 4 +- gdb/linux-tdep.c | 60 + gdb/linux-tdep.h | 5 + gdb/m32r-linux-tdep.c | 2 +- gdb/m68k-linux-tdep.c | 2 +- gdb/microblaze-linux-tdep.c | 2 +- gdb/mips-linux-tdep.c | 6 +- gdb/mn10300-linux-tdep.c | 2 +- gdb/nios2-linux-tdep.c | 2 +- gdb/or1k-linux-tdep.c | 2 +- gdb/ppc-linux-tdep.c | 43 +- gdb/riscv-linux-tdep.c | 4 +- gdb/s390-linux-tdep.c | 4 +- gdb/sh-linux-tdep.c | 2 +- gdb/silent-rules.mk | 2 +- gdb/solib-dsbt.c | 104 +- gdb/solib-svr4.c | 118 +- gdb/solib.c | 104 + gdb/solib.h | 6 + gdb/sparc-linux-tdep.c | 2 +- gdb/sparc64-linux-tdep.c | 2 +- gdb/testsuite/gdb.base/batch-exit-status.exp | 4 + gdb/testsuite/gdb.base/non-executable.exp | 32 + gdb/testsuite/gdb.dlang/watch-loc.c | 28 - gdb/testsuite/gdb.dlang/watch-loc.exp | 21 +- gdb/testsuite/gdb.dwarf2/dw2-ranges-base.exp | 8 +- gdb/testsuite/gdb.dwarf2/dw2-ranges-overlap.c | 9 +- gdb/testsuite/gdb.dwarf2/dw2-ranges-overlap.exp | 10 +- gdb/testsuite/gdb.dwarf2/dw2-ranges.exp | 15 +- .../gdb.dwarf2/frame-inlined-in-outer-frame.exp | 6 +- .../template-specification-full-name.exp | 11 +- gdb/testsuite/gdb.testsuite/parse_options_args.exp | 59 + gdb/testsuite/lib/dwarf.exp | 182 +- gdb/testsuite/lib/gdb.exp | 110 +- gdb/thread.c | 2 +- gdb/tilegx-linux-tdep.c | 4 +- gdb/xtensa-linux-tdep.c | 2 +- gdbserver/linux-low.cc | 2 +- gold/powerpc.cc | 2 + include/opcode/riscv.h | 7 + include/sim/{ChangeLog => ChangeLog-2021} | 0 ld/ldgram.y | 5 + ld/testsuite/ld-plugin/lto.exp | 9 + ld/testsuite/ld-plugin/pr28264-1.d | 5 + ld/testsuite/ld-plugin/pr28264-2.d | 5 + ld/testsuite/ld-plugin/pr28264-3.d | 4 + ld/testsuite/ld-plugin/pr28264-4.d | 4 + ld/testsuite/ld-plugin/pr28264.c | 11 + ld/testsuite/ld-plugin/pr28264.ver | 8 + ld/testsuite/lib/ld-lib.exp | 6 +- opcodes/ChangeLog | 4 + opcodes/arc-regs.h | 4 +- opcodes/ft32-dis.c | 229 ++- opcodes/i386-dis.c | 4 +- opcodes/riscv-dis.c | 245 ++- sim/.gitignore | 2 + sim/{ChangeLog => ChangeLog-2021} | 0 sim/Makefile.am | 3 +- sim/Makefile.in | 3 +- sim/aarch64/{ChangeLog => ChangeLog-2021} | 0 sim/arm/{ChangeLog => ChangeLog-2021} | 0 sim/avr/{ChangeLog => ChangeLog-2021} | 0 sim/bfin/{ChangeLog => ChangeLog-2021} | 0 sim/bfin/interp.c | 22 +- sim/bpf/{ChangeLog => ChangeLog-2021} | 0 sim/common/{ChangeLog => ChangeLog-2021} | 0 sim/common/gennltvals.py | 13 +- sim/common/gentmap.c | 6 +- sim/cr16/{ChangeLog => ChangeLog-2021} | 0 sim/cris/{ChangeLog => ChangeLog-2021} | 0 sim/d10v/{ChangeLog => ChangeLog-2021} | 0 sim/erc32/{ChangeLog => ChangeLog-2021} | 0 sim/example-synacor/{ChangeLog => ChangeLog-2021} | 0 sim/frv/{ChangeLog => ChangeLog-2021} | 0 sim/ft32/{ChangeLog => ChangeLog-2021} | 0 sim/h8300/{ChangeLog => ChangeLog-2021} | 0 sim/igen/{ChangeLog => ChangeLog-2021} | 0 sim/iq2000/{ChangeLog => ChangeLog-2021} | 0 sim/lm32/{ChangeLog => ChangeLog-2021} | 0 sim/m32c/{ChangeLog => ChangeLog-2021} | 0 sim/m32r/{ChangeLog => ChangeLog-2021} | 0 sim/m32r/traps.c | 8 + sim/m68hc11/{ChangeLog => ChangeLog-2021} | 0 sim/mcore/{ChangeLog => ChangeLog-2021} | 0 sim/microblaze/{ChangeLog => ChangeLog-2021} | 0 sim/mips/{ChangeLog => ChangeLog-2021} | 0 sim/mn10300/{ChangeLog => ChangeLog-2021} | 0 sim/moxie/{ChangeLog => ChangeLog-2021} | 0 sim/msp430/{ChangeLog => ChangeLog-2021} | 0 sim/or1k/{ChangeLog => ChangeLog-2021} | 0 sim/ppc/{ChangeLog => ChangeLog-2021} | 2168 ++++++++++++++++++++ sim/ppc/ChangeLog.00 | 2168 -------------------- sim/pru/{ChangeLog => ChangeLog-2021} | 0 sim/riscv/{ChangeLog => ChangeLog-2021} | 0 sim/rl78/{ChangeLog => ChangeLog-2021} | 0 sim/rx/{ChangeLog => ChangeLog-2021} | 0 sim/sh/{ChangeLog => ChangeLog-2021} | 0 sim/testsuite/{ChangeLog => ChangeLog-2021} | 0 .../aarch64/{ChangeLog => ChangeLog-2021} | 0 sim/testsuite/arm/{ChangeLog => ChangeLog-2021} | 0 sim/testsuite/avr/{ChangeLog => ChangeLog-2021} | 0 sim/testsuite/bfin/{ChangeLog => ChangeLog-2021} | 0 sim/testsuite/bpf/{ChangeLog => ChangeLog-2021} | 0 sim/testsuite/cr16/{ChangeLog => ChangeLog-2021} | 0 sim/testsuite/cris/{ChangeLog => ChangeLog-2021} | 0 sim/testsuite/d10v/{ChangeLog => ChangeLog-2021} | 0 .../example-synacor/{ChangeLog => ChangeLog-2021} | 0 sim/testsuite/frv/{ChangeLog => ChangeLog-2021} | 0 sim/testsuite/ft32/{ChangeLog => ChangeLog-2021} | 0 sim/testsuite/h8300/{ChangeLog => ChangeLog-2021} | 0 sim/testsuite/iq2000/{ChangeLog => ChangeLog-2021} | 0 sim/testsuite/lm32/{ChangeLog => ChangeLog-2021} | 0 sim/testsuite/m32c/{ChangeLog => ChangeLog-2021} | 0 sim/testsuite/m32r/{ChangeLog => ChangeLog-2021} | 0 .../m68hc11/{ChangeLog => ChangeLog-2021} | 0 sim/testsuite/mcore/{ChangeLog => ChangeLog-2021} | 0 .../microblaze/{ChangeLog => ChangeLog-2021} | 0 sim/testsuite/mips/{ChangeLog => ChangeLog-2021} | 0 .../mn10300/{ChangeLog => ChangeLog-2021} | 0 sim/testsuite/moxie/{ChangeLog => ChangeLog-2021} | 0 sim/testsuite/msp430/{ChangeLog => ChangeLog-2021} | 0 sim/testsuite/or1k/{ChangeLog => ChangeLog-2021} | 0 sim/testsuite/pru/{ChangeLog => ChangeLog-2021} | 0 sim/testsuite/riscv/{ChangeLog => ChangeLog-2021} | 0 sim/testsuite/sh/{ChangeLog => ChangeLog-2021} | 0 sim/testsuite/v850/{ChangeLog => ChangeLog-2021} | 0 sim/v850/{ChangeLog => ChangeLog-2021} | 0 182 files changed, 4029 insertions(+), 2768 deletions(-) create mode 100644 gas/testsuite/gas/i386/bad-bcast.d create mode 100644 gas/testsuite/gas/i386/bad-bcast.s create mode 100644 gas/testsuite/gas/riscv/mapping-01.s create mode 100644 gas/testsuite/gas/riscv/mapping-01a.d create mode 100644 gas/testsuite/gas/riscv/mapping-01b.d create mode 100644 gas/testsuite/gas/riscv/mapping-02.s create mode 100644 gas/testsuite/gas/riscv/mapping-02a.d create mode 100644 gas/testsuite/gas/riscv/mapping-02b.d create mode 100644 gas/testsuite/gas/riscv/mapping-03.s create mode 100644 gas/testsuite/gas/riscv/mapping-03a.d create mode 100644 gas/testsuite/gas/riscv/mapping-03b.d create mode 100644 gas/testsuite/gas/riscv/mapping-04.s create mode 100644 gas/testsuite/gas/riscv/mapping-04a.d create mode 100644 gas/testsuite/gas/riscv/mapping-04b.d create mode 100644 gas/testsuite/gas/riscv/mapping-norelax-03a.d create mode 100644 gas/testsuite/gas/riscv/mapping-norelax-03b.d create mode 100644 gas/testsuite/gas/riscv/mapping-norelax-04a.d create mode 100644 gas/testsuite/gas/riscv/mapping-norelax-04b.d create mode 100644 gdb/testsuite/gdb.base/non-executable.exp create mode 100644 gdb/testsuite/gdb.testsuite/parse_options_args.exp rename include/sim/{ChangeLog => ChangeLog-2021} (100%) create mode 100644 ld/testsuite/ld-plugin/pr28264-1.d create mode 100644 ld/testsuite/ld-plugin/pr28264-2.d create mode 100644 ld/testsuite/ld-plugin/pr28264-3.d create mode 100644 ld/testsuite/ld-plugin/pr28264-4.d create mode 100644 ld/testsuite/ld-plugin/pr28264.c create mode 100644 ld/testsuite/ld-plugin/pr28264.ver rename sim/{ChangeLog => ChangeLog-2021} (100%) rename sim/aarch64/{ChangeLog => ChangeLog-2021} (100%) rename sim/arm/{ChangeLog => ChangeLog-2021} (100%) rename sim/avr/{ChangeLog => ChangeLog-2021} (100%) rename sim/bfin/{ChangeLog => ChangeLog-2021} (100%) rename sim/bpf/{ChangeLog => ChangeLog-2021} (100%) rename sim/common/{ChangeLog => ChangeLog-2021} (100%) rename sim/cr16/{ChangeLog => ChangeLog-2021} (100%) rename sim/cris/{ChangeLog => ChangeLog-2021} (100%) rename sim/d10v/{ChangeLog => ChangeLog-2021} (100%) rename sim/erc32/{ChangeLog => ChangeLog-2021} (100%) rename sim/example-synacor/{ChangeLog => ChangeLog-2021} (100%) rename sim/frv/{ChangeLog => ChangeLog-2021} (100%) rename sim/ft32/{ChangeLog => ChangeLog-2021} (100%) rename sim/h8300/{ChangeLog => ChangeLog-2021} (100%) rename sim/igen/{ChangeLog => ChangeLog-2021} (100%) rename sim/iq2000/{ChangeLog => ChangeLog-2021} (100%) rename sim/lm32/{ChangeLog => ChangeLog-2021} (100%) rename sim/m32c/{ChangeLog => ChangeLog-2021} (100%) rename sim/m32r/{ChangeLog => ChangeLog-2021} (100%) rename sim/m68hc11/{ChangeLog => ChangeLog-2021} (100%) rename sim/mcore/{ChangeLog => ChangeLog-2021} (100%) rename sim/microblaze/{ChangeLog => ChangeLog-2021} (100%) rename sim/mips/{ChangeLog => ChangeLog-2021} (100%) rename sim/mn10300/{ChangeLog => ChangeLog-2021} (100%) rename sim/moxie/{ChangeLog => ChangeLog-2021} (100%) rename sim/msp430/{ChangeLog => ChangeLog-2021} (100%) rename sim/or1k/{ChangeLog => ChangeLog-2021} (100%) rename sim/ppc/{ChangeLog => ChangeLog-2021} (67%) delete mode 100644 sim/ppc/ChangeLog.00 rename sim/pru/{ChangeLog => ChangeLog-2021} (100%) rename sim/riscv/{ChangeLog => ChangeLog-2021} (100%) rename sim/rl78/{ChangeLog => ChangeLog-2021} (100%) rename sim/rx/{ChangeLog => ChangeLog-2021} (100%) rename sim/sh/{ChangeLog => ChangeLog-2021} (100%) rename sim/testsuite/{ChangeLog => ChangeLog-2021} (100%) rename sim/testsuite/aarch64/{ChangeLog => ChangeLog-2021} (100%) rename sim/testsuite/arm/{ChangeLog => ChangeLog-2021} (100%) rename sim/testsuite/avr/{ChangeLog => ChangeLog-2021} (100%) rename sim/testsuite/bfin/{ChangeLog => ChangeLog-2021} (100%) rename sim/testsuite/bpf/{ChangeLog => ChangeLog-2021} (100%) rename sim/testsuite/cr16/{ChangeLog => ChangeLog-2021} (100%) rename sim/testsuite/cris/{ChangeLog => ChangeLog-2021} (100%) rename sim/testsuite/d10v/{ChangeLog => ChangeLog-2021} (100%) rename sim/testsuite/example-synacor/{ChangeLog => ChangeLog-2021} (100%) rename sim/testsuite/frv/{ChangeLog => ChangeLog-2021} (100%) rename sim/testsuite/ft32/{ChangeLog => ChangeLog-2021} (100%) rename sim/testsuite/h8300/{ChangeLog => ChangeLog-2021} (100%) rename sim/testsuite/iq2000/{ChangeLog => ChangeLog-2021} (100%) rename sim/testsuite/lm32/{ChangeLog => ChangeLog-2021} (100%) rename sim/testsuite/m32c/{ChangeLog => ChangeLog-2021} (100%) rename sim/testsuite/m32r/{ChangeLog => ChangeLog-2021} (100%) rename sim/testsuite/m68hc11/{ChangeLog => ChangeLog-2021} (100%) rename sim/testsuite/mcore/{ChangeLog => ChangeLog-2021} (100%) rename sim/testsuite/microblaze/{ChangeLog => ChangeLog-2021} (100%) rename sim/testsuite/mips/{ChangeLog => ChangeLog-2021} (100%) rename sim/testsuite/mn10300/{ChangeLog => ChangeLog-2021} (100%) rename sim/testsuite/moxie/{ChangeLog => ChangeLog-2021} (100%) rename sim/testsuite/msp430/{ChangeLog => ChangeLog-2021} (100%) rename sim/testsuite/or1k/{ChangeLog => ChangeLog-2021} (100%) rename sim/testsuite/pru/{ChangeLog => ChangeLog-2021} (100%) rename sim/testsuite/riscv/{ChangeLog => ChangeLog-2021} (100%) rename sim/testsuite/sh/{ChangeLog => ChangeLog-2021} (100%) rename sim/testsuite/v850/{ChangeLog => ChangeLog-2021} (100%) rename sim/v850/{ChangeLog => ChangeLog-2021} (100%)