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from 34d4168eb72 i386: Implement doubleword right shifts by 1 bit using s[ha]r+rcr. new 784deda0da6 RISC-V Regression test: Fix FAIL of fast-math-slp-38.c for RVV

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Summary of changes: gcc/testsuite/gcc.dg/vect/fast-math-slp-38.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)