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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk-code_speed-cpu2017rate/llvm-arm-master-O3 in repository toolchain/ci/base-artifacts.
from 8e81617b53 onsuccess: #44: 1: [TCWG CI] https://ci.linaro.org/job/tcwg_ [...] new c78ca20868 onsuccess: #46: 1: [TCWG CI] https://ci.linaro.org/job/tcwg_ [...]
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Summary of changes: 01-reset_artifacts/console.log.xz | Bin 2068 -> 1920 bytes 02-build_bmk_llvm/console.log.xz | Bin 241528 -> 235988 bytes 03-benchmark/benchmark-build.log | 241 +- 03-benchmark/benchmark.log | 239 +- 03-benchmark/console.log.xz | Bin 4200 -> 5200 bytes 04-check_regression/bmk-specific-variability.csv | 13 +- 04-check_regression/console.log.xz | Bin 2724 -> 2832 bytes annex/bmk-data/csv_results/md5sum.csv | 1 + annex/bmk-data/csv_results/perf.csv | 1 + annex/bmk-data/csv_results/results.csv | 1 + annex/bmk-data/csv_results/size.csv | 1 + annex/bmk-data/csv_results/sve.csv | 1 + annex/bmk-data/csv_results/vect.csv | 1 + .../CPU2017.serial.intrate.refrate.cfg.run.1 | 1 + .../CPU2017.serial.intrate.refrate.csv.run.1 | 1 + ...CPU2017.serial.intrate.refrate.flags.html.run.1 | 1 + .../CPU2017.serial.intrate.refrate.html.run.1 | 1 + .../CPU2017.serial.intrate.refrate.orig.cfg.run.1 | 1 + .../CPU2017.serial.intrate.refrate.pdf.run.1 | 1 + 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| 1393 +- results_id | 2 +- 249 files changed, 461906 insertions(+), 76206 deletions(-) create mode 120000 annex/bmk-data/csv_results/md5sum.csv create mode 120000 annex/bmk-data/csv_results/perf.csv create mode 120000 annex/bmk-data/csv_results/results.csv create mode 120000 annex/bmk-data/csv_results/size.csv create mode 120000 annex/bmk-data/csv_results/sve.csv create mode 120000 annex/bmk-data/csv_results/vect.csv create mode 120000 annex/bmk-data/tcwg-bmk-tk1-01.tcwglab/CPU2017.serial.intrate.r [...] create mode 120000 annex/bmk-data/tcwg-bmk-tk1-01.tcwglab/CPU2017.serial.intrate.r [...] create mode 120000 annex/bmk-data/tcwg-bmk-tk1-01.tcwglab/CPU2017.serial.intrate.r [...] create mode 120000 annex/bmk-data/tcwg-bmk-tk1-01.tcwglab/CPU2017.serial.intrate.r [...] create mode 120000 annex/bmk-data/tcwg-bmk-tk1-01.tcwglab/CPU2017.serial.intrate.r [...] create mode 120000 annex/bmk-data/tcwg-bmk-tk1-01.tcwglab/CPU2017.serial.intrate.r [...] create mode 120000 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