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from 827b2a279fc Do not allow "x + 0.0" to "x" optimization with -fsignaling-nans new dbcbc858c71 RISC-V: Save and restore FCSR in interrupt functions to avo [...]

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Summary of changes: gcc/config/riscv/riscv.cc | 48 +++++++++++++++++++++-- gcc/config/riscv/riscv.md | 13 ++++++ gcc/testsuite/gcc.target/riscv/interrupt-fcsr-1.c | 15 +++++++ gcc/testsuite/gcc.target/riscv/interrupt-fcsr-2.c | 15 +++++++ gcc/testsuite/gcc.target/riscv/interrupt-fcsr-3.c | 14 +++++++ 5 files changed, 102 insertions(+), 3 deletions(-) create mode 100644 gcc/testsuite/gcc.target/riscv/interrupt-fcsr-1.c create mode 100644 gcc/testsuite/gcc.target/riscv/interrupt-fcsr-2.c create mode 100644 gcc/testsuite/gcc.target/riscv/interrupt-fcsr-3.c