This is an automated email from the git hooks/post-receive script.

tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-lts-allnoconfig in repository toolchain/ci/llvm-project.

from b42fa0c0409 Revert "[Asan] Fix false leak report" adds a8a85166d81 Revert "[Asan] Accept __lsan_ignore_object for redzone pointer" adds 070b96962f5 [ARM][MachineOutliner] Add calls handling. adds d427df6369f [clangd] Don't use zlib when it's unavailable. adds ef0b9f3307a [ARM][LowOverheadLoops] Combine a VCMP and VPST into a VPT adds cb1ef0eaff8 Follow up rG635b87511ec3: forgot to add/commit the new test [...] adds 159abe09d25 [DebugInfo][flang] DISubrange support for fortran assumed s [...] adds ef4851742de [llvm-readobj][test] - Address a forgotten review comment f [...] adds 3a0a2a6347f [clangd] Implement hot index reloading for clangd-index-server adds 6040e2a6d97 [Support] Add GlobPattern::isTrivialMatchAll() adds 77152a6b7ac [LLD][ELF] Optimize linker script filename glob pattern mat [...] adds a8d02015fcb [llvm-readobj][test] - Improve section-symbols.test adds ac2717bfdd0 [ARM][LowOverheadLoops] Fix tests after ef0b9f3 adds a909a84ef2d [clang-tidy] Improve documentation on Clangd integration adds 3f682611ab2 [DAG] Remover getOperand() call. NFCI. adds 3e5a4ef51a1 Fix table formatting after D87686 adds 86172ce3781 [ARM] Add more validForTailPredication adds a63b2a4614b [ARM] Fix tail predication predicate tracking adds 7029e5d4ca2 [clangd] Actually parse Index section of the YAML file. adds 779a2a2edce [clang-tidy] Crash fix for bugprone-misplaced-pointer-arith [...] adds dbd45b2db8e [ASTMatchers] Fix `hasBody` for the descendants of `FunctionDecl` adds 4abb5cd8390 CGBlocks.cpp - assert non-null CGF pointer. NFCI. adds aa1e15dda9e TokenAnnotator.cpp - remove useless pointer null test. NFCI. adds 439f5749d97 [AST] ASTReader::ReadModuleMapFileBlock - assert non-null M [...] adds f5c7102dbc7 Update dead links to Itanium and ARM ABIs. NFC adds 0a0abc0ede0 [Sema] isOpenMPCapturedDecl - assert we locate CapturedRegi [...] adds 1c421046d74 [RDA] Fix getUniqueReachingDef for self loops adds 158989184e9 [SLP] change poorly named variable; NFC adds bbad998bab5 [SLP] move loop index variable declaration to its use; NFC adds 0cee1bf5d17 [SLP] remove redundant size check; NFC adds 6a23668e78b [SLP] remove uses of 'auto' that obscure functionality; NFC adds 3ce9ec0cfa9 [ARM] Reorder some logic adds 4dd9c709ef1 [clang-format] [NFC] Fix spelling mistake in the documentation adds 24238f09edb [SLP] fix formatting; NFC adds 82687cf47b2 Add section with details about DAGs. adds 4341c6618de [OPENMP]Do not allow threadprivates as base for array-like [...] adds cb9528a0420 [DSE] Add another test cases with loop carried dependence. adds 855ec517a30 [mlir] Model StringRef in C API adds 01e2b394ee1 [Partial Inliner] Compute intrinsic cost through TTI adds 8c0dc1e38b6 Enable inlining for Linalg dialect adds d9953d15549 [mlir][openacc] Add missing operands for acc.parallel operation adds aa4b0b755a0 [X86][SSE] Move VZEXT_MOVL(INSERT_SUBVECTOR(UNDEF,X,0)) han [...] adds 54bb9e86498 [AMDGPU] Add -show-mc-encoding to setreg tests adds 90777e2924e [AMDGPU] Enable scheduling around FP MODE-setting instructions adds cd461512023 [X86] Assert that we've found a terminator instruction. NFCI. adds 833b3b0d3a2 [AMDGPU] Add v3f16/v3i16 support to SDag adds 71131db6895 AMDGPU: Improve <2 x i24> arguments and return value handling adds 6e85c3d5c78 [NFC][Regalloc] accessors for 'reg' and 'weight' adds b2c931eff3c [X86] EmitInstrWithCustomInserter - remove redundant getDeb [...] adds f0546173fa4 [ASTMatchers] Add missing definition for decompositionDecl adds 06d058afecd [AMDGPU] Corrected directive to use for ELF weak refs adds 09c342493d8 [NPM] Translate alias analysis into require<> as well adds 15e9a6c2118 [llvm][CodeGen] Do not scalarize `llvm.masked.[gather|scatt [...] adds cb64455faa3 [AMDGPU] Remove obsolete comment adds b5c3efeb7bc [ARM][MVE] Tail-predication: predicate new elementcount che [...] adds c27b64bbe1b [Coro][NewPM] Handle llvm.coro.prepare.retcon in NPM coro-s [...] adds 66df98945e0 [libfuzzer] Reduce default verbosity when printing large mu [...] adds 4cff1b40dac Do not apply calling conventions to MSVC entry points adds 8d8a496356d LocalStackSlotAllocation: Swap order of check adds deae5e567d6 AMDGPU: Add baseline test for incorrect SP access adds 367248956e9 AMDGPU: Clear offset register when using local stack area adds e47d2927de7 Include (Type|Symbol)Record.h less adds 738c73a4548 RegAllocFast: Make self loop live-out heuristic more aggressive adds 39faf428164 [libc++] Ensure streams are initialized early adds f9e6d1edc0d Re-land: Add new hidden option -print-changed which only re [...] adds 50f4c7c785d [llvm-nm] Use aggregate initialization instead of memset zero adds b011611e373 [SLP] add tests for reduction ordering; NFC adds c6a82fdbf2e ValueEnumerator.cpp - remove duplicate includes. NFCI. adds 69682f993cc InterferenceCache.cpp - remove duplicate includes. NFCI. adds 73d02064d25 raw_ostream.cpp - remove duplicate includes. NFCI. adds 8f7d6b23756 DwarfUnit.h - remove unnecessary includes. NFCI. adds c4e589b7954 [GISel] Add new combines for unary FP instrs with constant operand adds ebf267b87d4 [Sema][MSVC] warn at dynamic_cast/typeid when /GR- is given adds f3c2e0bcee6 [libFuzzer] Enable entropic by default. adds 77a01d9498a Sema: add support for `__attribute__((__swift_bridge__))` adds 4d437348d24 fix test no-rtti.cpp adds 4d4f0922837 [clang][codegen] Skip adding default function attributes on [...] adds 6ad33d83603 [AArch64][GlobalISel] Make G_BUILD_VECTOR os <16 x s8> legal. adds b3d33f5e838 [gn build] make "all" target build adds 88bdcbbf1aa GlobalISel: Lift store value widening restriction adds 14e55f82980 [obj2yaml] - Match ".stack_size" with the original section [...] adds f723d193e2c Add '<' meta command to read in code from external file adds dbde3969ba8 [UpdateTestChecks][NFC] Fix spelling adds 6a02932beca [OpenMP][FIX] Do not crash trying to print a missing (deman [...] adds 05fd04eda4b [OpenMP][FIX] Do not drop a '$' while demangling declare va [...] adds 5c63ae156e9 [OpenMP] Support nested OpenMP context selectors (declare variant) adds c4b7a1da9d8 [OpenMP] Context selector extensions for return value overloading adds 97652202d1e [OpenMP] Overload `std::isnan` and friends multiple times f [...] adds 5c1084e8840 [OpenMP] Context selector extensions for template functions adds 56069b5c71c [OpenMP] Support `std::complex` math functions in target regions adds 91f503c3af1 [AMDGPU] gfx1030 RT support adds f80f2516a26 Revert "[obj2yaml] - Match ".stack_size" with the original [...] adds 2240ca0bd15 [SystemZ][z/OS] Set aligned allocation unavailable by defau [...] adds 15c378f6e64 [gn build] unconfuse sync script about "sources = []" in cl [...] adds 6859d95ea2d Fix build. adds 94d912021ff [InstCombine] Add test for infinite combine loop (NFC) adds 0bb06f297fe [InstSimplify] Clarify SimplifyWithOpReplaced() return value adds 222bf3ffbc8 Reapply [InstCombine] Simplify select operand based on equa [...] adds 2a078a977e9 [gn build] Port 56069b5c71c adds ce0eb81c727 [UpdateTestChecks] Allow $ in function names adds 7af4f44c3e3 [aarch64][tests] Add tests which show current lack of impli [...] adds dee46862278 [flang][msvc] Work around if constexpr (false) evaluation. NFC. adds 65ef2e50a29 [X86] Add test case for a masked load mask becoming all one [...] adds 89ee4c0314b [DAGCombiner] Teach visitMLOAD to replace an all ones mask [...] adds c57df3dc09e [lsan] Share platform allocator settings between ASan and LSan adds e3fe203ec7f Revert "[lsan] Share platform allocator settings between AS [...] adds 9a0d1b66730 [ORC] Add operations to create and lookup JITDylibs to OrcV [...] adds bebfc3b92d5 Revert "Do not apply calling conventions to MSVC entry points" adds a45cdb311f6 [AMDGPU] gfx1030 test update. NFC. adds cd13476ab57 [NFC][LSAN] Change SuspendedThreadsList interface adds 15f0ad2fa29 [ELF] Bump the limit of thunk creation passes from 10 to 15 adds aa2ba67a813 [NFC][regalloc] type LiveInterval::reg() as Register adds b1cb9d62712 [obj2yaml] - Match ".stack_size" with the original section [...] adds dd67581407c [lldb/test] Enable faulthandler in dotest adds ee5519d3235 [NFC] Refactor DiagnosticBuilder and PartialDiagnostic adds 23bef7ee992 [libunwind] Support for leaf function unwinding. adds dd3eb3f3323 [flang] Substrings with lower bound greater than upper bound adds 1321160a26e Disable a large test for EXPENSIVE_CHECKS and debug build adds 95e43f84b7b [AArch64] Add -mmark-bti-property flag. adds 0c6a56e41db [gn build] (manually) port 1321160a2 adds 4e4c89b22c3 [EarlyCSE] Simplify max/min pattern matching. NFC. adds d89c5ae8577 [Flang] Fixed installation permission of the "binary" flang adds 5b205ff4741 Commenting out atomics with padding to unbreak MSAN tests adds 60e244f82c1 Revert "[AArch64] Add -mmark-bti-property flag." adds f70baaf71f6 [AArch64] Add -mmark-bti-property flag. adds e30371d99d5 [DAGCombiner] Teach visitMSTORE to replace an all ones mask [...] adds 344a3d0bc0f [MemorySSA] Rename uses in blocks with Phis. adds 905b9ca26c9 Canonicalize declaration pointers when forming APValues. adds 7337f296194 PR47555: Inheriting constructors are implicitly definable. adds f4ea0f98142 [NewPM] Port -print-alias-sets to NPM adds b04c1a9d312 [IRSim] Adding IR Instruction Mapper adds b76f523be6e [mlir] expose affine map to C API adds 436a43afb2c [gn build] Port b04c1a9d312 adds fb1abe00635 [libunwind][DWARF] Fix end of .eh_frame calculation adds 5782ab0f52d [MachineSink] add one more mir case - nfc adds ebfbdebe967 [PowerPC] Fix store-fptoi combine of f128 on Power8 adds c1403228198 Use zu rather than llu format specifier for size_t (-Wforma [...] adds 6a07f1edf8e debug_rnglists/symbolizing: reduce memory usage by not cach [...] adds a895040eb02 Revert "[IRSim] Adding IR Instruction Mapper" adds 0dd4d70ec20 [gn build] Port a895040eb02 adds 11201315d58 Flush bitcode incrementally for LTO output adds 352a55ef06a Add the header of std::min adds aec80c5cfd1 Fix the arguments of std::min adds 57dd92746a5 [lldb] Return FileSP and StreamFileSP by value in IOHandler (NFC) adds c9af34027bc Add __divmodti4 to match libgcc.

No new revisions were added by this update.

Summary of changes: .../MisplacedPointerArithmeticInAllocCheck.cpp | 6 +- .../clang-tidy/modernize/UseEqualsDeleteCheck.cpp | 4 +- clang-tools-extra/clangd/ConfigYAML.cpp | 1 + clang-tools-extra/clangd/index/Serialization.cpp | 5 +- .../clangd/index/remote/server/Server.cpp | 96 +- .../clangd/unittests/ConfigYAMLTests.cpp | 17 +- clang-tools-extra/docs/clang-tidy/Integrations.rst | 15 +- ...prone-misplaced-pointer-arithmetic-in-alloc.cpp | 11 + clang/docs/ClangFormatStyleOptions.rst | 10 +- clang/include/clang/AST/APValue.h | 4 +- clang/include/clang/AST/ASTContext.h | 5 +- clang/include/clang/AST/Attr.h | 11 +- clang/include/clang/AST/CanonicalType.h | 4 +- clang/include/clang/AST/Decl.h | 10 +- clang/include/clang/AST/DeclCXX.h | 7 +- clang/include/clang/AST/DeclarationName.h | 13 +- clang/include/clang/AST/NestedNameSpecifier.h | 4 +- clang/include/clang/AST/OpenMPClause.h | 17 + clang/include/clang/AST/TemplateBase.h | 4 +- clang/include/clang/AST/TemplateName.h | 6 +- clang/include/clang/AST/Type.h | 39 +- clang/include/clang/ASTMatchers/ASTMatchers.h | 40 +- .../clang/ASTMatchers/ASTMatchersInternal.h | 14 +- clang/include/clang/Basic/AlignedAllocation.h | 2 + clang/include/clang/Basic/Attr.td | 9 + clang/include/clang/Basic/AttrDocs.td | 36 + clang/include/clang/Basic/Diagnostic.h | 143 ++- clang/include/clang/Basic/DiagnosticGroups.td | 2 + clang/include/clang/Basic/DiagnosticParseKinds.td | 5 + clang/include/clang/Basic/DiagnosticSemaKinds.td | 14 +- clang/include/clang/Basic/PartialDiagnostic.h | 98 +- clang/include/clang/Driver/Options.td | 3 + clang/include/clang/Format/Format.h | 2 +- clang/include/clang/Parse/Parser.h | 3 +- clang/include/clang/Sema/Ownership.h | 10 +- clang/include/clang/Sema/ParsedAttr.h | 22 +- clang/include/clang/Sema/Sema.h | 31 +- clang/lib/AST/APValue.cpp | 26 +- clang/lib/AST/ASTContext.cpp | 6 +- clang/lib/AST/Decl.cpp | 2 +- clang/lib/AST/DeclBase.cpp | 2 +- clang/lib/AST/DeclCXX.cpp | 9 +- clang/lib/AST/ExprConstant.cpp | 18 +- clang/lib/AST/OpenMPClause.cpp | 7 +- clang/lib/AST/TemplateBase.cpp | 9 +- clang/lib/AST/TemplateName.cpp | 18 +- clang/lib/ASTMatchers/ASTMatchersInternal.cpp | 1 + clang/lib/Basic/Diagnostic.cpp | 9 +- clang/lib/Basic/Targets/OSTargets.h | 2 + clang/lib/CodeGen/CGBlocks.cpp | 2 +- clang/lib/CodeGen/CodeGenAction.cpp | 7 +- clang/lib/CodeGen/ItaniumCXXABI.cpp | 6 +- clang/lib/Driver/ToolChains/Clang.cpp | 9 + clang/lib/Driver/ToolChains/ZOS.cpp | 10 + clang/lib/Driver/ToolChains/ZOS.h | 4 + clang/lib/Format/TokenAnnotator.cpp | 4 +- clang/lib/Headers/CMakeLists.txt | 1 + clang/lib/Headers/__clang_cuda_cmath.h | 41 +- clang/lib/Headers/openmp_wrappers/cmath | 5 +- clang/lib/Headers/openmp_wrappers/complex | 25 + clang/lib/Headers/openmp_wrappers/complex_cmath.h | 388 ++++++++ clang/lib/Parse/ParseOpenMP.cpp | 84 +- clang/lib/Sema/SemaCast.cpp | 12 + clang/lib/Sema/SemaDecl.cpp | 14 +- clang/lib/Sema/SemaDeclAttr.cpp | 19 + clang/lib/Sema/SemaExpr.cpp | 9 +- clang/lib/Sema/SemaExprCXX.cpp | 14 +- clang/lib/Sema/SemaOpenMP.cpp | 132 ++- clang/lib/Sema/SemaTemplateInstantiateDecl.cpp | 37 +- clang/lib/Serialization/ASTReader.cpp | 2 +- ...p-openmp-begin-declare-variant-varying-return.c | 401 ++++++++ .../AST/ast-dump-openmp-begin-declare-variant_13.c | 67 ++ .../ast-dump-openmp-begin-declare-variant_nested.c | 87 ++ ...ump-openmp-begin-declare-variant_template_2.cpp | 264 +++++ .../ast-dump-openmp-declare-variant-extensions.c | 12 +- clang/test/AST/attr-swift_bridge.m | 11 + .../test/CXX/dcl.dcl/dcl.spec/dcl.constexpr/p9.cpp | 3 +- clang/test/CodeGenCUDA/Inputs/device-lib-code.ll | 5 + .../CodeGenCUDA/dft-func-attr-skip-intrinsic.hip | 18 + clang/test/Driver/arm64-markbti.S | 26 + .../test/Driver/unavailable_aligned_allocation.cpp | 9 + clang/test/Headers/Inputs/include/cmath | 5 + clang/test/Headers/Inputs/include/complex | 111 +++ clang/test/Headers/Inputs/include/type_traits | 43 + clang/test/Headers/nvptx_device_math_complex.cpp | 39 + clang/test/Headers/openmp_device_math_isnan.cpp | 30 + clang/test/Lexer/aligned-allocation.cpp | 13 +- clang/test/OpenMP/declare_variant_messages.c | 14 + clang/test/OpenMP/ordered_messages.cpp | 5 +- clang/test/OpenMP/parallel_reduction_messages.cpp | 4 + clang/test/SemaCXX/cxx11-inheriting-ctors.cpp | 9 + clang/test/SemaCXX/ms-no-rtti-data.cpp | 32 + clang/test/SemaCXX/no-rtti-data.cpp | 32 + clang/test/SemaCXX/no-rtti.cpp | 2 +- .../SemaCXX/unavailable_aligned_allocation.cpp | 59 +- clang/test/SemaObjC/attr-swift_bridge.m | 33 + .../ASTMatchers/ASTMatchersTraversalTest.cpp | 43 +- compiler-rt/lib/asan/asan_allocator.cpp | 6 +- compiler-rt/lib/builtins/CMakeLists.txt | 1 + compiler-rt/lib/builtins/README.txt | 2 + compiler-rt/lib/builtins/divmodti4.c | 32 + compiler-rt/lib/fuzzer/FuzzerDriver.cpp | 10 +- compiler-rt/lib/fuzzer/FuzzerFlags.def | 5 +- compiler-rt/lib/fuzzer/FuzzerLoop.cpp | 2 +- compiler-rt/lib/fuzzer/FuzzerMutate.cpp | 17 +- compiler-rt/lib/fuzzer/FuzzerMutate.h | 5 +- compiler-rt/lib/fuzzer/FuzzerOptions.h | 2 +- compiler-rt/lib/lsan/lsan_common.cpp | 13 +- .../lib/sanitizer_common/sanitizer_stoptheworld.h | 6 +- .../sanitizer_stoptheworld_linux_libcdep.cpp | 12 +- .../sanitizer_stoptheworld_mac.cpp | 12 +- .../sanitizer_stoptheworld_netbsd_libcdep.cpp | 12 +- .../test/asan/TestCases/lsan_annotations.cpp | 7 +- compiler-rt/test/builtins/Unit/divmodti4_test.c | 91 ++ .../fuzzer/CustomMutatorWithLongSequencesTest.cpp | 40 + .../test/fuzzer/cross_over_uniform_dist.test | 4 +- compiler-rt/test/fuzzer/fuzzer-custommutator.test | 14 + compiler-rt/test/fuzzer/keep-seed.test | 4 +- flang/lib/Evaluate/variable.cpp | 6 +- flang/lib/Parser/basic-parsers.h | 19 +- flang/test/Semantics/resolve49.f90 | 2 + flang/tools/f18/CMakeLists.txt | 2 +- libcxx/src/iostream.cpp | 2 +- .../atomics.types.operations.req/atomic_helpers.h | 18 +- .../input.output/iostream.objects/init.pass.cpp | 88 ++ libunwind/src/AddressSpace.hpp | 13 +- libunwind/src/DwarfInstructions.hpp | 9 +- libunwind/src/DwarfParser.hpp | 15 +- libunwind/src/FrameHeaderCache.hpp | 2 +- libunwind/src/UnwindCursor.hpp | 6 +- libunwind/test/frameheadercache_test.pass.cpp | 6 +- libunwind/test/lit.site.cfg.in | 4 + libunwind/test/signal_unwind.pass.cpp | 44 + libunwind/test/unwind_leaffunction.pass.cpp | 50 + lld/ELF/AArch64ErrataFix.h | 2 +- lld/ELF/ARMErrataFix.h | 2 +- lld/ELF/InputFiles.cpp | 10 + lld/ELF/InputFiles.h | 6 + lld/ELF/LTO.cpp | 16 +- lld/ELF/LinkerScript.cpp | 37 +- lld/ELF/LinkerScript.h | 22 +- lld/ELF/Relocations.h | 2 +- lld/ELF/Writer.cpp | 4 +- lld/include/lld/Common/Strings.h | 7 +- lldb/include/lldb/Core/IOHandler.h | 6 +- lldb/packages/Python/lldbsuite/test/dotest.py | 15 + lldb/source/Core/IOHandler.cpp | 6 +- lldb/source/Expression/REPL.cpp | 44 +- llvm/docs/TableGen/ProgRef.rst | 51 +- llvm/include/llvm-c/Orc.h | 36 + llvm/include/llvm/Analysis/AliasSetTracker.h | 9 + llvm/include/llvm/Analysis/InstructionSimplify.h | 3 +- llvm/include/llvm/BinaryFormat/Dwarf.h | 67 +- llvm/include/llvm/Bitcode/BitcodeWriter.h | 2 +- llvm/include/llvm/Bitstream/BitstreamWriter.h | 101 +- .../llvm/CodeGen/GlobalISel/CombinerHelper.h | 7 + llvm/include/llvm/CodeGen/LiveInterval.h | 21 +- llvm/include/llvm/CodeGen/LiveRangeEdit.h | 2 +- llvm/include/llvm/CodeGen/LowLevelType.h | 4 + llvm/include/llvm/DebugInfo/CodeView/CVRecord.h | 17 +- .../llvm/DebugInfo/CodeView/CVSymbolVisitor.h | 3 - .../llvm/DebugInfo/CodeView/CodeViewRecordIO.h | 3 +- .../DebugInfo/CodeView/DebugSymbolsSubsection.h | 2 +- .../DebugInfo/CodeView/LazyRandomTypeCollection.h | 1 - llvm/include/llvm/DebugInfo/CodeView/RecordName.h | 1 - .../include/llvm/DebugInfo/CodeView/SymbolDumper.h | 2 +- .../include/llvm/DebugInfo/CodeView/SymbolRecord.h | 3 - .../llvm/DebugInfo/CodeView/SymbolRecordHelpers.h | 3 +- .../llvm/DebugInfo/CodeView/TypeCollection.h | 3 +- .../llvm/DebugInfo/CodeView/TypeIndexDiscovery.h | 4 +- llvm/include/llvm/DebugInfo/CodeView/TypeRecord.h | 6 - .../llvm/DebugInfo/CodeView/TypeRecordHelpers.h | 3 +- .../llvm/DebugInfo/CodeView/TypeStreamMerger.h | 2 +- llvm/include/llvm/DebugInfo/DWARF/DWARFListTable.h | 6 - llvm/include/llvm/DebugInfo/PDB/Native/TpiStream.h | 2 +- llvm/include/llvm/Frontend/OpenMP/OMPKinds.def | 2 + llvm/include/llvm/IR/IntrinsicsAMDGPU.td | 8 + .../include/llvm/Passes/StandardInstrumentations.h | 92 ++ llvm/include/llvm/Support/GlobPattern.h | 10 + llvm/include/llvm/Target/GlobalISel/Combine.td | 12 +- llvm/lib/Analysis/AliasSetTracker.cpp | 23 +- llvm/lib/Analysis/InstructionSimplify.cpp | 37 +- llvm/lib/Analysis/MemorySSAUpdater.cpp | 12 + llvm/lib/Bitcode/Writer/BitcodeWriter.cpp | 12 +- llvm/lib/Bitcode/Writer/ValueEnumerator.cpp | 6 - llvm/lib/CodeGen/AsmPrinter/DwarfUnit.cpp | 1 - llvm/lib/CodeGen/AsmPrinter/DwarfUnit.h | 13 +- llvm/lib/CodeGen/CalcSpillWeights.cpp | 18 +- llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp | 63 ++ llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp | 2 +- llvm/lib/CodeGen/InlineSpiller.cpp | 25 +- llvm/lib/CodeGen/InterferenceCache.cpp | 4 - llvm/lib/CodeGen/LiveDebugVariables.cpp | 6 +- llvm/lib/CodeGen/LiveInterval.cpp | 23 +- llvm/lib/CodeGen/LiveIntervalCalc.cpp | 4 +- llvm/lib/CodeGen/LiveIntervalUnion.cpp | 6 +- llvm/lib/CodeGen/LiveIntervals.cpp | 16 +- llvm/lib/CodeGen/LiveRangeEdit.cpp | 22 +- llvm/lib/CodeGen/LiveRegMatrix.cpp | 20 +- llvm/lib/CodeGen/LocalStackSlotAllocation.cpp | 2 +- llvm/lib/CodeGen/LowLevelType.cpp | 16 + llvm/lib/CodeGen/MachineVerifier.cpp | 8 +- llvm/lib/CodeGen/ReachingDefAnalysis.cpp | 16 +- llvm/lib/CodeGen/RegAllocBase.cpp | 28 +- llvm/lib/CodeGen/RegAllocBasic.cpp | 8 +- llvm/lib/CodeGen/RegAllocFast.cpp | 37 +- llvm/lib/CodeGen/RegAllocGreedy.cpp | 125 +-- llvm/lib/CodeGen/RegAllocPBQP.cpp | 20 +- llvm/lib/CodeGen/RegisterCoalescer.cpp | 47 +- llvm/lib/CodeGen/RenameIndependentSubregs.cpp | 10 +- llvm/lib/CodeGen/ScalarizeMaskedMemIntrin.cpp | 6 + llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 20 +- llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp | 9 +- llvm/lib/CodeGen/SplitKit.cpp | 14 +- llvm/lib/CodeGen/StackSlotColoring.cpp | 17 +- llvm/lib/CodeGen/TargetRegisterInfo.cpp | 2 +- llvm/lib/DebugInfo/CodeView/TypeIndexDiscovery.cpp | 3 +- llvm/lib/ExecutionEngine/Orc/OrcV2CBindings.cpp | 23 + llvm/lib/IR/Function.cpp | 3 +- llvm/lib/IR/LegacyPassManager.cpp | 4 +- llvm/lib/IR/Verifier.cpp | 9 +- llvm/lib/Passes/PassBuilder.cpp | 7 + llvm/lib/Passes/PassRegistry.def | 2 + llvm/lib/Passes/StandardInstrumentations.cpp | 228 ++++- llvm/lib/Support/raw_ostream.cpp | 2 - llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp | 23 +- .../Target/AArch64/GISel/AArch64LegalizerInfo.cpp | 3 +- .../AArch64/MCTargetDesc/AArch64TargetStreamer.cpp | 57 +- .../AArch64/MCTargetDesc/AArch64TargetStreamer.h | 3 + .../Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp | 5 - .../Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp | 22 +- llvm/lib/Target/AMDGPU/BUFInstructions.td | 102 +- .../AMDGPU/Disassembler/AMDGPUDisassembler.cpp | 14 +- llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp | 9 +- llvm/lib/Target/AMDGPU/GCNNSAReassign.cpp | 22 +- llvm/lib/Target/AMDGPU/GCNRegBankReassign.cpp | 2 +- .../Target/AMDGPU/MCTargetDesc/AMDGPUMCAsmInfo.cpp | 1 - llvm/lib/Target/AMDGPU/MIMGInstructions.td | 54 + llvm/lib/Target/AMDGPU/SIAddIMGInit.cpp | 5 +- llvm/lib/Target/AMDGPU/SIFoldOperands.cpp | 15 +- llvm/lib/Target/AMDGPU/SIISelLowering.cpp | 313 ++++-- llvm/lib/Target/AMDGPU/SIInstrInfo.cpp | 3 - llvm/lib/Target/AMDGPU/SIInstrInfo.td | 42 + llvm/lib/Target/AMDGPU/SIInstructions.td | 2 - llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp | 9 + llvm/lib/Target/AMDGPU/SIModeRegister.cpp | 9 +- llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp | 10 +- llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp | 4 +- llvm/lib/Target/AMDGPU/SOPInstructions.td | 39 +- llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp | 121 ++- llvm/lib/Target/ARM/ARMInstrMVE.td | 2 +- llvm/lib/Target/ARM/ARMInstrVFP.td | 20 +- llvm/lib/Target/ARM/ARMLowOverheadLoops.cpp | 88 +- llvm/lib/Target/ARM/MVETailPredication.cpp | 2 +- llvm/lib/Target/PowerPC/PPCISelLowering.cpp | 3 +- .../WebAssemblyOptimizeLiveIntervals.cpp | 2 +- .../Target/WebAssembly/WebAssemblyRegColoring.cpp | 22 +- llvm/lib/Target/X86/X86ISelLowering.cpp | 55 +- ...86SpeculativeExecutionSideEffectSuppression.cpp | 1 + llvm/lib/Transforms/Coroutines/CoroSplit.cpp | 57 +- llvm/lib/Transforms/IPO/PartialInlining.cpp | 64 +- .../Transforms/InstCombine/InstCombineSelect.cpp | 30 +- llvm/lib/Transforms/Scalar/EarlyCSE.cpp | 27 +- llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp | 67 +- llvm/test/Analysis/AliasSet/guards.ll | 1 + llvm/test/Analysis/GlobalsModRef/no-escape.ll | 3 +- llvm/test/Analysis/MemorySSA/pr45927.ll | 73 ++ llvm/test/CMakeLists.txt | 1 + .../CodeGen/AArch64/GlobalISel/combine-fabs.mir | 70 ++ .../CodeGen/AArch64/GlobalISel/combine-flog2.mir | 36 + .../CodeGen/AArch64/GlobalISel/combine-fneg.mir | 66 ++ .../CodeGen/AArch64/GlobalISel/combine-fptrunc.mir | 36 + .../CodeGen/AArch64/GlobalISel/combine-fsqrt.mir | 39 + .../AArch64/GlobalISel/legalize-build-vector.mir | 16 + llvm/test/CodeGen/AArch64/implicit-null-check.ll | 422 ++++++++ .../AArch64/llvm-masked-gather-legal-for-sve.ll | 63 ++ .../AArch64/llvm-masked-scatter-legal-for-sve.ll | 63 ++ .../CodeGen/AMDGPU/GlobalISel/function-returns.ll | 121 +++ .../GlobalISel/irtranslator-function-args.ll | 98 ++ .../AMDGPU/GlobalISel/legalize-store-global.mir | 288 ++++++ .../CodeGen/AMDGPU/GlobalISel/legalize-store.mir | 112 ++- .../AMDGPU/GlobalISel/llvm.amdgcn.s.setreg.ll | 1033 +++++++++++++------- llvm/test/CodeGen/AMDGPU/call-return-types.ll | 14 + .../AMDGPU/fastregalloc-self-loop-heuristic.mir | 185 ++++ llvm/test/CodeGen/AMDGPU/fdiv-nofpexcept.ll | 8 +- llvm/test/CodeGen/AMDGPU/frem.ll | 6 +- llvm/test/CodeGen/AMDGPU/fshr.ll | 142 +-- llvm/test/CodeGen/AMDGPU/function-args.ll | 10 + llvm/test/CodeGen/AMDGPU/hsa-globals.ll | 4 + llvm/test/CodeGen/AMDGPU/image-load-d16-tfe.ll | 79 +- .../AMDGPU/llvm.amdgcn.buffer.load.format.d16.ll | 16 +- .../AMDGPU/llvm.amdgcn.buffer.store.format.d16.ll | 7 + .../CodeGen/AMDGPU/llvm.amdgcn.image.d16.dim.ll | 32 + .../AMDGPU/llvm.amdgcn.image.sample.d16.dim.ll | 128 +++ .../CodeGen/AMDGPU/llvm.amdgcn.intersect_ray.ll | 162 +++ .../llvm.amdgcn.raw.buffer.load.format.d16.ll | 13 + .../llvm.amdgcn.raw.buffer.store.format.d16.ll | 26 + .../AMDGPU/llvm.amdgcn.raw.tbuffer.load.d16.ll | 17 +- .../AMDGPU/llvm.amdgcn.raw.tbuffer.store.d16.ll | 26 + llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.setreg.ll | 998 ++++++++++++------- .../llvm.amdgcn.struct.buffer.load.format.d16.ll | 14 + .../llvm.amdgcn.struct.buffer.store.format.d16.ll | 26 + .../AMDGPU/llvm.amdgcn.struct.tbuffer.load.d16.ll | 17 +- .../AMDGPU/llvm.amdgcn.struct.tbuffer.store.d16.ll | 25 + .../CodeGen/AMDGPU/llvm.amdgcn.tbuffer.load.d16.ll | 14 + .../AMDGPU/llvm.amdgcn.tbuffer.store.d16.ll | 23 + .../AMDGPU/local-stack-alloc-block-sp-reference.ll | 125 +++ .../stack-pointer-offset-relative-frameindex.ll | 5 +- llvm/test/CodeGen/ARM/machine-outliner-default.mir | 116 --- llvm/test/CodeGen/PowerPC/aix-overflow-toc.py | 2 +- .../PowerPC/sink-down-more-instructions-1.mir | 597 +++++++++++ llvm/test/CodeGen/PowerPC/store_fptoi.ll | 76 ++ .../cond-vector-reduce-mve-codegen.ll | 20 +- .../Thumb2/LowOverheadLoops/disjoint-vcmp.mir | 15 +- .../Thumb2/LowOverheadLoops/iv-two-vcmp.mir | 3 +- .../CodeGen/Thumb2/LowOverheadLoops/iv-vcmp.mir | 3 +- .../CodeGen/Thumb2/LowOverheadLoops/remat-vctp.ll | 18 +- .../Thumb2/LowOverheadLoops/tail-pred-forced.ll | 61 ++ .../LowOverheadLoops/vcmp-vpst-combination.ll | 49 + .../LowOverheadLoops/vctp-add-operand-liveout.mir | 20 +- .../Thumb2/LowOverheadLoops/vctp-in-vpt-2.mir | 18 +- .../CodeGen/Thumb2/LowOverheadLoops/vpt-blocks.mir | 57 +- .../test/CodeGen/Thumb2/LowOverheadLoops/wlstp.mir | 18 +- .../LowOverheadLoops/wrong-vctp-opcode-liveout.mir | 10 +- .../wrong-vctp-operand-liveout.mir | 20 +- llvm/test/CodeGen/Thumb2/mve-pred-vctpvpsel.ll | 3 +- llvm/test/CodeGen/X86/masked_load.ll | 95 +- llvm/test/CodeGen/X86/masked_store.ll | 344 ++++--- llvm/test/DebugInfo/X86/assumed_size_array.ll | 122 +++ llvm/test/MC/AMDGPU/gfx1011_err.s | 8 +- llvm/test/MC/AMDGPU/gfx1030_new.s | 24 + llvm/test/MC/AMDGPU/smem.s | 262 ++--- .../MC/Disassembler/AMDGPU/gfx1030_dasm_new.txt | 24 + llvm/test/Other/change-printer.ll | 109 +++ .../Transforms/Coroutines/coro-retcon-frame.ll | 1 + .../MSSA/multiblock-loop-carried-dependence.ll | 71 +- .../AMDGPU/amdgcn-demanded-vector-elts.ll | 10 +- llvm/test/Transforms/InstCombine/rem.ll | 3 +- .../Transforms/InstCombine/select-binop-cmp.ll | 15 +- llvm/test/Transforms/InstCombine/select.ll | 30 +- .../PartialInlining/intrinsic-call-cost.ll | 55 ++ .../Transforms/SLPVectorizer/X86/compare-reduce.ll | 147 +++ llvm/test/lit.cfg.py | 6 +- llvm/test/lit.site.cfg.py.in | 1 + .../Inputs/aarch64_function_name.ll | 9 + .../Inputs/aarch64_function_name.ll.expected | 19 + .../Inputs/amdgpu_function_name.ll | 8 + .../Inputs/amdgpu_function_name.ll.expected | 14 + .../Inputs/arm_function_name.ll | 10 + .../Inputs/arm_function_name.ll.expected | 15 + .../Inputs/hexagon_function_name.ll | 8 + .../Inputs/hexagon_function_name.ll.expected | 16 + .../Inputs/lanai_function_name.ll | 8 + .../Inputs/lanai_function_name.ll.expected | 18 + .../Inputs/mips_function_name.ll | 8 + .../Inputs/mips_function_name.ll.expected | 13 + .../Inputs/msp430_function_name.ll | 8 + .../Inputs/msp430_function_name.ll.expected | 14 + .../Inputs/ppc_function_name.ll | 8 + .../Inputs/ppc_function_name.ll.expected | 13 + .../Inputs/riscv_function_name.ll | 8 + .../Inputs/riscv_function_name.ll.expected | 13 + .../Inputs/sparc_function_name.ll | 8 + .../Inputs/sparc_function_name.ll.expected | 14 + .../Inputs/systemz_function_name.ll | 8 + .../Inputs/systemz_function_name.ll.expected | 13 + .../Inputs/wasm_function_name.ll | 8 + .../Inputs/wasm_function_name.ll.expected | 14 + .../Inputs/x86_function_name.ll | 8 + .../Inputs/x86_function_name.ll.expected | 13 + .../aarch64-function-name.test | 5 + .../amdgpu-function-name.test | 5 + .../update_llc_test_checks/arm-function-name.test | 5 + .../hexagon-function-name.test | 5 + .../lanai-function-name.test | 5 + .../update_llc_test_checks/mips-function-name.test | 5 + .../msp430-function-name.test | 5 + .../update_llc_test_checks/ppc-function-name.test | 5 + .../riscv-function-name.test | 5 + .../sparc-function-name.test | 5 + .../systemz-function-name.test | 5 + .../update_llc_test_checks/wasm-function-name.test | 5 + .../update_llc_test_checks/x86-function-name.test | 5 + .../update_test_checks/Inputs/function_name.ll | 8 + .../Inputs/function_name.ll.expected | 9 + .../update_test_checks/function-name.test | 7 + .../ELF/dyn-symbols-size-from-hash-table.test | 2 +- .../tools/llvm-readobj/ELF/section-symbols.test | 125 ++- llvm/test/tools/obj2yaml/ELF/stack-sizes.yaml | 48 + llvm/tools/llvm-nm/llvm-nm.cpp | 3 +- llvm/tools/obj2yaml/elf2yaml.cpp | 2 +- llvm/tools/opt/NewPMDriver.cpp | 5 +- .../DebugInfo/CodeView/TypeHashingTest.cpp | 1 + llvm/unittests/Support/GlobPatternTest.cpp | 13 + llvm/unittests/Target/ARM/MachineInstrTest.cpp | 49 +- llvm/utils/UpdateTestChecks/asm.py | 28 +- llvm/utils/UpdateTestChecks/common.py | 12 +- .../utils/gn/build/sync_source_lists_from_cmake.py | 3 + llvm/utils/gn/secondary/clang/lib/Headers/BUILD.gn | 1 + .../gn/secondary/compiler-rt/lib/scudo/BUILD.gn | 2 + llvm/utils/gn/secondary/llvm/test/BUILD.gn | 6 + mlir/docs/CAPI.md | 51 +- mlir/include/mlir-c/AffineMap.h | 110 +++ mlir/include/mlir-c/StandardAttributes.h | 67 +- mlir/include/mlir-c/Support.h | 57 ++ mlir/include/mlir/CAPI/Support.h | 31 + mlir/include/mlir/CAPI/Utils.h | 48 + mlir/include/mlir/Dialect/OpenACC/OpenACCOps.td | 18 +- mlir/lib/Bindings/Python/IRModules.cpp | 6 +- mlir/lib/CAPI/IR/AffineMap.cpp | 116 ++- mlir/lib/CAPI/IR/CMakeLists.txt | 1 + mlir/lib/CAPI/IR/IR.cpp | 41 +- mlir/lib/CAPI/IR/StandardAttributes.cpp | 53 +- mlir/lib/CAPI/IR/Support.cpp | 15 + mlir/lib/Dialect/Linalg/IR/LinalgTypes.cpp | 35 + mlir/lib/Dialect/OpenACC/IR/OpenACC.cpp | 77 +- mlir/test/CAPI/ir.c | 166 +++- mlir/test/Dialect/Linalg/inlining.mlir | 31 + mlir/test/Dialect/OpenACC/ops.mlir | 50 +- 419 files changed, 12429 insertions(+), 2917 deletions(-) create mode 100644 clang/lib/Headers/openmp_wrappers/complex_cmath.h create mode 100644 clang/test/AST/ast-dump-openmp-begin-declare-variant-varying-return.c create mode 100644 clang/test/AST/ast-dump-openmp-begin-declare-variant_13.c create mode 100644 clang/test/AST/ast-dump-openmp-begin-declare-variant_nested.c create mode 100644 clang/test/AST/ast-dump-openmp-begin-declare-variant_template_2.cpp create mode 100644 clang/test/AST/attr-swift_bridge.m create mode 100644 clang/test/CodeGenCUDA/Inputs/device-lib-code.ll create mode 100644 clang/test/CodeGenCUDA/dft-func-attr-skip-intrinsic.hip create mode 100644 clang/test/Driver/arm64-markbti.S create mode 100644 clang/test/Headers/Inputs/include/type_traits create mode 100644 clang/test/Headers/openmp_device_math_isnan.cpp create mode 100644 clang/test/SemaCXX/ms-no-rtti-data.cpp create mode 100644 clang/test/SemaCXX/no-rtti-data.cpp create mode 100644 clang/test/SemaObjC/attr-swift_bridge.m create mode 100644 compiler-rt/lib/builtins/divmodti4.c create mode 100644 compiler-rt/test/builtins/Unit/divmodti4_test.c create mode 100644 compiler-rt/test/fuzzer/CustomMutatorWithLongSequencesTest.cpp create mode 100644 libcxx/test/std/input.output/iostream.objects/init.pass.cpp create mode 100644 libunwind/test/signal_unwind.pass.cpp create mode 100644 libunwind/test/unwind_leaffunction.pass.cpp create mode 100644 llvm/test/Analysis/MemorySSA/pr45927.ll create mode 100644 llvm/test/CodeGen/AArch64/GlobalISel/combine-flog2.mir create mode 100644 llvm/test/CodeGen/AArch64/GlobalISel/combine-fptrunc.mir create mode 100644 llvm/test/CodeGen/AArch64/GlobalISel/combine-fsqrt.mir create mode 100644 llvm/test/CodeGen/AArch64/implicit-null-check.ll create mode 100644 llvm/test/CodeGen/AArch64/llvm-masked-gather-legal-for-sve.ll create mode 100644 llvm/test/CodeGen/AArch64/llvm-masked-scatter-legal-for-sve.ll create mode 100644 llvm/test/CodeGen/AMDGPU/fastregalloc-self-loop-heuristic.mir create mode 100644 llvm/test/CodeGen/AMDGPU/llvm.amdgcn.intersect_ray.ll create mode 100644 llvm/test/CodeGen/AMDGPU/local-stack-alloc-block-sp-reference.ll create mode 100644 llvm/test/CodeGen/PowerPC/sink-down-more-instructions-1.mir create mode 100644 llvm/test/CodeGen/Thumb2/LowOverheadLoops/tail-pred-forced.ll create mode 100644 llvm/test/CodeGen/Thumb2/LowOverheadLoops/vcmp-vpst-combination.ll create mode 100644 llvm/test/DebugInfo/X86/assumed_size_array.ll create mode 100644 llvm/test/Other/change-printer.ll create mode 100644 llvm/test/Transforms/PartialInlining/intrinsic-call-cost.ll create mode 100644 llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/ [...] create mode 100644 llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/ [...] create mode 100644 llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/ [...] create mode 100644 llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/ [...] create mode 100644 llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/ [...] create mode 100644 llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/ [...] create mode 100644 llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/ [...] create mode 100644 llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/ [...] create mode 100644 llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/ [...] create mode 100644 llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/ [...] create mode 100644 llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/ [...] create mode 100644 llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/ [...] create mode 100644 llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/ [...] create mode 100644 llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/ [...] create mode 100644 llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/ [...] create mode 100644 llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/ [...] create mode 100644 llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/ [...] create mode 100644 llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/ [...] create mode 100644 llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/ [...] create mode 100644 llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/ [...] create mode 100644 llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/ [...] create mode 100644 llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/ [...] create mode 100644 llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/ [...] create mode 100644 llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/ [...] create mode 100644 llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/ [...] create mode 100644 llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/ [...] create mode 100644 llvm/test/tools/UpdateTestChecks/update_llc_test_checks/aarch64 [...] create mode 100644 llvm/test/tools/UpdateTestChecks/update_llc_test_checks/amdgpu- [...] create mode 100644 llvm/test/tools/UpdateTestChecks/update_llc_test_checks/arm-fun [...] create mode 100644 llvm/test/tools/UpdateTestChecks/update_llc_test_checks/hexagon [...] create mode 100644 llvm/test/tools/UpdateTestChecks/update_llc_test_checks/lanai-f [...] create mode 100644 llvm/test/tools/UpdateTestChecks/update_llc_test_checks/mips-fu [...] create mode 100644 llvm/test/tools/UpdateTestChecks/update_llc_test_checks/msp430- [...] create mode 100644 llvm/test/tools/UpdateTestChecks/update_llc_test_checks/ppc-fun [...] create mode 100644 llvm/test/tools/UpdateTestChecks/update_llc_test_checks/riscv-f [...] create mode 100644 llvm/test/tools/UpdateTestChecks/update_llc_test_checks/sparc-f [...] create mode 100644 llvm/test/tools/UpdateTestChecks/update_llc_test_checks/systemz [...] create mode 100644 llvm/test/tools/UpdateTestChecks/update_llc_test_checks/wasm-fu [...] create mode 100644 llvm/test/tools/UpdateTestChecks/update_llc_test_checks/x86-fun [...] create mode 100644 llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/func [...] create mode 100644 llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/func [...] create mode 100644 llvm/test/tools/UpdateTestChecks/update_test_checks/function-name.test create mode 100644 mlir/include/mlir-c/Support.h create mode 100644 mlir/include/mlir/CAPI/Support.h create mode 100644 mlir/include/mlir/CAPI/Utils.h create mode 100644 mlir/lib/CAPI/IR/Support.cpp create mode 100644 mlir/test/Dialect/Linalg/inlining.mlir