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unknown user pushed a change to branch master in repository gcc.

from 2c5499b57cf libgo: add 32-bit RISC-V (RV32) support new 324bec558e9 PR target/97250: i386: Add support for x86-64-v2, x86-64-v3 [...] new 36e691d3a62 tree-optimization/97255 - missing vector bool pattern of SR [...] new 85516b71730 s390: Fix up s390_atomic_assign_expand_fenv

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Summary of changes: gcc/common/config/i386/i386-common.c | 10 +- gcc/config/i386/i386-options.c | 29 +++++- gcc/config/i386/i386.h | 11 +- gcc/config/s390/s390.c | 17 ++-- gcc/doc/invoke.texi | 15 ++- gcc/testsuite/g++.dg/vect/pr97255.cc | 44 ++++++++ gcc/testsuite/gcc.target/i386/x86-64-v2.c | 116 ++++++++++++++++++++++ gcc/testsuite/gcc.target/i386/x86-64-v3-haswell.c | 18 ++++ gcc/testsuite/gcc.target/i386/x86-64-v3-skylake.c | 21 ++++ gcc/testsuite/gcc.target/i386/x86-64-v3.c | 116 ++++++++++++++++++++++ gcc/testsuite/gcc.target/i386/x86-64-v4.c | 116 ++++++++++++++++++++++ gcc/tree-vect-patterns.c | 8 +- 12 files changed, 501 insertions(+), 20 deletions(-) create mode 100644 gcc/testsuite/g++.dg/vect/pr97255.cc create mode 100644 gcc/testsuite/gcc.target/i386/x86-64-v2.c create mode 100644 gcc/testsuite/gcc.target/i386/x86-64-v3-haswell.c create mode 100644 gcc/testsuite/gcc.target/i386/x86-64-v3-skylake.c create mode 100644 gcc/testsuite/gcc.target/i386/x86-64-v3.c create mode 100644 gcc/testsuite/gcc.target/i386/x86-64-v4.c