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from 42ae64d736f PR tree-optimization/83781 - Bootstrap failed on x86 with - [...] new 24f7a05b1cf 2018-01-10 Michael Collison michael.collison@arm.com

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Summary of changes: gcc/ChangeLog | 234 +++++++ gcc/config/aarch64/aarch64-arches.def | 1 + gcc/config/aarch64/aarch64-builtins.c | 12 + gcc/config/aarch64/aarch64-c.c | 8 + gcc/config/aarch64/aarch64-modes.def | 1 + gcc/config/aarch64/aarch64-option-extensions.def | 44 +- gcc/config/aarch64/aarch64-simd-builtins.def | 66 ++ gcc/config/aarch64/aarch64-simd.md | 761 ++++++++++++++++++++- gcc/config/aarch64/aarch64.h | 31 + gcc/config/aarch64/arm_neon.h | 316 +++++++++ gcc/config/aarch64/constraints.md | 12 + gcc/config/aarch64/iterators.md | 49 ++ gcc/config/aarch64/predicates.md | 12 + gcc/config/arm/types.md | 4 + gcc/doc/invoke.texi | 26 +- gcc/testsuite/ChangeLog | 34 + gcc/testsuite/gcc.target/aarch64/fp16_fmul_high.h | 25 + .../gcc.target/aarch64/fp16_fmul_high_1.c | 9 + .../gcc.target/aarch64/fp16_fmul_high_2.c | 9 + .../gcc.target/aarch64/fp16_fmul_high_3.c | 9 + .../gcc.target/aarch64/fp16_fmul_lane_high.h | 49 ++ .../gcc.target/aarch64/fp16_fmul_lane_high_1.c | 14 + .../gcc.target/aarch64/fp16_fmul_lane_high_2.c | 13 + .../gcc.target/aarch64/fp16_fmul_lane_high_3.c | 13 + .../gcc.target/aarch64/fp16_fmul_lane_low.h | 49 ++ .../gcc.target/aarch64/fp16_fmul_lane_low_1.c | 13 + .../gcc.target/aarch64/fp16_fmul_lane_low_2.c | 13 + .../gcc.target/aarch64/fp16_fmul_lane_low_3.c | 13 + gcc/testsuite/gcc.target/aarch64/fp16_fmul_low.h | 25 + gcc/testsuite/gcc.target/aarch64/fp16_fmul_low_1.c | 9 + gcc/testsuite/gcc.target/aarch64/fp16_fmul_low_2.c | 9 + gcc/testsuite/gcc.target/aarch64/fp16_fmul_low_3.c | 9 + gcc/testsuite/gcc.target/aarch64/sha2.h | 25 + gcc/testsuite/gcc.target/aarch64/sha2_1.c | 9 + gcc/testsuite/gcc.target/aarch64/sha2_2.c | 9 + gcc/testsuite/gcc.target/aarch64/sha2_3.c | 9 + gcc/testsuite/gcc.target/aarch64/sha3.h | 25 + gcc/testsuite/gcc.target/aarch64/sha3_1.c | 10 + gcc/testsuite/gcc.target/aarch64/sha3_2.c | 9 + gcc/testsuite/gcc.target/aarch64/sha3_3.c | 9 + gcc/testsuite/gcc.target/aarch64/sm3_sm4.c | 78 +++ 41 files changed, 2050 insertions(+), 25 deletions(-) create mode 100644 gcc/testsuite/gcc.target/aarch64/fp16_fmul_high.h create mode 100644 gcc/testsuite/gcc.target/aarch64/fp16_fmul_high_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/fp16_fmul_high_2.c create mode 100644 gcc/testsuite/gcc.target/aarch64/fp16_fmul_high_3.c create mode 100644 gcc/testsuite/gcc.target/aarch64/fp16_fmul_lane_high.h create mode 100644 gcc/testsuite/gcc.target/aarch64/fp16_fmul_lane_high_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/fp16_fmul_lane_high_2.c create mode 100644 gcc/testsuite/gcc.target/aarch64/fp16_fmul_lane_high_3.c create mode 100644 gcc/testsuite/gcc.target/aarch64/fp16_fmul_lane_low.h create mode 100644 gcc/testsuite/gcc.target/aarch64/fp16_fmul_lane_low_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/fp16_fmul_lane_low_2.c create mode 100644 gcc/testsuite/gcc.target/aarch64/fp16_fmul_lane_low_3.c create mode 100644 gcc/testsuite/gcc.target/aarch64/fp16_fmul_low.h create mode 100644 gcc/testsuite/gcc.target/aarch64/fp16_fmul_low_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/fp16_fmul_low_2.c create mode 100644 gcc/testsuite/gcc.target/aarch64/fp16_fmul_low_3.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sha2.h create mode 100644 gcc/testsuite/gcc.target/aarch64/sha2_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sha2_2.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sha2_3.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sha3.h create mode 100644 gcc/testsuite/gcc.target/aarch64/sha3_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sha3_2.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sha3_3.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sm3_sm4.c