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from ce64e4118fc GlobalISel: Define GINodeEquiv for G_UMULH/G_SMULH new 829da800080 AMDGPU/GlobalISel: Select mul new 5955c031665 AMDGPU/GlobalISel: Try generated matcher with intrinsics

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Summary of changes: lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp | 15 ++--- lib/Target/AMDGPU/VOP3Instructions.td | 2 +- .../GlobalISel/inst-select-amdgcn.mbcnt.lo.mir | 74 ++++++++++++++++++++++ .../GlobalISel/inst-select-amdgcn.s.barrier.mir | 19 ++++++ .../{inst-select-smulh.mir => inst-select-mul.mir} | 51 +++++++-------- 5 files changed, 123 insertions(+), 38 deletions(-) create mode 100644 test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.mbcnt.lo.mir create mode 100644 test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.s.barrier.mir copy test/CodeGen/AMDGPU/GlobalISel/{inst-select-smulh.mir => inst-select-mul.mir} (50%)