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from 3f085e45755 Handle const_int in expand_single_bit_test new 631e86b7adb RISC-V: Support RVV VLA SLP auto-vectorization
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Summary of changes: gcc/config/riscv/riscv-protos.h | 2 + gcc/config/riscv/riscv-v.cc | 399 +++++++++++++++++++-- gcc/config/riscv/riscv.cc | 16 + .../gcc.target/riscv/rvv/autovec/partial/slp-1.c | 22 ++ .../gcc.target/riscv/rvv/autovec/partial/slp-2.c | 22 ++ .../rvv/autovec/partial/slp-3.c} | 12 +- .../gcc.target/riscv/rvv/autovec/partial/slp-4.c | 22 ++ .../gcc.target/riscv/rvv/autovec/partial/slp-5.c | 22 ++ .../gcc.target/riscv/rvv/autovec/partial/slp-6.c | 23 ++ .../gcc.target/riscv/rvv/autovec/partial/slp-7.c | 15 + .../riscv/rvv/autovec/partial/slp_run-1.c | 66 ++++ .../riscv/rvv/autovec/partial/slp_run-2.c | 67 ++++ .../riscv/rvv/autovec/partial/slp_run-3.c | 67 ++++ .../riscv/rvv/autovec/partial/slp_run-4.c | 67 ++++ .../riscv/rvv/autovec/partial/slp_run-5.c | 67 ++++ .../riscv/rvv/autovec/partial/slp_run-6.c | 67 ++++ .../riscv/rvv/autovec/partial/slp_run-7.c | 58 +++ .../gcc.target/riscv/rvv/autovec/scalable-1.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/autovec/v-1.c | 7 +- .../riscv/rvv/autovec/zve32f_zvl128b-1.c | 2 +- .../riscv/rvv/autovec/zve32x_zvl128b-1.c | 2 +- .../gcc.target/riscv/rvv/autovec/zve64d-1.c | 2 +- .../riscv/rvv/autovec/zve64d_zvl128b-1.c | 2 +- .../gcc.target/riscv/rvv/autovec/zve64f-1.c | 2 +- .../riscv/rvv/autovec/zve64f_zvl128b-1.c | 2 +- .../riscv/rvv/autovec/zve64x_zvl128b-1.c | 2 +- 26 files changed, 994 insertions(+), 43 deletions(-) create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/partial/slp-1.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/partial/slp-2.c copy gcc/testsuite/gcc.target/{aarch64/sve/slp_perm_7.c => riscv/rvv/autovec/parti [...] create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/partial/slp-4.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/partial/slp-5.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/partial/slp-6.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/partial/slp-7.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/partial/slp_run-1.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/partial/slp_run-2.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/partial/slp_run-3.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/partial/slp_run-4.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/partial/slp_run-5.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/partial/slp_run-6.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/partial/slp_run-7.c