This is an automated email from the git hooks/post-receive script.
tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-lts-allnoconfig in repository toolchain/ci/llvm-project.
from ec17c4f0755 [CSKY 3/n] Add bare-bones C-SKY MCTargetDesc adds e8ade4569b7 [LegalizeType] When LegalizeType procedure widens a masked_ [...] adds 7a2c8be641d [RISCV] Define vleff intrinsics. adds 9a8ef927df3 [RISCV] Define vector compare intrinsics. adds 442aac5da68 [Flang][openmp][1/5] Make Allocate clause part of OmpClause adds f72c384b5ba [Flang][openmp][2/5] Make Default clause part of OmpClause adds b8c37153d53 [clangd] Trim memory periodically when using glibc malloc adds 34958d11c34 [Flang][openmp][3/5] Make ProcBind clause part of OmpClause adds a56280094e0 [LV] Avoid needless fold tail adds e282ae57da2 [Flang][openmp][4/5] Make nowait clause part of OmpClause adds 2f5569f6f67 [mlir] remove deprecated string-based OpBuilder from ODS adds 1a6f43991ff [Flang][openmp][5/5] Make dist_schedule clause part of OmpClause adds a6783cd7b65 [llvm][ARM/AArch64] Convert Target Parser CPU tests to fixtures adds 0a8a2453fb8 [lldb/test] Add GdbRemoteTestCaseFactory to avoid duplicati [...] adds 8d75d902a95 [DebugInfo] Don't use DW_OP_implicit_value for fragments adds 9a6de74d5a9 [MachineLICM] Add llvm debug messages to SinkIntoLoop. NFC. adds c0c0ae16c33 [VPlan] Make VPInstruction a VPDef adds 6fcb0399564 Fold comparison of __builtin_object_size expression with -1 [...] adds 4d59c8fdb95 -fstack-clash-protection: Return an actual error when used [...] adds 781a816d4ca [llvm][Arm/AArch64] Format extension flags in CPU test failures adds 4b3633cf2cb [clangd] Reuse buffer for JSONTransport::sendMessage adds 853770f2413 [gn build] (manually) port b8c37153d5393 adds ba1202a1e4f [PowerPC] Restore stack ptr from base ptr when available adds 00065d5cbd0 Revert "-fstack-clash-protection: Return an actual error wh [...] adds 0f81598cc1f [libc++] Add a 'is-lockfree-runtime-function' lit feature adds 6277bd75dc7 [compiler-rt] Fix atomic_test.c on macOS adds 3b879fc9730 [ASTMatchers] Traverse-ignore range-for implementation details adds b9b62c28677 [AArch64] Add a test for MachineLICM SinkIntoLoop. NFC. adds c4fc8a21d1d [clang-format] NFC keep the code clang-formatted adds 44e74c75e61 [flang][driver] Refactor unit tests for frontend actions (nfc) adds 63a24816f56 [clang][cli] Implement `getAllArgValues` marshalling adds 31b67d2debd [flang][driver] Fix formatting in a test (nfc) adds bef9eb84b2f [clang] NFC: Refactor custom class into a lambda in Compile [...] adds 5b37f0d9708 [MCInstrDesc] [TableGen] Reduce size of MCOperandInfo instances. adds ef4dbb2b7a8 [LV] Use ScalarEvolution::getURemExpr to reduce duplication. adds 28b00ba7311 [openacc][openmp][NFC] Fix typo in comments adds 0586f048d79 [RISCV] Basic jump table lowering adds 3e07b0b9d33 [MLIR] Fix lowering of affine operations with return values adds 0955d8df063 [mlir] Add gpu.memcpy op. adds 8eec7294fea [SVE] Lower vector BITREVERSE and BSWAP operations. adds 9a7895dc208 [Flang][openmp][5.0] Add task_reduction clause. adds 8a58f21f5b6 [PowerPC][Power10] Exploit store rightmost vector element i [...] adds 5c1c8443eb7 [lldb] Abstract scoped timer logic behind LLDB_SCOPED_TIMER (NFC) adds be85b3e4324 Fix some misnamed variables in sve-fixed-length-int-minmax.ll. adds 5d10b8ad595 [ADT] Add resize_for_overwrite method to SmallVector. adds f106b281be2 [tests] precommit a test mentioned in review for D93317 adds ac90bbc9cb8 [LoopDeletion] Add test case where outer loop needs to be deleted. adds f5071489ea8 [ADT] Fix some tests after 5d10b8ad adds e17a00fc87b [lldb] Add SBType::IsScopedEnumerationType method adds 1432ae57bf6 [lldb] Add SBType::GetEnumerationIntegerType method adds 612ddc3117c [OpenMP][Docs] Updated the faq about building an OpenMP off [...] adds 85d4a4bcc71 Revert "Fix memory leak complicated non-type template arguments." adds ab7a60eb410 Revert "Fix MSVC "not all control paths return a value" war [...] adds 20802323339 Revert "[c++20] P1907R1: Support for generalized non-type t [...] adds af0dbaaa38f Revert "Following up on PR48517, fix handling of template a [...] adds 34e72a14611 Revert "DR2064: decltype(E) is only a dependent type if E i [...] adds 1aa10ab2e1d Revert "[Flang][openmp][5.0] Add task_reduction clause." adds b2e734d5f46 Revert "[clangd] zap a few warnings" adds 6283d2aa519 Revert "[LLDB] Unbreak the build after recent clang changes" adds a5311d731e1 [clang-tidy] Handle template instantiations in container si [...] adds ae8f4b2178c [AMDGPU] Folding of FI operand with flat scratch adds 333108e8bef Add a llvm.coro.end.async intrinsic adds 9cb748724ef [OpenMP][Docs] Add FAQ entry about math and complex on GPUs adds 1eb082c2ea4 [OpenMP][Docs] Fixed a typo in the doc that can mislead use [...] adds 7b0f9dd79a3 [OpenMP][Docs] Fix Typo adds 53deef9e0b8 [RISCV] Remove unneeded !eq comparing a single bit value to [...] adds 7ec7788ac17 Try to fix build on Windows adds 57ffbe020af glld/mac] Don't add names of unreferenced symbols to string table adds 0d15d4b6f43 [SLP] use operand index abstraction for number of operands adds f6929c01952 [SLP] add reduction tests for maxnum/minnum intrinsics; NFC adds 3dbe471a260 [clangd] Use atomics instead of locks to track periodic mem [...] adds df6cbd37f57 [mlir] Lower gpu.memcpy to GPU runtime calls. adds f7a26127f21 [clangd] Release notes for b8c37153d5393aad96 adds a781a706b96 [WebAssembly][SIMD] Rename shuffle, swizzle, and load_splats adds 8de43b926f0 [mlir] Remove instance methods from LLVMType adds 1c19804ebf4 [OpenMP] Add OpenMP Documentation for Libomptarget environm [...] adds 75a3f326c3d [IR] Add an ImplicitLocOpBuilder helper class for building [...] adds 6dfe5801e01 scudo: Move the configuration for the primary allocator to [...] adds ca4bf58e4ee [AMDGPU] Support unaligned flat scratch in TLI adds d15119a02d9 [AMDGPU][GlobalISel] GlobalISel for flat scratch adds e6b3db6309f scudo: Replace the Cache argument on MapAllocator with a Co [...] adds faac1c02c80 scudo: Move the management of the UseMemoryTagging bit out [...] adds 22cf54a7fba Replace `T(x)` with `reinterpret_cast<T>(x)` everywhere it [...] adds 5bec0828347 VirtRegMap: Use Register adds 29ed846d671 AMDGPU: Fix assert when checking for implicit operand legality adds c8874464b5f [RISCV] Add intrinsics for vslide1up/down, vfslide1up/down [...] adds 42687839980 [RISCV] Add intrinsics for vwmacc[u|su|us] instructions adds ad0a7ad950f [RISCV] Add intrinsics for vf[n]macc/vf[n]msac/vf[n]madd/vf [...] adds bac54639c7b AMDGPU: Add spilled CSR SGPRs to entry block live ins adds 8bf9cdeaee4 AMDGPU: Use Register adds 77fb45e59e4 [lld/mac] Add --version flag adds 581d13f8aeb GlobalISel: Return APInt from getConstantVRegVal adds e6fde1ae7df [MemorySSA] Use is_contained (NFC) adds efe7f5ede0b [WebAssembly][NFC] Refactor SIMD load/store tablegen defs adds 3c707d73f26 [NewGVN] Remove for_each_found (NFC)
No new revisions were added by this update.
Summary of changes: .../readability/ContainerSizeEmptyCheck.cpp | 183 +- clang-tools-extra/clangd/CMakeLists.txt | 3 + clang-tools-extra/clangd/ClangdLSPServer.cpp | 31 +- clang-tools-extra/clangd/ClangdLSPServer.h | 12 +- clang-tools-extra/clangd/DumpAST.cpp | 1 - clang-tools-extra/clangd/Features.inc.in | 1 + clang-tools-extra/clangd/FindTarget.cpp | 1 - clang-tools-extra/clangd/JSONTransport.cpp | 11 +- clang-tools-extra/clangd/index/remote/Client.cpp | 3 +- clang-tools-extra/clangd/support/Threading.cpp | 12 + clang-tools-extra/clangd/support/Threading.h | 29 + clang-tools-extra/clangd/tool/ClangdMain.cpp | 28 + .../clangd/unittests/support/ThreadingTests.cpp | 21 + clang-tools-extra/docs/ReleaseNotes.rst | 12 +- .../checkers/readability-container-size-empty.cpp | 218 ++- clang/include/clang/AST/ASTContext.h | 4 +- clang/include/clang/AST/DependenceFlags.h | 6 - clang/include/clang/AST/Expr.h | 14 +- clang/include/clang/AST/PropertiesBase.td | 12 - clang/include/clang/AST/RecursiveASTVisitor.h | 5 +- clang/include/clang/AST/TemplateArgumentVisitor.h | 2 - clang/include/clang/AST/TemplateBase.h | 53 +- clang/include/clang/Basic/DiagnosticSemaKinds.td | 5 + clang/include/clang/Driver/Options.td | 3 +- clang/include/clang/Sema/Sema.h | 7 +- .../include/clang/Serialization/ASTRecordWriter.h | 1 - clang/lib/AST/ASTContext.cpp | 13 +- clang/lib/AST/ASTImporter.cpp | 11 - clang/lib/AST/ASTStructuralEquivalence.cpp | 4 - clang/lib/AST/ComputeDependence.cpp | 13 +- clang/lib/AST/Decl.cpp | 4 - clang/lib/AST/Expr.cpp | 35 +- clang/lib/AST/ExprCXX.cpp | 11 +- clang/lib/AST/ExprConstant.cpp | 101 +- clang/lib/AST/ItaniumMangle.cpp | 48 +- clang/lib/AST/MicrosoftMangle.cpp | 11 - clang/lib/AST/ODRHash.cpp | 2 - clang/lib/AST/StmtProfile.cpp | 6 - clang/lib/AST/TemplateBase.cpp | 127 +- clang/lib/AST/Type.cpp | 20 +- clang/lib/AST/TypeLoc.cpp | 1 - clang/lib/ASTMatchers/ASTMatchFinder.cpp | 16 + clang/lib/CodeGen/CGCall.h | 6 +- clang/lib/CodeGen/CGDebugInfo.cpp | 8 - clang/lib/CodeGen/CGExprConstant.cpp | 10 +- clang/lib/Format/TokenAnnotator.cpp | 6 +- clang/lib/Frontend/CompilerInvocation.cpp | 53 +- clang/lib/Index/USRGeneration.cpp | 4 - clang/lib/Sema/SemaLookup.cpp | 1 - clang/lib/Sema/SemaOverload.cpp | 19 +- clang/lib/Sema/SemaTemplate.cpp | 232 +-- clang/lib/Sema/SemaTemplateDeduction.cpp | 94 +- clang/lib/Sema/SemaTemplateInstantiate.cpp | 16 +- clang/lib/Sema/SemaTemplateVariadic.cpp | 2 - clang/lib/Sema/TreeTransform.h | 12 +- clang/lib/Serialization/ASTReader.cpp | 1 - clang/lib/Serialization/ASTWriter.cpp | 1 - clang/test/CXX/drs/dr20xx.cpp | 12 - clang/test/CodeGenCXX/mangle-ms-templates.cpp | 10 - clang/test/CodeGenCXX/mangle-template.cpp | 40 +- clang/test/CodeGenCXX/template-arguments.cpp | 81 - .../OpenMP/distribute_dist_schedule_messages.cpp | 2 +- ...tribute_parallel_for_dist_schedule_messages.cpp | 2 +- ...te_parallel_for_simd_dist_schedule_messages.cpp | 2 +- .../distribute_simd_dist_schedule_messages.cpp | 2 +- .../target_parallel_for_simd_collapse_messages.cpp | 2 +- .../target_parallel_for_simd_ordered_messages.cpp | 2 +- .../test/OpenMP/target_simd_collapse_messages.cpp | 2 +- ...get_teams_distribute_dist_schedule_messages.cpp | 2 +- ...tribute_parallel_for_dist_schedule_messages.cpp | 2 +- ...te_parallel_for_simd_dist_schedule_messages.cpp | 2 +- ...eams_distribute_simd_dist_schedule_messages.cpp | 2 +- clang/test/OpenMP/target_update_from_messages.cpp | 2 +- clang/test/OpenMP/target_update_to_messages.cpp | 2 +- clang/test/OpenMP/task_messages.cpp | 4 +- .../teams_distribute_dist_schedule_messages.cpp | 2 +- ...tribute_parallel_for_dist_schedule_messages.cpp | 2 +- ...te_parallel_for_simd_dist_schedule_messages.cpp | 2 +- ...eams_distribute_simd_dist_schedule_messages.cpp | 2 +- clang/test/Sema/invalid-bitwidth-expr.mm | 1 - .../SemaCXX/invalid-template-base-specifier.cpp | 4 +- clang/test/SemaCXX/warn-unused-lambda-capture.cpp | 2 +- clang/test/SemaTemplate/dependent-expr.cpp | 7 +- ...ontype_cxx17.cpp => temp_arg_nontype_cxx1z.cpp} | 50 +- clang/test/SemaTemplate/temp_arg_nontype_cxx20.cpp | 80 +- .../test/SemaTemplate/temp_arg_template_cxx1z.cpp | 8 +- clang/tools/libclang/CIndex.cpp | 5 - clang/tools/libclang/CXCursor.cpp | 3 - .../ASTMatchers/ASTMatchersTraversalTest.cpp | 25 + .../unittests/Frontend/CompilerInvocationTest.cpp | 40 + clang/www/cxx_dr_status.html | 2 +- .../lib/scudo/standalone/allocator_config.h | 51 +- compiler-rt/lib/scudo/standalone/combined.h | 32 +- compiler-rt/lib/scudo/standalone/memtag.h | 5 + compiler-rt/lib/scudo/standalone/options.h | 6 + compiler-rt/lib/scudo/standalone/primary32.h | 32 +- compiler-rt/lib/scudo/standalone/primary64.h | 35 +- compiler-rt/lib/scudo/standalone/secondary.h | 14 +- .../lib/scudo/standalone/tests/combined_test.cpp | 25 +- .../lib/scudo/standalone/tests/primary_test.cpp | 62 +- .../lib/scudo/standalone/tests/secondary_test.cpp | 20 +- .../TestCases/Posix/unpoison-alternate-stack.cpp | 1 - compiler-rt/test/asan/TestCases/longjmp.cpp | 1 - compiler-rt/test/builtins/Unit/atomic_test.c | 14 +- flang/include/flang/Parser/dump-parse-tree.h | 2 - flang/include/flang/Parser/parse-tree.h | 7 - flang/lib/Lower/OpenMP.cpp | 10 +- flang/lib/Parser/openmp-parsers.cpp | 16 +- flang/lib/Parser/unparse.cpp | 21 +- flang/lib/Semantics/check-omp-structure.cpp | 10 +- flang/lib/Semantics/check-omp-structure.h | 10 +- flang/test/Frontend/print-preprocessed-file.f90 | 4 +- flang/unittests/Frontend/FrontendActionTest.cpp | 178 +- .../atomics/atomics.align/align.pass.pass.cpp | 2 +- libcxx/utils/libcxx/test/features.py | 11 +- lld/COFF/Options.td | 2 +- lld/MachO/Driver.cpp | 7 +- lld/MachO/Options.td | 4 +- lld/MachO/SyntheticSections.cpp | 22 +- lld/test/MachO/driver.test | 4 +- lld/test/MachO/symtab.s | 6 +- lldb/bindings/interface/SBType.i | 6 + lldb/include/lldb/API/SBType.h | 5 + lldb/include/lldb/Symbol/CompilerType.h | 4 + lldb/include/lldb/Symbol/TypeSystem.h | 5 + lldb/include/lldb/Utility/Timer.h | 7 + lldb/include/lldb/lldb-enumerations.h | 1 - lldb/packages/Python/lldbsuite/test/decorators.py | 2 - .../test/tools/lldb-server/gdbremote_testcase.py | 33 + lldb/source/API/SBType.cpp | 20 + lldb/source/API/SystemInitializerFull.cpp | 3 - lldb/source/Commands/CommandObjectTarget.cpp | 3 +- lldb/source/Core/Disassembler.cpp | 4 +- lldb/source/Core/Mangled.cpp | 7 +- lldb/source/Core/Module.cpp | 43 +- .../Initialization/SystemInitializerCommon.cpp | 6 +- lldb/source/Interpreter/CommandInterpreter.cpp | 10 +- .../CPlusPlus/CPPLanguageRuntime.cpp | 4 +- .../ObjC/AppleObjCRuntime/AppleObjCRuntimeV2.cpp | 5 +- .../BSD-Archive/ObjectContainerBSDArchive.cpp | 4 +- .../Plugins/ObjectFile/ELF/ObjectFileELF.cpp | 4 +- .../Plugins/ObjectFile/Mach-O/ObjectFileMachO.cpp | 3 +- .../ScriptInterpreter/Lua/ScriptInterpreterLua.cpp | 3 +- .../Python/ScriptInterpreterPython.cpp | 9 +- .../Plugins/SymbolFile/DWARF/DWARFDebugAranges.cpp | 3 +- lldb/source/Plugins/SymbolFile/DWARF/DWARFUnit.cpp | 8 +- .../Plugins/SymbolFile/DWARF/ManualDWARFIndex.cpp | 3 +- .../Plugins/SymbolFile/DWARF/SymbolFileDWARF.cpp | 19 +- .../SymbolFile/DWARF/SymbolFileDWARFDebugMap.cpp | 12 +- .../Plugins/SymbolVendor/ELF/SymbolVendorELF.cpp | 3 +- .../Plugins/SymbolVendor/wasm/SymbolVendorWasm.cpp | 3 +- .../Plugins/TypeSystem/Clang/TypeSystemClang.cpp | 24 +- .../Plugins/TypeSystem/Clang/TypeSystemClang.h | 5 + lldb/source/Symbol/CompileUnit.cpp | 3 +- lldb/source/Symbol/CompilerType.cpp | 12 + lldb/source/Symbol/DWARFCallFrameInfo.cpp | 3 +- lldb/source/Symbol/LocateSymbolFile.cpp | 9 +- lldb/source/Symbol/ObjectFile.cpp | 8 +- lldb/source/Symbol/Symtab.cpp | 26 +- lldb/source/Target/Target.cpp | 4 +- lldb/source/Target/TargetList.cpp | 7 +- lldb/test/API/python_api/type/TestTypeList.py | 23 + lldb/test/API/python_api/type/main.cpp | 7 + .../API/tools/lldb-server/TestGdbRemoteExitCode.py | 39 +- .../API/tools/lldb-server/TestGdbRemoteKill.py | 18 +- .../tools/lldb-server/TestGdbRemoteModuleInfo.py | 11 +- .../tools/lldb-server/TestGdbRemoteProcessInfo.py | 80 +- .../lldb-server/TestGdbRemoteRegisterState.py | 23 +- .../tools/lldb-server/TestGdbRemoteSingleStep.py | 14 +- .../lldb-server/TestGdbRemoteThreadsInStopReply.py | 100 +- lldb/tools/lldb-test/SystemInitializerTest.cpp | 3 - llvm/docs/Coroutines.rst | 42 + llvm/include/llvm/ADT/SmallVector.h | 14 +- .../llvm/CodeGen/GlobalISel/MIPatternMatch.h | 2 +- llvm/include/llvm/CodeGen/GlobalISel/Utils.h | 11 +- llvm/include/llvm/CodeGen/MachineInstrBuilder.h | 3 + llvm/include/llvm/CodeGen/VirtRegMap.h | 8 +- llvm/include/llvm/Frontend/OpenMP/OMP.td | 8 +- llvm/include/llvm/IR/Intrinsics.td | 2 + llvm/include/llvm/IR/IntrinsicsRISCV.td | 84 + llvm/include/llvm/IR/SymbolTableListTraits.h | 8 +- llvm/include/llvm/MC/MCInstrDesc.h | 31 +- llvm/include/llvm/Object/Binary.h | 4 +- llvm/include/llvm/Option/OptParser.td | 6 + llvm/lib/Analysis/MemoryBuiltins.cpp | 12 +- llvm/lib/Analysis/MemorySSA.cpp | 3 +- llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp | 10 +- llvm/lib/CodeGen/AsmPrinter/OcamlGCPrinter.cpp | 7 +- llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp | 28 +- .../lib/CodeGen/GlobalISel/InstructionSelector.cpp | 2 +- llvm/lib/CodeGen/GlobalISel/Utils.cpp | 30 +- llvm/lib/CodeGen/LiveRangeEdit.cpp | 2 +- llvm/lib/CodeGen/MachineLICM.cpp | 55 +- .../CodeGen/SelectionDAG/LegalizeVectorTypes.cpp | 19 +- llvm/lib/Object/COFFObjectFile.cpp | 24 +- llvm/lib/Object/ELFObjectFile.cpp | 3 +- llvm/lib/Object/XCOFFObjectFile.cpp | 4 +- llvm/lib/Target/AArch64/AArch64ISelLowering.cpp | 23 +- llvm/lib/Target/AArch64/AArch64ISelLowering.h | 2 + llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td | 6 +- .../AArch64/GISel/AArch64InstructionSelector.cpp | 47 +- .../Target/AArch64/GISel/AArch64LegalizerInfo.cpp | 2 +- .../AArch64/GISel/AArch64PostLegalizerCombiner.cpp | 2 +- .../AArch64/GISel/AArch64PostLegalizerLowering.cpp | 2 +- llvm/lib/Target/AArch64/SVEInstrFormats.td | 22 +- llvm/lib/Target/AMDGPU/AMDGPUGISel.td | 8 + .../Target/AMDGPU/AMDGPUInstructionSelector.cpp | 81 +- llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h | 3 + llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp | 26 +- llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp | 2 +- llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp | 8 +- llvm/lib/Target/AMDGPU/SIFoldOperands.cpp | 57 +- llvm/lib/Target/AMDGPU/SIISelLowering.cpp | 15 +- llvm/lib/Target/AMDGPU/SIInstrInfo.h | 3 + llvm/lib/Target/AMDGPU/SIInstrInfo.td | 7 + llvm/lib/Target/AMDGPU/SILowerSGPRSpills.cpp | 19 +- llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp | 4 + llvm/lib/Target/Hexagon/HexagonCommonGEP.cpp | 9 +- llvm/lib/Target/PowerPC/PPCFrameLowering.cpp | 9 +- llvm/lib/Target/PowerPC/PPCInstrPrefix.td | 25 +- llvm/lib/Target/RISCV/RISCVISelLowering.cpp | 18 +- llvm/lib/Target/RISCV/RISCVISelLowering.h | 1 + llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td | 304 ++- llvm/lib/Target/RISCV/RISCVMCInstLower.cpp | 3 + .../MCTargetDesc/WebAssemblyMCTargetDesc.h | 40 +- .../lib/Target/WebAssembly/WebAssemblyInstrSIMD.td | 322 ++-- llvm/lib/Target/X86/X86InstructionSelector.cpp | 2 +- llvm/lib/Transforms/Coroutines/CoroEarly.cpp | 7 +- llvm/lib/Transforms/Coroutines/CoroFrame.cpp | 19 +- llvm/lib/Transforms/Coroutines/CoroInstr.h | 40 +- llvm/lib/Transforms/Coroutines/CoroInternal.h | 4 +- llvm/lib/Transforms/Coroutines/CoroSplit.cpp | 100 +- llvm/lib/Transforms/Coroutines/Coroutines.cpp | 25 +- llvm/lib/Transforms/Scalar/NewGVN.cpp | 12 - llvm/lib/Transforms/Vectorize/LoopVectorize.cpp | 26 +- llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp | 3 +- llvm/lib/Transforms/Vectorize/VPlan.cpp | 22 +- llvm/lib/Transforms/Vectorize/VPlan.h | 23 +- llvm/lib/Transforms/Vectorize/VPlanValue.h | 8 +- .../CodeGen/AArch64/machine-licm-sink-instr.ll | 176 ++ .../CodeGen/AArch64/sve-fixed-length-int-minmax.ll | 48 +- llvm/test/CodeGen/AArch64/sve-fixed-length-rev.ll | 643 +++++++ .../CodeGen/AArch64/sve-intrinsics-reversal.ll | 35 - llvm/test/CodeGen/AArch64/sve-rev.ll | 97 + .../test/CodeGen/AMDGPU/GlobalISel/flat-scratch.ll | 759 ++++++++ llvm/test/CodeGen/AMDGPU/chain-hi-to-lo.ll | 11 +- .../CodeGen/AMDGPU/csr-sgpr-spill-live-ins.mir | 35 + llvm/test/CodeGen/AMDGPU/flat-scratch-fold-fi.mir | 88 + .../test/CodeGen/AMDGPU/frame-index-elimination.ll | 2 +- llvm/test/CodeGen/AMDGPU/si-fix-sgpr-copies.mir | 16 + llvm/test/CodeGen/AMDGPU/unaligned-load-store.ll | 69 +- llvm/test/CodeGen/PowerPC/aix-base-pointer.ll | 4 +- llvm/test/CodeGen/PowerPC/builtins-ppc-p10vsx.ll | 261 +-- llvm/test/CodeGen/PowerPC/pr46759.ll | 2 +- llvm/test/CodeGen/PowerPC/stack-clash-prologue.ll | 16 +- llvm/test/CodeGen/PowerPC/stack-realign.ll | 4 +- .../CodeGen/PowerPC/store-rightmost-vector-elt.ll | 109 ++ llvm/test/CodeGen/RISCV/jumptable.ll | 349 +++- llvm/test/CodeGen/RISCV/rvv/vfmacc-rv32.ll | 856 +++++++++ llvm/test/CodeGen/RISCV/rvv/vfmacc-rv64.ll | 1142 +++++++++++ llvm/test/CodeGen/RISCV/rvv/vfmadd-rv32.ll | 856 +++++++++ llvm/test/CodeGen/RISCV/rvv/vfmadd-rv64.ll | 1142 +++++++++++ llvm/test/CodeGen/RISCV/rvv/vfmsac-rv32.ll | 856 +++++++++ llvm/test/CodeGen/RISCV/rvv/vfmsac-rv64.ll | 1142 +++++++++++ llvm/test/CodeGen/RISCV/rvv/vfmsub-rv32.ll | 856 +++++++++ llvm/test/CodeGen/RISCV/rvv/vfmsub-rv64.ll | 1142 +++++++++++ llvm/test/CodeGen/RISCV/rvv/vfnmacc-rv32.ll | 856 +++++++++ llvm/test/CodeGen/RISCV/rvv/vfnmacc-rv64.ll | 1142 +++++++++++ llvm/test/CodeGen/RISCV/rvv/vfnmadd-rv32.ll | 856 +++++++++ llvm/test/CodeGen/RISCV/rvv/vfnmadd-rv64.ll | 1142 +++++++++++ llvm/test/CodeGen/RISCV/rvv/vfnmsac-rv32.ll | 856 +++++++++ llvm/test/CodeGen/RISCV/rvv/vfnmsac-rv64.ll | 1142 +++++++++++ llvm/test/CodeGen/RISCV/rvv/vfnmsub-rv32.ll | 856 +++++++++ llvm/test/CodeGen/RISCV/rvv/vfnmsub-rv64.ll | 1142 +++++++++++ llvm/test/CodeGen/RISCV/rvv/vfslide1down-rv32.ll | 512 +++++ llvm/test/CodeGen/RISCV/rvv/vfslide1down-rv64.ll | 698 +++++++ llvm/test/CodeGen/RISCV/rvv/vfslide1up-rv32.ll | 523 +++++ llvm/test/CodeGen/RISCV/rvv/vfslide1up-rv64.ll | 713 +++++++ llvm/test/CodeGen/RISCV/rvv/vleff-rv32.ll | 1045 ++++++++++ llvm/test/CodeGen/RISCV/rvv/vleff-rv64.ll | 1333 +++++++++++++ llvm/test/CodeGen/RISCV/rvv/vmfeq-rv32.ll | 757 ++++++++ llvm/test/CodeGen/RISCV/rvv/vmfeq-rv64.ll | 1009 ++++++++++ llvm/test/CodeGen/RISCV/rvv/vmfge-rv32.ll | 361 ++++ llvm/test/CodeGen/RISCV/rvv/vmfge-rv64.ll | 481 +++++ llvm/test/CodeGen/RISCV/rvv/vmfgt-rv32.ll | 361 ++++ llvm/test/CodeGen/RISCV/rvv/vmfgt-rv64.ll | 481 +++++ llvm/test/CodeGen/RISCV/rvv/vmfle-rv32.ll | 757 ++++++++ llvm/test/CodeGen/RISCV/rvv/vmfle-rv64.ll | 1009 ++++++++++ llvm/test/CodeGen/RISCV/rvv/vmflt-rv32.ll | 757 ++++++++ llvm/test/CodeGen/RISCV/rvv/vmflt-rv64.ll | 1009 ++++++++++ llvm/test/CodeGen/RISCV/rvv/vmfne-rv32.ll | 757 ++++++++ llvm/test/CodeGen/RISCV/rvv/vmfne-rv64.ll | 1009 ++++++++++ llvm/test/CodeGen/RISCV/rvv/vmseq-rv32.ll | 1681 ++++++++++++++++ llvm/test/CodeGen/RISCV/rvv/vmseq-rv64.ll | 2017 ++++++++++++++++++++ llvm/test/CodeGen/RISCV/rvv/vmsgt-rv32.ll | 1021 ++++++++++ llvm/test/CodeGen/RISCV/rvv/vmsgt-rv64.ll | 1225 ++++++++++++ llvm/test/CodeGen/RISCV/rvv/vmsgtu-rv32.ll | 1021 ++++++++++ llvm/test/CodeGen/RISCV/rvv/vmsgtu-rv64.ll | 1225 ++++++++++++ llvm/test/CodeGen/RISCV/rvv/vmsle-rv32.ll | 1681 ++++++++++++++++ llvm/test/CodeGen/RISCV/rvv/vmsle-rv64.ll | 2017 ++++++++++++++++++++ llvm/test/CodeGen/RISCV/rvv/vmsleu-rv32.ll | 1681 ++++++++++++++++ llvm/test/CodeGen/RISCV/rvv/vmsleu-rv64.ll | 2017 ++++++++++++++++++++ llvm/test/CodeGen/RISCV/rvv/vmslt-rv32.ll | 1261 ++++++++++++ llvm/test/CodeGen/RISCV/rvv/vmslt-rv64.ll | 1513 +++++++++++++++ llvm/test/CodeGen/RISCV/rvv/vmsltu-rv32.ll | 1261 ++++++++++++ llvm/test/CodeGen/RISCV/rvv/vmsltu-rv64.ll | 1513 +++++++++++++++ llvm/test/CodeGen/RISCV/rvv/vmsne-rv32.ll | 1681 ++++++++++++++++ llvm/test/CodeGen/RISCV/rvv/vmsne-rv64.ll | 2017 ++++++++++++++++++++ llvm/test/CodeGen/RISCV/rvv/vslide1down-rv32.ll | 800 ++++++++ llvm/test/CodeGen/RISCV/rvv/vslide1down-rv64.ll | 978 ++++++++++ llvm/test/CodeGen/RISCV/rvv/vslide1up-rv32.ll | 24 + llvm/test/CodeGen/RISCV/rvv/vslide1up-rv64.ll | 1000 ++++++++++ llvm/test/CodeGen/RISCV/rvv/vwmacc-rv32.ll | 1034 ++++++++++ llvm/test/CodeGen/RISCV/rvv/vwmacc-rv64.ll | 1412 ++++++++++++++ llvm/test/CodeGen/RISCV/rvv/vwmaccsu-rv32.ll | 1034 ++++++++++ llvm/test/CodeGen/RISCV/rvv/vwmaccsu-rv64.ll | 1412 ++++++++++++++ llvm/test/CodeGen/RISCV/rvv/vwmaccu-rv32.ll | 1034 ++++++++++ llvm/test/CodeGen/RISCV/rvv/vwmaccu-rv64.ll | 1412 ++++++++++++++ llvm/test/CodeGen/RISCV/rvv/vwmaccus-rv32.ll | 516 +++++ llvm/test/CodeGen/RISCV/rvv/vwmaccus-rv64.ll | 704 +++++++ llvm/test/CodeGen/WebAssembly/simd-build-vector.ll | 6 +- llvm/test/CodeGen/WebAssembly/simd-intrinsics.ll | 10 +- llvm/test/CodeGen/WebAssembly/simd-load-splat.ll | 2 +- .../WebAssembly/simd-load-store-alignment.ll | 36 +- .../CodeGen/WebAssembly/simd-nested-shuffles.ll | 2 +- llvm/test/CodeGen/WebAssembly/simd-offset.ll | 96 +- .../WebAssembly/simd-shift-complex-splats.ll | 2 +- .../CodeGen/WebAssembly/simd-shuffle-bitcast.ll | 2 +- llvm/test/CodeGen/WebAssembly/simd.ll | 48 +- .../CodeGen/X86/masked_gather_scatter_widen.ll | 297 +++ llvm/test/DebugInfo/X86/implicit_value-double.ll | 24 +- llvm/test/MC/Disassembler/WebAssembly/wasm.txt | 2 +- llvm/test/MC/WebAssembly/simd-encodings.s | 24 +- llvm/test/Transforms/Coroutines/coro-async.ll | 67 +- .../InstCombine/builtin-dynamic-object-size.ll | 57 +- .../Transforms/InstCombine/limit-max-iterations.ll | 39 - .../AMDGPU/adjust-alloca-alignment.ll | 35 +- .../LoopDeletion/noop-loops-with-subloops.ll | 172 ++ .../LoopVectorize/dont-fold-tail-for-const-TC.ll | 69 + .../dont-fold-tail-for-divisible-TC.ll | 62 + llvm/test/Transforms/LoopVectorize/loop-form.ll | 88 + llvm/test/Transforms/SLPVectorizer/X86/fmaxnum.ll | 147 ++ llvm/test/Transforms/SLPVectorizer/X86/fminnum.ll | 147 ++ llvm/tools/llvm-readobj/ELFDumper.cpp | 12 +- llvm/unittests/ADT/SmallVectorTest.cpp | 25 + llvm/unittests/Support/TargetParserTest.cpp | 1112 ++++++----- llvm/utils/TableGen/DirectiveEmitter.cpp | 6 +- llvm/utils/TableGen/InstrInfoEmitter.cpp | 5 +- .../gn/secondary/clang-tools-extra/clangd/BUILD.gn | 6 +- .../StandardToLLVM/ConvertStandardToLLVM.h | 3 +- mlir/include/mlir/Dialect/GPU/GPUOps.td | 35 + mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td | 28 +- mlir/include/mlir/Dialect/LLVMIR/LLVMTypes.h | 75 +- mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td | 9 +- mlir/include/mlir/IR/ImplicitLocOpBuilder.h | 123 ++ mlir/include/mlir/IR/OpBase.td | 19 +- .../AffineToStandard/AffineToStandard.cpp | 125 +- mlir/lib/Conversion/AsyncToLLVM/AsyncToLLVM.cpp | 102 +- .../GPUCommon/ConvertLaunchFuncToRuntimeCalls.cpp | 80 +- mlir/lib/Conversion/GPUCommon/GPUOpsLowering.h | 18 +- .../Conversion/GPUCommon/OpToFuncCallLowering.h | 9 +- .../GPUToVulkan/ConvertLaunchFuncToVulkanCalls.cpp | 45 +- .../Conversion/SPIRVToLLVM/ConvertSPIRVToLLVM.cpp | 8 +- .../Conversion/StandardToLLVM/StandardToLLVM.cpp | 159 +- .../VectorToLLVM/ConvertVectorToLLVM.cpp | 22 +- .../lib/Conversion/VectorToROCDL/VectorToROCDL.cpp | 6 +- mlir/lib/Dialect/GPU/IR/GPUDialect.cpp | 18 + mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp | 211 +- mlir/lib/Dialect/LLVMIR/IR/LLVMTypes.cpp | 170 +- mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp | 5 +- mlir/lib/ExecutionEngine/JitRunner.cpp | 19 +- mlir/lib/Target/LLVMIR/ConvertFromLLVMIR.cpp | 45 +- mlir/lib/Target/LLVMIR/ModuleTranslation.cpp | 4 +- .../Conversion/AffineToStandard/lower-affine.mlir | 125 ++ .../lower-memcpy-to-gpu-runtime-calls.mlir | 19 + mlir/test/Dialect/GPU/invalid.mlir | 14 + mlir/test/Dialect/GPU/ops.mlir | 11 + mlir/test/Dialect/LLVMIR/invalid.mlir | 8 +- mlir/test/mlir-tblgen/op-decl.td | 4 +- .../mlir-cuda-runner/cuda-runtime-wrappers.cpp | 7 + .../mlir-rocm-runner/rocm-runtime-wrappers.cpp | 5 + mlir/tools/mlir-tblgen/OpDefinitionsGen.cpp | 44 +- openmp/docs/SupportAndFAQ.rst | 50 +- openmp/docs/design/Runtimes.rst | 82 + 384 files changed, 74101 insertions(+), 3710 deletions(-) mode change 100644 => 100755 clang/lib/Format/TokenAnnotator.cpp delete mode 100644 clang/test/CodeGenCXX/template-arguments.cpp rename clang/test/SemaTemplate/{temp_arg_nontype_cxx17.cpp => temp_arg_nontype_cxx [...] create mode 100644 llvm/test/CodeGen/AArch64/machine-licm-sink-instr.ll create mode 100644 llvm/test/CodeGen/AArch64/sve-fixed-length-rev.ll create mode 100644 llvm/test/CodeGen/AArch64/sve-rev.ll create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/flat-scratch.ll create mode 100644 llvm/test/CodeGen/AMDGPU/csr-sgpr-spill-live-ins.mir create mode 100644 llvm/test/CodeGen/AMDGPU/flat-scratch-fold-fi.mir create mode 100644 llvm/test/CodeGen/PowerPC/store-rightmost-vector-elt.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfmacc-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfmacc-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfmadd-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfmadd-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfmsac-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfmsac-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfmsub-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfmsub-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfnmacc-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfnmacc-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfnmadd-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfnmadd-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfnmsac-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfnmsac-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfnmsub-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfnmsub-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfslide1down-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfslide1down-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfslide1up-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfslide1up-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vleff-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vleff-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vmfeq-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vmfeq-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vmfge-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vmfge-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vmfgt-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vmfgt-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vmfle-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vmfle-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vmflt-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vmflt-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vmfne-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vmfne-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vmseq-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vmseq-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vmsgt-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vmsgt-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vmsgtu-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vmsgtu-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vmsle-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vmsle-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vmsleu-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vmsleu-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vmslt-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vmslt-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vmsltu-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vmsltu-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vmsne-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vmsne-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vslide1down-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vslide1down-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vslide1up-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vslide1up-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vwmacc-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vwmacc-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vwmaccsu-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vwmaccsu-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vwmaccu-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vwmaccu-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vwmaccus-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vwmaccus-rv64.ll delete mode 100644 llvm/test/Transforms/InstCombine/limit-max-iterations.ll create mode 100644 llvm/test/Transforms/LoopDeletion/noop-loops-with-subloops.ll create mode 100644 llvm/test/Transforms/LoopVectorize/dont-fold-tail-for-const-TC.ll create mode 100644 llvm/test/Transforms/LoopVectorize/dont-fold-tail-for-divisible-TC.ll create mode 100644 mlir/include/mlir/IR/ImplicitLocOpBuilder.h create mode 100644 mlir/test/Conversion/GPUCommon/lower-memcpy-to-gpu-runtime-calls.mlir