This is an automated email from the git hooks/post-receive script.
unknown user pushed a change to branch master in repository llvm.
from faad403e268 [InstCombine] fix binop-of-shuffles to check uses new 04291304897 [X86] Split WriteCvtF2F into F32->F64 and F64->F32 schedule [...] new e8cfe2231c5 AMDGPU: Add disasm tests for deep learning instructions + f [...]
The 2 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference.
Summary of changes: .../AMDGPU/Disassembler/AMDGPUDisassembler.cpp | 3 +- lib/Target/X86/X86InstrAVX512.td | 30 +- lib/Target/X86/X86InstrSSE.td | 86 +- lib/Target/X86/X86SchedBroadwell.td | 13 +- lib/Target/X86/X86SchedHaswell.td | 15 +- lib/Target/X86/X86SchedSandyBridge.td | 43 +- lib/Target/X86/X86SchedSkylakeClient.td | 9 +- lib/Target/X86/X86SchedSkylakeServer.td | 13 +- lib/Target/X86/X86Schedule.td | 16 +- lib/Target/X86/X86ScheduleAtom.td | 17 +- lib/Target/X86/X86ScheduleBtVer2.td | 31 +- lib/Target/X86/X86ScheduleSLM.td | 15 +- lib/Target/X86/X86ScheduleZnver1.td | 29 +- test/CodeGen/X86/avx512-schedule.ll | 14 +- test/CodeGen/X86/sse2-schedule.ll | 8 +- test/MC/Disassembler/AMDGPU/dl-insts.txt | 973 +++++++++++++++++++++ test/tools/llvm-mca/X86/BtVer2/resources-avx1.s | 14 +- test/tools/llvm-mca/X86/BtVer2/resources-sse2.s | 4 +- 18 files changed, 1176 insertions(+), 157 deletions(-) create mode 100644 test/MC/Disassembler/AMDGPU/dl-insts.txt