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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gcc_bootstrap/master-arm-bootstrap in repository toolchain/ci/binutils-gdb.

from 37260e0df0 gdb: re-format with black 21.12b0 adds 05f62e0c9a Re: Fix an undefined behaviour in the BFD library's DWARF parser adds 6628ac006d Adjust compare_link_order for unstable qsort adds 4095db4c9c sim: fix mingw builds with replacement gnulib open adds 444cc278b9 bfd: unify texi generation rules adds 7d554943ba sim: mips/or1k: drop redundant arg to bitsize macro adds 23ff54c27d RISC-V: Support svinval extension with frozen version 1.0.

No new revisions were added by this update.

Summary of changes: bfd/doc/Makefile.am | 121 +++++++++------------------------ bfd/doc/Makefile.in | 137 ++++++++++++-------------------------- bfd/dwarf1.c | 8 +-- bfd/elfxx-riscv.c | 3 + gas/testsuite/gas/riscv/svinval.d | 15 +++++ gas/testsuite/gas/riscv/svinval.s | 5 ++ include/opcode/riscv-opc.h | 16 +++++ include/opcode/riscv.h | 1 + ld/ldelfgen.c | 11 +-- opcodes/riscv-opc.c | 7 ++ sim/common/sim-io.c | 4 +- sim/mips/configure | 3 +- sim/mips/configure.ac | 3 +- sim/or1k/configure | 2 +- sim/or1k/configure.ac | 2 +- 15 files changed, 137 insertions(+), 201 deletions(-) create mode 100644 gas/testsuite/gas/riscv/svinval.d create mode 100644 gas/testsuite/gas/riscv/svinval.s