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from b649874e8d4 [ARM] Fix selection of VLDR.16 instruction with imm offset new 273b7e422a6 [X86] Avoid codegen changes when DBG_VALUE appears between [...]

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Summary of changes: lib/Target/X86/X86ISelLowering.cpp | 19 ++++++++++--- test/CodeGen/X86/pseudo_cmov_lower2.ll | 50 ++++++++++++++++++++++++++++++++++ 2 files changed, 65 insertions(+), 4 deletions(-)