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from 3f51684ac05 RISC-V: Bugfix for RVV rounding intrinsic ICE in function checker new 7aed8dedeb9 [RISC-V][PR target/116282] Stabilize pattern conditions new 6d734ba4855 RISC-V: Fix ICE for vector single-width integer multiply-ad [...]

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Summary of changes: gcc/config/riscv/bitmanip.md | 2 +- gcc/config/riscv/riscv-protos.h | 2 +- gcc/config/riscv/riscv.cc | 66 +++++++++++++------- gcc/config/riscv/riscv.md | 16 ++--- gcc/config/riscv/vector.md | 80 ++++++++++++------------- gcc/testsuite/gcc.target/riscv/pr116282.c | 16 +++++ gcc/testsuite/gcc.target/riscv/rvv/base/bug-7.c | 26 ++++++++ gcc/testsuite/gcc.target/riscv/rvv/base/bug-8.c | 26 ++++++++ 8 files changed, 163 insertions(+), 71 deletions(-) create mode 100644 gcc/testsuite/gcc.target/riscv/pr116282.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/base/bug-7.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/base/bug-8.c