This is an automated email from the git hooks/post-receive script.

unknown user pushed a change to branch master in repository llvm.

from ecb26c9a2fb Add requirement to test. new cef7580a718 GlobalISel/TableGen: Handle setcc patterns new 0013bc0cabf AMDGPU: Don't use frame virtual registers

The 2 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference.

Summary of changes: .../llvm/CodeGen/GlobalISel/InstructionSelector.h | 6 + .../CodeGen/GlobalISel/InstructionSelectorImpl.h | 16 +- .../llvm/Target/GlobalISel/SelectionDAGCompat.td | 9 + include/llvm/Target/TargetSelectionDAG.td | 36 +- lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp | 7 +- lib/Target/AMDGPU/AMDGPURegisterBanks.td | 2 +- lib/Target/AMDGPU/SIInstrInfo.cpp | 17 + lib/Target/AMDGPU/SIInstrInfo.h | 6 + lib/Target/AMDGPU/SIRegisterInfo.cpp | 84 +-- .../CodeGen/AMDGPU/GlobalISel/inst-select-fcmp.mir | 799 +++++++++++++++++++++ .../AMDGPU/GlobalISel/inst-select-fcmp.s16.mir | 441 ++++++++++++ test/CodeGen/AMDGPU/frame-index-elimination.ll | 34 +- test/CodeGen/AMDGPU/pei-scavenge-sgpr.mir | 42 ++ test/CodeGen/AMDGPU/spill-m0.ll | 8 +- .../Mips/GlobalISel/instruction-select/mul.mir | 8 +- test/CodeGen/Mips/GlobalISel/llvm-ir/bitwise.ll | 10 +- test/CodeGen/Mips/GlobalISel/llvm-ir/icmp.ll | 4 - test/CodeGen/Mips/GlobalISel/llvm-ir/mul.ll | 2 - test/TableGen/Common/GlobalISelEmitterCommon.td | 1 + test/TableGen/GlobalISelEmitter-setcc.td | 24 + utils/TableGen/GlobalISelEmitter.cpp | 69 +- 21 files changed, 1527 insertions(+), 98 deletions(-) create mode 100644 test/CodeGen/AMDGPU/GlobalISel/inst-select-fcmp.mir create mode 100644 test/CodeGen/AMDGPU/GlobalISel/inst-select-fcmp.s16.mir create mode 100644 test/CodeGen/AMDGPU/pei-scavenge-sgpr.mir create mode 100644 test/TableGen/GlobalISelEmitter-setcc.td