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from f8af48d8755 RISC-V: Fix ternary instruction attribute bug new c48d7a6e320 RISC-V: Add RVV FMA auto-vectorization support

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Summary of changes: gcc/config/riscv/autovec.md | 65 +++++++++++++ gcc/config/riscv/riscv-protos.h | 2 + gcc/config/riscv/riscv-v.cc | 20 ++++ .../gcc.target/riscv/rvv/autovec/ternop/ternop-1.c | 28 ++++++ .../gcc.target/riscv/rvv/autovec/ternop/ternop-2.c | 34 +++++++ .../gcc.target/riscv/rvv/autovec/ternop/ternop-3.c | 33 +++++++ .../riscv/rvv/autovec/ternop/ternop_run-1.c | 84 +++++++++++++++++ .../riscv/rvv/autovec/ternop/ternop_run-2.c | 104 +++++++++++++++++++++ .../riscv/rvv/autovec/ternop/ternop_run-3.c | 104 +++++++++++++++++++++ gcc/testsuite/gcc.target/riscv/rvv/rvv.exp | 2 + 10 files changed, 476 insertions(+) create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop-1.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop-2.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop-3.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop_run-1.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop_run-2.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop_run-3.c