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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk_tx1/llvm-master-aarch64-spec2k6-Os in repository toolchain/ci/llvm-project.

from 55c557a5d25 [AMDGPU][MC] Refactored parsing of dpp ctrl adds 34a2c138c89 [LoopRotate] Precommit test for prepare-for-lto handling. adds 30b8f55378c Fix for sanitizer issue in 55c557a adds ce06475da94 [X86][AVX] IsElementEquivalent - add matchShuffleWithUNPCK [...] adds 63393828078 [WebAssembly] Add support for table linking to wasm-ld adds d806618636f [WebAssembly] MC layer writes table symbols to object files adds f5fcbe4e3c6 [AArch64] Further restricts when a dup(*ext) can be rearranged adds 16bf02c3a19 Reland "[AArch64] Attempt to sink mul operands"" adds 9f32f1d6fbf [MLIR] Support checking if two FlatAffineConstraints are equal adds 69295815ed9 [ARM] Update test target triple. NFC adds 275716d6db7 [clangd] Derive new signals in CC from ASTSignals. adds 1d04dc52dd2 [Coroutine] Do not CoroElide if there are musttail calls adds e7dc083a410 [ARM] Don't handle low overhead branches in AnalyzeBranch adds fa9851ebfee [MLIR] NFC: simplify PresburgerSet::isEqual adds a5a6164f6de [AArch64] Add test to check the attributes for some intrinsics. adds ca7e27054c2 [SLP] add more FMF tests for fmax/fmin reductions; NFC adds b42ff9fb038 [RISCV][NFC] Increase test coverage of Zbt extension adds 50ae6a3ac9b [AArch64] Make target intrinsics DefaultAttrIntrinsics. adds 2f92386e721 [LLD][ELF][AArch64] Set _GLOBAL_OFFSET_TABLE_ at the start of .got adds 291ac7e622d [AArch64] Revert back to Intrinsic<> for TME instructions. adds a58aceffad6 [lldb][docs] Use 'any' as the default role in LLDB's sphinx [...] adds 28ea50f524b [llvm] Populate std::vector at construction time (NFC) adds dc300beba7a [STLExtras] Add a default value to drop_begin adds 23b0ab2acb4 [llvm] Use the default value of drop_begin (NFC) adds 196cc96f9a6 [clang] Allow LifetimeExtendedTemporary to have no access s [...] adds 2c51bef76cb [RISCV] Add a test of vector sadd.overflow to demonstrate i [...] adds 5d431c3d32c Revert "[RISCV] Add a test of vector sadd.overflow to demon [...] adds 79e798aca38 Recommit "[RISCV] Add a test of vector sadd.overflow to dem [...] adds 01a13f127a8 [libc++] Rename check-cxx-deps to cxx-test-depends for consistency adds 417f6137432 [NFC] Update some mlir python documentation. adds 2776be43f0c [libc++] improve feature test macro script adds d9b6e4d583c NFC: Document current MLIR Python ODS conventions. adds aa3a59e0c69 [OpenMP][NFC] Fix test adds 22b68440e16 [PredicateInfo] Add more and/or tests (NFC) adds 1c314591536 [RISCV] Remove empty Sched instantiations from the end of I [...] adds 5b77ac32b11 [SLP] match maxnum/minnum intrinsics as FP reduction ops adds 2cb4a96a99e [libc++] NFCI: Refactor allocator_traits adds d27bb5c375c [x86] add cast to avoid compile-time warning; NFC adds fe301f47497 [LoopInfo] Fix a typo in compareLoops adds 395c737d9fc [SimplifyCFG] Update SimplifyBranchOnICmpChain to recognize [...] adds 9d81073acb4 [OpenMP][Docs] Fix typos in FAQ (NFC) adds 14573d44ae0 Regenerate the feature test macro unit-tests. NFCI. adds 0441df94ad8 [InstCombine,InstSimplify] Optimize select followed by and/or/xor adds 2d89ebd5d17 Address unused variable warning adds a9b3303a884 Revert "[NFC] [TargetRegisterInfo] add one use check to loo [...] adds c535a7fdadb [X86] Fix tile spill merge issue. adds bc713f6a004 PR48763: Better handling for classes that inherit a default [...] adds 61f69153e8d [PowerPC] Sign extend comparison operand for signed atomic [...] adds e147eccafa1 [X86][AMX] Clear AMX lit test case. adds e3065ce2384 DR2064: decltype(E) is only a dependent type if E is type-d [...] adds fbb83f18b54 PR24076, PR33655, C++ CWG 1558: Consider the instantiation- [...] adds 5a391d38ac6 Following up on PR48517, fix handling of template arguments [...] adds 4b574008aef [c++20] P1907R1: Support for generalized non-type template [...] adds 24672ddea3c [ORC] Move OrcError.h to include/llvm/ExecutionEngine/Orc/Shared. adds bfbbb62b22f [libc][NFC] Use ASSERT_EQ instead of EXPECT_EQ in fenv/exce [...] adds 7dadcd02d6c Fix a few GCC compiler warnings (NFC) adds ffb254978cf [libc][NFC][Obvious] Add a missing dep. adds 9a0900dc4c6 [NFC][AIX][XCOFF] Fix compile warning on strncpy adds 9cf511aa08a [RISCV] Add intrinsics for vector AMO operations adds a11f8b1ad66 [libc++] [P0935] [C++20] Eradicating unnecessarily explicit [...] adds d4bb3ef5327 [libc][NFC] Remove dead code adds e517dff50a4 [libc][NFC] remove dependency on non standard ssize_t adds b86e7ae66cb [clang][driver][NFC][obvious] Remove obsolete unistd.h include adds 418df4a6ab3 [WebAssembly] call_indirect issues table number relocs adds 831a143e50c [WebAssembly] Change prefix on data segment flags to WASM_D [...] adds 39a2a233f88 [clang][cli] Parse Lang and CodeGen options separately adds 7e1d2224b42 [X86][AMX] Fix the typo. adds c3ce2627949 [NFC] Make remaining cost functions in LoopVectorize.cpp us [...] adds 170199f5626 [llvm][nvptx] add atomicity to counter in ISelLowering adds 95b63c7b139 [ORC] Move LookupRequest from OrcShared to Orc. adds fb5b12e42ef [lit] Harmonize lit and llvm versionning adds a003f26539c [llvm] Prevent infinite loop in InstCombine of select statements adds c81ea9429f8 [RISCV] Add scalable-vector integer extension patterns adds 9a7672ac498 [lldb] Fix crash in "help memory read" adds 244ad228f34 [ARM][MachineOutliner] Add stack fixup feature adds 079e6646617 [lldb] Re-enable TestPlatformProcessConnect on macos adds e448ad787e1 [LLDB] Add support to resize SVE registers at run-time adds 4d3081331ad [LLDB] Test SVE dynamic resize with multiple threads adds 83daa49758a [LoopRotate] Add PrepareForLTO stage, avoid rotating with i [...] adds 49dce85584e [AMDGPU] Simplify AMDGPUInstPrinter::printExpSrcN. NFC. adds 58bdfcfac04 Revert 5238e7b302 "[InstCombine] Replace one-use select ope [...] adds 5626adcd6bb [X86][SSE] combineVectorSignBitsTruncation - fold trunc(srl [...] new c9439ca3634 [AArch64][SVE] Coalesce calls to the SVE ptrue intrinsic wh [...]

The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference.

Summary of changes: clang-tools-extra/clangd/ClangdServer.cpp | 1 + clang-tools-extra/clangd/CodeComplete.cpp | 1 + clang-tools-extra/clangd/CodeComplete.h | 2 + clang-tools-extra/clangd/DumpAST.cpp | 1 + clang-tools-extra/clangd/FindTarget.cpp | 1 + clang-tools-extra/clangd/Quality.cpp | 33 + clang-tools-extra/clangd/Quality.h | 10 + clang-tools-extra/clangd/index/remote/Client.cpp | 3 +- .../clangd/unittests/CodeCompleteTests.cpp | 46 + clang/include/clang/AST/ASTContext.h | 4 +- .../clang/AST/CXXRecordDeclDefinitionBits.def | 4 + clang/include/clang/AST/DeclCXX.h | 11 +- clang/include/clang/AST/DependenceFlags.h | 6 + clang/include/clang/AST/Expr.h | 14 +- clang/include/clang/AST/PropertiesBase.td | 11 + clang/include/clang/AST/RecursiveASTVisitor.h | 2 + clang/include/clang/AST/TemplateArgumentVisitor.h | 2 + clang/include/clang/AST/TemplateBase.h | 53 +- clang/include/clang/AST/Type.h | 4 +- clang/include/clang/Basic/DiagnosticSemaKinds.td | 5 - clang/include/clang/Driver/Options.td | 17 +- clang/include/clang/Frontend/CompilerInvocation.h | 3 +- clang/include/clang/Sema/Sema.h | 7 +- clang/lib/AST/ASTContext.cpp | 13 +- clang/lib/AST/ASTImporter.cpp | 11 + clang/lib/AST/ASTStructuralEquivalence.cpp | 4 + clang/lib/AST/ComputeDependence.cpp | 13 +- clang/lib/AST/Decl.cpp | 4 + clang/lib/AST/DeclBase.cpp | 16 +- clang/lib/AST/DeclCXX.cpp | 6 +- clang/lib/AST/Expr.cpp | 35 +- clang/lib/AST/ExprCXX.cpp | 11 +- clang/lib/AST/ExprConstant.cpp | 101 +- clang/lib/AST/ItaniumMangle.cpp | 57 +- clang/lib/AST/MicrosoftMangle.cpp | 11 + clang/lib/AST/ODRHash.cpp | 2 + clang/lib/AST/StmtProfile.cpp | 6 + clang/lib/AST/TemplateBase.cpp | 127 +- clang/lib/AST/Type.cpp | 20 +- clang/lib/AST/TypeLoc.cpp | 1 + clang/lib/CodeGen/CGDebugInfo.cpp | 8 + clang/lib/CodeGen/CGExprConstant.cpp | 10 +- clang/lib/Driver/ToolChains/Clang.cpp | 4 - clang/lib/Frontend/CompilerInvocation.cpp | 81 +- clang/lib/Headers/amxintrin.h | 2 +- clang/lib/Index/USRGeneration.cpp | 4 + clang/lib/Sema/SemaLookup.cpp | 1 + clang/lib/Sema/SemaOverload.cpp | 19 +- clang/lib/Sema/SemaTemplate.cpp | 232 +- clang/lib/Sema/SemaTemplateDeduction.cpp | 94 +- clang/lib/Sema/SemaTemplateInstantiate.cpp | 16 +- clang/lib/Sema/SemaTemplateVariadic.cpp | 2 + clang/lib/Sema/TreeTransform.h | 12 +- clang/lib/Serialization/ASTReader.cpp | 1 + clang/lib/Serialization/ASTWriter.cpp | 1 + .../basic.namespace/namespace.udecl/p15.cpp | 12 +- clang/test/CXX/drs/dr15xx.cpp | 14 + clang/test/CXX/drs/dr20xx.cpp | 12 + clang/test/CXX/special/class.ctor/p6-0x.cpp | 31 + clang/test/CXX/special/class.inhctor/p1.cpp | 12 +- clang/test/CXX/special/class.inhctor/p2.cpp | 6 +- clang/test/CodeGen/X86/amx_api.c | 8 +- clang/test/CodeGen/aarch64-tme.cpp | 2 +- clang/test/CodeGenCXX/mangle-ms-templates.cpp | 10 + clang/test/CodeGenCXX/mangle-subst.cpp | 11 + clang/test/CodeGenCXX/mangle-template.cpp | 60 +- clang/test/CodeGenCXX/template-arguments.cpp | 81 + clang/test/Frontend/diagnostics-order.c | 2 +- .../OpenMP/distribute_dist_schedule_messages.cpp | 2 +- ...tribute_parallel_for_dist_schedule_messages.cpp | 2 +- ...te_parallel_for_simd_dist_schedule_messages.cpp | 2 +- .../distribute_simd_dist_schedule_messages.cpp | 2 +- .../target_parallel_for_simd_collapse_messages.cpp | 2 +- .../target_parallel_for_simd_ordered_messages.cpp | 2 +- .../test/OpenMP/target_simd_collapse_messages.cpp | 2 +- ...get_teams_distribute_dist_schedule_messages.cpp | 2 +- ...tribute_parallel_for_dist_schedule_messages.cpp | 2 +- ...te_parallel_for_simd_dist_schedule_messages.cpp | 2 +- ...eams_distribute_simd_dist_schedule_messages.cpp | 2 +- clang/test/OpenMP/target_update_from_messages.cpp | 2 +- clang/test/OpenMP/target_update_to_messages.cpp | 2 +- clang/test/OpenMP/task_messages.cpp | 4 +- .../teams_distribute_dist_schedule_messages.cpp | 2 +- ...tribute_parallel_for_dist_schedule_messages.cpp | 2 +- ...te_parallel_for_simd_dist_schedule_messages.cpp | 2 +- ...eams_distribute_simd_dist_schedule_messages.cpp | 2 +- clang/test/PCH/cxx-reference.h | 4 + clang/test/Sema/invalid-bitwidth-expr.mm | 1 + .../SemaCXX/invalid-template-base-specifier.cpp | 4 +- clang/test/SemaCXX/warn-unused-lambda-capture.cpp | 2 +- clang/test/SemaTemplate/dependent-expr.cpp | 7 +- .../test/SemaTemplate/instantiation-dependence.cpp | 82 + .../test/SemaTemplate/partial-spec-instantiate.cpp | 18 +- ...ontype_cxx1z.cpp => temp_arg_nontype_cxx17.cpp} | 50 +- clang/test/SemaTemplate/temp_arg_nontype_cxx20.cpp | 80 +- .../test/SemaTemplate/temp_arg_template_cxx1z.cpp | 8 +- clang/tools/libclang/CIndex.cpp | 5 + clang/tools/libclang/CXCursor.cpp | 3 + clang/www/cxx_dr_status.html | 4 +- libc/benchmarks/JSON.cpp | 5 - libc/benchmarks/LibcMemoryBenchmarkMain.cpp | 2 - libc/include/CMakeLists.txt | 1 + libc/src/string/memmove.cpp | 24 +- libc/test/src/fenv/exception_status_test.cpp | 44 +- libcxx/docs/Cxx2aStatusPaperStatus.csv | 2 +- libcxx/docs/TestingLibcxx.rst | 6 +- libcxx/include/__memory/allocator_traits.h | 718 ++-- libcxx/include/algorithm | 12 +- libcxx/include/locale | 42 +- libcxx/include/memory | 4 +- libcxx/include/queue | 19 +- libcxx/include/random | 276 +- libcxx/include/regex | 10 +- libcxx/include/sstream | 89 +- libcxx/include/strstream | 10 +- libcxx/test/CMakeLists.txt | 4 +- .../priqueue.cons/ctor_comp.pass.cpp | 14 +- .../priqueue.cons/ctor_comp_container.pass.cpp | 19 +- .../priqueue.cons/ctor_comp_rcontainer.pass.cpp | 15 +- .../priqueue.cons/ctor_default.pass.cpp | 18 +- .../queue/queue.cons/ctor_container.pass.cpp | 15 +- .../queue/queue.cons/ctor_default.pass.cpp | 18 +- .../queue/queue.cons/ctor_rcontainer.pass.cpp | 19 +- .../stack/stack.cons/ctor_container.pass.cpp | 17 +- .../stack/stack.cons/ctor_default.pass.cpp | 18 +- .../stack/stack.cons/ctor_rcontainer.pass.cpp | 17 +- .../depr.strstreambuf.cons/default.pass.cpp | 17 +- .../istringstream.cons/default.pass.cpp | 20 +- .../ostringstream.cons/default.pass.cpp | 20 +- .../stringbuf/stringbuf.cons/default.pass.cpp | 17 +- .../stringstream.cons/default.pass.cpp | 20 +- .../type_traits.version.pass.cpp | 10 +- .../version.version.pass.cpp | 10 +- .../conversions/conversions.buffer/ctor.pass.cpp | 21 +- .../conversions.string/ctor_codecvt.pass.cpp | 19 +- .../std/numerics/rand/rand.device/ctor.pass.cpp | 13 +- .../rand.dist.bern.bernoulli/ctor_double.pass.cpp | 19 +- .../rand.dist.bern.bin/ctor_int_double.pass.cpp | 24 +- .../rand.dist.bern.geo/ctor_double.pass.cpp | 23 +- .../rand.dist.bern.negbin/ctor_int_double.pass.cpp | 24 +- .../ctor_double_double.pass.cpp | 24 +- .../rand.dist.norm.chisq/ctor_double.pass.cpp | 23 +- .../rand.dist.norm.f/ctor_double_double.pass.cpp | 24 +- .../ctor_double_double.pass.cpp | 24 +- .../ctor_double_double.pass.cpp | 24 +- .../rand.dist.norm.t/ctor_double.pass.cpp | 23 +- .../rand.dist.pois.exp/ctor_double.pass.cpp | 23 +- .../ctor_double_double.pass.cpp | 24 +- .../ctor_double_double.pass.cpp | 24 +- .../rand.dist.pois.poisson/ctor_double.pass.cpp | 23 +- .../ctor_double_double.pass.cpp | 24 +- .../rand.dist.uni.int/ctor_int_int.pass.cpp | 25 +- .../rand.dist.uni.real/ctor_int_int.pass.cpp | 44 - .../rand.dist.uni.real/ctor_real_real.pass.cpp | 64 + .../rand.eng.lcong/ctor_result_type.pass.cpp | 77 +- .../rand.eng.mers/ctor_result_type.pass.cpp | 39 +- .../rand.eng.sub/ctor_result_type.pass.cpp | 41 +- .../re.results/re.results.const/default.pass.cpp | 23 +- .../make_implicit.h} | 28 +- .../generate_feature_test_macro_components.py | 99 +- lld/ELF/Arch/AArch64.cpp | 1 + .../ELF/global-offset-table-position-aarch64.s | 2 +- lld/test/wasm/alias.s | 8 - lld/test/wasm/call-indirect.ll | 6 +- lld/test/wasm/compress-relocs.ll | 2 +- lld/test/wasm/export-table-explicit.test | 31 + lld/test/wasm/init-fini.ll | 18 +- lld/test/wasm/local-symbols.ll | 8 - lld/test/wasm/locals-duplicate.test | 55 +- lld/test/wasm/pie.ll | 16 +- lld/test/wasm/section-symbol-relocs.yaml | 4 +- lld/test/wasm/shared.ll | 16 +- lld/test/wasm/signature-mismatch.ll | 9 +- lld/test/wasm/stack-pointer.ll | 8 - lld/test/wasm/weak-alias.ll | 5 + lld/wasm/Driver.cpp | 59 + lld/wasm/InputFiles.cpp | 75 + lld/wasm/InputFiles.h | 1 + lld/wasm/MarkLive.cpp | 3 + lld/wasm/OutputSections.cpp | 6 +- lld/wasm/SymbolTable.cpp | 12 + lld/wasm/SymbolTable.h | 3 + lld/wasm/Symbols.cpp | 1 + lld/wasm/Symbols.h | 5 + lld/wasm/SyntheticSections.cpp | 39 +- lld/wasm/SyntheticSections.h | 13 +- lld/wasm/Writer.cpp | 26 +- lldb/docs/conf.py | 5 +- lldb/docs/use/python.rst | 10 +- lldb/docs/use/variable.rst | 14 +- lldb/include/lldb/Utility/OptionDefinition.h | 5 +- lldb/include/lldb/lldb-enumerations.h | 1 + .../test/tools/lldb-server/lldbgdbserverutils.py | 3 - .../Linux/NativeRegisterContextLinux_arm64.cpp | 23 +- .../Process/Utility/DynamicRegisterInfo.cpp | 11 + .../Plugins/Process/Utility/DynamicRegisterInfo.h | 6 +- .../gdb-remote/GDBRemoteRegisterContext.cpp | 81 +- .../Process/gdb-remote/GDBRemoteRegisterContext.h | 3 + .../Process/gdb-remote/ProcessGDBRemote.cpp | 13 + .../Plugins/TypeSystem/Clang/TypeSystemClang.cpp | 3 + lldb/test/API/commands/help/TestHelp.py | 5 + .../rw_access_dynamic_resize/Makefile | 5 + .../TestSVEThreadedDynamic.py | 138 + .../rw_access_dynamic_resize/main.c | 96 + .../TestPlatformProcessConnect.py | 1 - llvm/include/llvm/ADT/STLExtras.h | 2 +- llvm/include/llvm/Analysis/CodeMetrics.h | 3 +- llvm/include/llvm/Analysis/LoopInfoImpl.h | 3 +- llvm/include/llvm/BinaryFormat/Wasm.h | 11 +- llvm/include/llvm/CodeGen/TargetRegisterInfo.h | 7 +- .../ExecutionEngine/Orc/CompileOnDemandLayer.h | 2 +- .../llvm/ExecutionEngine/Orc/ExecutionUtils.h | 2 +- .../Orc/OrcRPCTargetProcessControl.h | 2 +- .../ExecutionEngine/Orc/OrcRemoteTargetServer.h | 2 +- .../ExecutionEngine/Orc/{ => Shared}/OrcError.h | 0 .../llvm/ExecutionEngine/Orc/Shared/RPCUtils.h | 2 +- .../ExecutionEngine/Orc/Shared/Serialization.h | 2 +- .../Orc/Shared/TargetProcessControlTypes.h | 9 - .../ExecutionEngine/Orc/TargetProcessControl.h | 12 +- llvm/include/llvm/IR/IntrinsicsAArch64.td | 441 +-- llvm/include/llvm/IR/IntrinsicsRISCV.td | 28 + llvm/include/llvm/Transforms/Scalar.h | 2 +- llvm/include/llvm/Transforms/Scalar/LoopRotation.h | 4 +- .../llvm/Transforms/Utils/LoopRotationUtils.h | 3 +- llvm/lib/Analysis/CodeMetrics.cpp | 12 +- llvm/lib/Analysis/InstructionSimplify.cpp | 30 +- llvm/lib/Analysis/LoopInfo.cpp | 2 +- llvm/lib/Analysis/ModuleSummaryAnalysis.cpp | 2 +- llvm/lib/Analysis/ScalarEvolution.cpp | 2 +- llvm/lib/Analysis/VFABIDemangling.cpp | 2 +- llvm/lib/CodeGen/CodeGenPrepare.cpp | 4 +- llvm/lib/CodeGen/InlineSpiller.cpp | 2 +- llvm/lib/CodeGen/SafeStackLayout.cpp | 2 +- llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp | 2 +- .../CodeGen/SelectionDAG/SelectionDAGBuilder.cpp | 2 +- llvm/lib/CodeGen/TargetRegisterInfo.cpp | 19 +- llvm/lib/ExecutionEngine/Orc/Core.cpp | 2 +- llvm/lib/ExecutionEngine/Orc/LLJIT.cpp | 2 +- llvm/lib/ExecutionEngine/Orc/Shared/OrcError.cpp | 2 +- .../Orc/TPCDynamicLibrarySearchGenerator.cpp | 2 +- .../ExecutionEngine/Orc/TargetProcessControl.cpp | 3 +- llvm/lib/MC/WasmObjectWriter.cpp | 27 +- llvm/lib/MC/XCOFFObjectWriter.cpp | 11 +- llvm/lib/Object/WasmObjectFile.cpp | 8 +- llvm/lib/ObjectYAML/DWARFEmitter.cpp | 3 +- llvm/lib/ObjectYAML/MachOEmitter.cpp | 6 +- llvm/lib/ObjectYAML/WasmEmitter.cpp | 4 +- llvm/lib/ObjectYAML/WasmYAML.cpp | 4 +- llvm/lib/Passes/PassBuilder.cpp | 3 +- llvm/lib/ProfileData/SampleProf.cpp | 6 +- llvm/lib/Target/AArch64/AArch64ISelLowering.cpp | 45 +- llvm/lib/Target/AArch64/SVEIntrinsicOpts.cpp | 222 +- .../Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp | 2 +- .../AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp | 21 +- .../Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.h | 6 +- llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp | 148 +- llvm/lib/Target/ARM/ARMBaseInstrInfo.h | 10 + llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp | 4 +- llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp | 26 +- llvm/lib/Target/NVPTX/NVPTXISelLowering.h | 3 +- llvm/lib/Target/PowerPC/PPCISelLowering.cpp | 79 +- llvm/lib/Target/RISCV/RISCVInstrInfoB.td | 272 +- llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td | 219 +- llvm/lib/Target/RISCV/RISCVInstrInfoVSDPatterns.td | 26 + .../WebAssembly/AsmParser/WebAssemblyAsmParser.cpp | 42 +- .../MCTargetDesc/WebAssemblyInstPrinter.cpp | 2 +- .../MCTargetDesc/WebAssemblyMCTargetDesc.h | 10 + .../lib/Target/WebAssembly/WebAssemblyFastISel.cpp | 15 +- .../Target/WebAssembly/WebAssemblyISelLowering.cpp | 15 +- .../lib/Target/WebAssembly/WebAssemblyInstrCall.td | 18 +- .../Target/WebAssembly/WebAssemblyMCInstLower.cpp | 4 +- .../Target/WebAssembly/WebAssemblyRegStackify.cpp | 4 +- llvm/lib/Target/X86/X86ISelLowering.cpp | 27 +- llvm/lib/Target/X86/X86MCInstLower.cpp | 4 +- llvm/lib/Transforms/Coroutines/CoroElide.cpp | 23 +- llvm/lib/Transforms/IPO/OpenMPOpt.cpp | 2 +- llvm/lib/Transforms/IPO/PassManagerBuilder.cpp | 4 +- llvm/lib/Transforms/IPO/ThinLTOBitcodeWriter.cpp | 2 +- llvm/lib/Transforms/IPO/WholeProgramDevirt.cpp | 2 +- .../Transforms/InstCombine/InstCombineAndOrXor.cpp | 29 +- .../Transforms/InstCombine/InstCombineSelect.cpp | 17 +- llvm/lib/Transforms/Scalar/LoopInterchange.cpp | 4 +- llvm/lib/Transforms/Scalar/LoopRotation.cpp | 29 +- llvm/lib/Transforms/Utils/LoopRotationUtils.cpp | 17 +- llvm/lib/Transforms/Utils/LoopUtils.cpp | 4 +- llvm/lib/Transforms/Utils/SimplifyCFG.cpp | 17 +- llvm/lib/Transforms/Vectorize/LoopVectorize.cpp | 135 +- llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp | 42 +- .../Assembler/aarch64-intrinsics-attributes.ll | 26 + llvm/test/CodeGen/AArch64/aarch64-dup-ext-crash.ll | 33 + .../CodeGen/AArch64/aarch64-matrix-umull-smull.ll | 186 ++ .../AArch64/sve-coalesce-ptrue-intrinsics.ll | 189 ++ llvm/test/CodeGen/ARM/ParallelDSP/aliasing.ll | 2 +- .../CodeGen/ARM/ParallelDSP/multi-use-loads.ll | 4 +- llvm/test/CodeGen/ARM/ParallelDSP/smlad0.ll | 6 +- llvm/test/CodeGen/ARM/ParallelDSP/smlad1.ll | 2 +- llvm/test/CodeGen/ARM/ParallelDSP/smlad10.ll | 2 +- llvm/test/CodeGen/ARM/ParallelDSP/smlad11.ll | 2 +- llvm/test/CodeGen/ARM/ParallelDSP/smlad12.ll | 2 +- llvm/test/CodeGen/ARM/ParallelDSP/smlad2.ll | 2 +- llvm/test/CodeGen/ARM/ParallelDSP/smlad3.ll | 2 +- llvm/test/CodeGen/ARM/ParallelDSP/smlad4.ll | 2 +- llvm/test/CodeGen/ARM/ParallelDSP/smlad5.ll | 2 +- llvm/test/CodeGen/ARM/ParallelDSP/smlad8.ll | 2 +- llvm/test/CodeGen/ARM/ParallelDSP/smlad9.ll | 2 +- llvm/test/CodeGen/ARM/ParallelDSP/smladx-1.ll | 4 +- llvm/test/CodeGen/ARM/ParallelDSP/smlald0.ll | 8 +- llvm/test/CodeGen/ARM/ParallelDSP/smlald1.ll | 2 +- llvm/test/CodeGen/ARM/ParallelDSP/smlald2.ll | 6 +- llvm/test/CodeGen/ARM/ParallelDSP/smlaldx-1.ll | 4 +- llvm/test/CodeGen/ARM/ParallelDSP/smlaldx-2.ll | 4 +- llvm/test/CodeGen/ARM/machine-outliner-default.mir | 117 - .../CodeGen/ARM/machine-outliner-no-lr-save.mir | 56 - .../ARM/machine-outliner-stack-fixup-arm.mir | 186 ++ .../ARM/machine-outliner-stack-fixup-thumb.mir | 231 ++ llvm/test/CodeGen/PowerPC/atomics-regression.ll | 440 +-- llvm/test/CodeGen/PowerPC/sign-ext-atomics.ll | 105 + llvm/test/CodeGen/RISCV/neg-abs.ll | 186 +- llvm/test/CodeGen/RISCV/rvv/saddo-sdnode.ll | 23 + llvm/test/CodeGen/RISCV/rvv/vamoadd-rv32.ll | 734 +++++ llvm/test/CodeGen/RISCV/rvv/vamoadd-rv64.ll | 1714 ++++++++++ llvm/test/CodeGen/RISCV/rvv/vamoand-rv32.ll | 734 +++++ llvm/test/CodeGen/RISCV/rvv/vamoand-rv64.ll | 1714 ++++++++++ llvm/test/CodeGen/RISCV/rvv/vamomax-rv32.ll | 734 +++++ llvm/test/CodeGen/RISCV/rvv/vamomax-rv64.ll | 1714 ++++++++++ llvm/test/CodeGen/RISCV/rvv/vamomaxu-rv32.ll | 734 +++++ llvm/test/CodeGen/RISCV/rvv/vamomaxu-rv64.ll | 1714 ++++++++++ llvm/test/CodeGen/RISCV/rvv/vamomin-rv32.ll | 734 +++++ llvm/test/CodeGen/RISCV/rvv/vamomin-rv64.ll | 1714 ++++++++++ llvm/test/CodeGen/RISCV/rvv/vamominu-rv32.ll | 734 +++++ llvm/test/CodeGen/RISCV/rvv/vamominu-rv64.ll | 1714 ++++++++++ llvm/test/CodeGen/RISCV/rvv/vamoor-rv32.ll | 734 +++++ llvm/test/CodeGen/RISCV/rvv/vamoor-rv64.ll | 1714 ++++++++++ llvm/test/CodeGen/RISCV/rvv/vamoswap-rv32.ll | 2054 ++++++++++++ llvm/test/CodeGen/RISCV/rvv/vamoswap-rv64.ll | 3426 ++++++++++++++++++++ llvm/test/CodeGen/RISCV/rvv/vamoxor-rv32.ll | 734 +++++ llvm/test/CodeGen/RISCV/rvv/vamoxor-rv64.ll | 1714 ++++++++++ llvm/test/CodeGen/RISCV/rvv/vexts-sdnode-rv32.ll | 619 ++++ llvm/test/CodeGen/RISCV/rvv/vexts-sdnode-rv64.ll | 619 ++++ llvm/test/CodeGen/RISCV/select-and.ll | 58 + .../RISCV/{bare-select.ll => select-bare.ll} | 22 + llvm/test/CodeGen/RISCV/select-cc.ll | 56 + llvm/test/CodeGen/RISCV/select-const.ll | 156 + .../test/CodeGen/RISCV/select-optimize-multiple.ll | 272 ++ .../CodeGen/RISCV/select-optimize-multiple.mir | 90 + llvm/test/CodeGen/RISCV/select-or.ll | 58 + .../Thumb2/LowOverheadLoops/fast-fp-loops.ll | 111 +- .../Thumb2/LowOverheadLoops/mve-float-loops.ll | 6 +- .../Thumb2/LowOverheadLoops/sibling-loops.ll | 48 +- .../LowOverheadLoops/varying-outer-2d-reduction.ll | 122 +- .../LowOverheadLoops/vcmp-vpst-combination.ll | 3 +- .../CodeGen/Thumb2/LowOverheadLoops/while-loops.ll | 46 +- llvm/test/CodeGen/Thumb2/aligned-nonfallthrough.ll | 2 + llvm/test/CodeGen/Thumb2/mve-blockplacement.ll | 713 ++++ llvm/test/CodeGen/Thumb2/mve-float16regloops.ll | 64 +- llvm/test/CodeGen/Thumb2/mve-float32regloops.ll | 90 +- llvm/test/CodeGen/Thumb2/mve-gather-increment.ll | 146 +- .../Thumb2/mve-gather-scatter-optimisation.ll | 156 +- llvm/test/CodeGen/Thumb2/mve-gather-tailpred.ll | 28 +- llvm/test/CodeGen/Thumb2/mve-satmul-loops.ll | 6 +- llvm/test/CodeGen/Thumb2/mve-scatter-increment.ll | 28 +- llvm/test/CodeGen/Thumb2/mve-vecreduce-loops.ll | 114 +- llvm/test/CodeGen/Thumb2/mve-vldshuffle.ll | 3 +- .../test/CodeGen/WebAssembly/function-pointer64.ll | 10 +- llvm/test/CodeGen/WebAssembly/multivalue.ll | 2 +- llvm/test/CodeGen/X86/AMX/amx-across-func.ll | 20 +- llvm/test/CodeGen/X86/AMX/amx-config.ll | 6 +- llvm/test/CodeGen/X86/AMX/amx-intrinsic-chain.ll | 2 +- llvm/test/CodeGen/X86/AMX/amx-spill-merge.ll | 105 +- llvm/test/CodeGen/X86/AMX/amx-spill.ll | 8 +- llvm/test/CodeGen/X86/AMX/amx-type.ll | 4 +- llvm/test/CodeGen/X86/avg.ll | 2 +- .../CodeGen/X86/avx512-shuffles/partial_permute.ll | 10 +- llvm/test/CodeGen/X86/vector-trunc.ll | 7 +- llvm/test/MC/WebAssembly/basic-assembly.s | 2 +- llvm/test/MC/WebAssembly/call-indirect-relocs.s | 83 + llvm/test/MC/WebAssembly/debug-info.ll | 24 +- llvm/test/MC/WebAssembly/debug-info64.ll | 24 +- llvm/test/MC/WebAssembly/function-alias.ll | 10 + llvm/test/MC/WebAssembly/global-ctor-dtor.ll | 5 + llvm/test/MC/WebAssembly/reloc-code.ll | 16 +- llvm/test/MC/WebAssembly/reloc-pic.s | 5 + llvm/test/MC/WebAssembly/tail-call-encodings.s | 2 +- llvm/test/MC/WebAssembly/type-index.s | 10 +- llvm/test/MC/WebAssembly/weak-alias.s | 45 +- .../Transforms/Coroutines/coro-elide-musttail.ll | 74 + .../Transforms/InstCombine/select-binop-cmp.ll | 44 +- .../InstCombine/select-safe-transforms.ll | 54 +- .../Transforms/LoopRotate/call-prepare-for-lto.ll | 43 + .../X86/vector-reductions-expanded.ll | 21 +- llvm/test/Transforms/SLPVectorizer/X86/fmaxnum.ll | 100 +- llvm/test/Transforms/SLPVectorizer/X86/fminnum.ll | 100 +- llvm/test/Transforms/SimplifyCFG/switch_create.ll | 80 +- .../Transforms/Util/PredicateInfo/testandor.ll | 565 ++++ .../Inputs/arm_generated_funcs.ll | 2 - .../arm_generated_funcs.ll.generated.expected | 35 +- .../arm_generated_funcs.ll.nogenerated.expected | 24 +- llvm/tools/llvm-xray/xray-stacks.cpp | 2 +- llvm/unittests/ADT/STLExtrasTest.cpp | 11 + .../unittests/ExecutionEngine/Orc/CoreAPIsTest.cpp | 2 +- .../ExecutionEngine/Orc/ResourceTrackerTest.cpp | 2 +- llvm/utils/lit/lit/__init__.py | 2 +- mlir/docs/Bindings/Python.md | 174 +- mlir/include/mlir/Analysis/PresburgerSet.h | 5 +- mlir/lib/Analysis/PresburgerSet.cpp | 13 + mlir/lib/CAPI/Dialect/Linalg.cpp | 2 +- mlir/lib/CAPI/Dialect/SCF.cpp | 2 +- mlir/lib/CAPI/Dialect/Shape.cpp | 2 +- mlir/lib/CAPI/Dialect/Standard.cpp | 2 +- mlir/lib/CAPI/Dialect/Tensor.cpp | 2 +- .../Dialect/Linalg/Transforms/Sparsification.cpp | 5 + mlir/lib/ExecutionEngine/SparseUtils.cpp | 2 +- mlir/lib/Rewrite/ByteCode.cpp | 1 + mlir/tools/mlir-tblgen/OpFormatGen.cpp | 2 +- mlir/tools/mlir-tblgen/OpPythonBindingGen.cpp | 2 +- mlir/unittests/Analysis/PresburgerSetTest.cpp | 80 +- openmp/docs/SupportAndFAQ.rst | 6 +- openmp/runtime/test/api/omp_alloc_null_fb.c | 4 +- 418 files changed, 36125 insertions(+), 3515 deletions(-) create mode 100644 clang/test/CodeGenCXX/template-arguments.cpp create mode 100644 clang/test/SemaTemplate/instantiation-dependence.cpp rename clang/test/SemaTemplate/{temp_arg_nontype_cxx1z.cpp => temp_arg_nontype_cxx [...] delete mode 100644 libcxx/test/std/numerics/rand/rand.dis/rand.dist.uni/rand.dist. [...] create mode 100644 libcxx/test/std/numerics/rand/rand.dis/rand.dist.uni/rand.dist. [...] copy libcxx/test/{std/containers/container.adaptors/stack/stack.cons/ctor_default. [...] create mode 100644 lld/test/wasm/export-table-explicit.test create mode 100644 lldb/test/API/commands/register/register/aarch64_sve_registers/ [...] create mode 100644 lldb/test/API/commands/register/register/aarch64_sve_registers/ [...] create mode 100644 lldb/test/API/commands/register/register/aarch64_sve_registers/ [...] rename llvm/include/llvm/ExecutionEngine/Orc/{ => Shared}/OrcError.h (100%) create mode 100644 llvm/test/Assembler/aarch64-intrinsics-attributes.ll create mode 100644 llvm/test/CodeGen/AArch64/aarch64-dup-ext-crash.ll create mode 100644 llvm/test/CodeGen/AArch64/aarch64-matrix-umull-smull.ll create mode 100644 llvm/test/CodeGen/AArch64/sve-coalesce-ptrue-intrinsics.ll create mode 100644 llvm/test/CodeGen/ARM/machine-outliner-stack-fixup-arm.mir create mode 100644 llvm/test/CodeGen/ARM/machine-outliner-stack-fixup-thumb.mir create mode 100644 llvm/test/CodeGen/PowerPC/sign-ext-atomics.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/saddo-sdnode.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vamoadd-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vamoadd-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vamoand-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vamoand-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vamomax-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vamomax-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vamomaxu-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vamomaxu-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vamomin-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vamomin-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vamominu-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vamominu-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vamoor-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vamoor-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vamoswap-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vamoswap-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vamoxor-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vamoxor-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vexts-sdnode-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vexts-sdnode-rv64.ll rename llvm/test/CodeGen/RISCV/{bare-select.ll => select-bare.ll} (57%) create mode 100644 llvm/test/CodeGen/Thumb2/mve-blockplacement.ll create mode 100644 llvm/test/MC/WebAssembly/call-indirect-relocs.s create mode 100644 llvm/test/Transforms/Coroutines/coro-elide-musttail.ll create mode 100644 llvm/test/Transforms/LoopRotate/call-prepare-for-lto.ll