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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-lts-defconfig in repository toolchain/ci/llvm-project.

from 1f40f15d54a [InstCombine] fold a shifted bool zext to a select adds 044297ccbfc [update_mir_test_checks] Handle MI flags properly adds be744ea54f4 DebugInfo: Remove unnecessary/mistaken inclusion of Bitcode [...] adds e9089c223ce [ARM][AsmParser] handles offset expression in parentheses adds 89478148d83 Revert "Add support to -Wa,-W in clang" adds 4ec5205da70 Add support to -Wa,-W in clang adds a40162d4753 [Tests] Add a SCEV analysis test for llvm.widenable.condition

No new revisions were added by this update.

Summary of changes: llvm/lib/DebugInfo/DWARF/CMakeLists.txt | 3 - llvm/lib/DebugInfo/DWARF/DWARFDebugLoc.cpp | 1 - llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp | 12 ++-- .../ScalarEvolution/widenable-condition.ll | 45 +++++++++++++++ .../AArch64/GlobalISel/legalize-dyn-alloca.mir | 12 ++-- .../AArch64/GlobalISel/prelegalizercombiner-br.mir | 10 ++-- .../CodeGen/AArch64/GlobalISel/regbank-fma.mir | 8 +-- .../AArch64/GlobalISel/select-jump-table-brjt.mir | 10 ++-- .../CodeGen/AMDGPU/GlobalISel/legalize-fadd.mir | 18 +++--- .../CodeGen/AMDGPU/GlobalISel/legalize-fcmp.mir | 24 ++++---- .../AMDGPU/GlobalISel/legalize-fcopysign.mir | 36 ++++++------ .../CodeGen/AMDGPU/GlobalISel/legalize-fcos.mir | 22 ++++---- .../CodeGen/AMDGPU/GlobalISel/legalize-fmaxnum.mir | 66 +++++++++++----------- .../CodeGen/AMDGPU/GlobalISel/legalize-fminnum.mir | 66 +++++++++++----------- .../CodeGen/AMDGPU/GlobalISel/legalize-fmul.mir | 18 +++--- .../CodeGen/AMDGPU/GlobalISel/legalize-fpext.mir | 12 ++-- .../CodeGen/AMDGPU/GlobalISel/legalize-fsin.mir | 22 ++++---- .../CodeGen/AMDGPU/GlobalISel/legalize-fsub.mir | 30 +++++----- .../legalize-intrinsic-amdgcn-fdiv-fast.mir | 16 +++--- .../Mips/GlobalISel/legalizer/dyn_stackalloc.mir | 4 +- llvm/test/MC/ARM/gas-compl-mem-offset-paren.s | 20 +++++++ llvm/utils/update_mir_test_checks.py | 7 ++- 22 files changed, 264 insertions(+), 198 deletions(-) create mode 100644 llvm/test/Analysis/ScalarEvolution/widenable-condition.ll create mode 100644 llvm/test/MC/ARM/gas-compl-mem-offset-paren.s