This is an automated email from the git hooks/post-receive script.
unknown user pushed a change to branch master in repository llvm.
from 383b68fd7f3 [LoopUnrollRuntime] Use SCEV exit count for calculating tri [...] new 64db11515ac [AArch64] Update successor probabilities after ccmp-conversion new 06ed4a14fdc [AMDGPU] SDWA: several fixes for V_CVT and VOPC instructions new d88e02ecb78 Updated and extended the information about each instruction [...]
The 3 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference.
Summary of changes: lib/Target/AArch64/AArch64ConditionalCompares.cpp | 48 +- lib/Target/AMDGPU/AMDGPU.td | 6 +- lib/Target/AMDGPU/AMDGPUSubtarget.cpp | 2 +- lib/Target/AMDGPU/AMDGPUSubtarget.h | 6 +- .../AMDGPU/Disassembler/AMDGPUDisassembler.cpp | 4 +- lib/Target/AMDGPU/SIInstrInfo.cpp | 14 +- lib/Target/AMDGPU/SIPeepholeSDWA.cpp | 44 +- lib/Target/X86/X86SchedHaswell.td | 4605 +++++++++++++------- lib/Target/X86/X86SchedSandyBridge.td | 2308 +++++++++- test/CodeGen/AArch64/arm64-ccmp.ll | 6 +- test/CodeGen/AArch64/ccmp-successor-probs.mir | 46 + test/CodeGen/AMDGPU/sdwa-peephole-instr.mir | 446 ++ test/CodeGen/AMDGPU/select-vectors.ll | 2 +- test/CodeGen/X86/avx-schedule.ll | 808 ++-- test/CodeGen/X86/avx2-intrinsics-x86.ll | 6 +- test/CodeGen/X86/avx2-schedule.ll | 58 +- test/CodeGen/X86/avx2-vector-shifts.ll | 44 +- test/CodeGen/X86/avx512-cmp.ll | 4 +- test/CodeGen/X86/avx512-cvt.ll | 54 +- test/CodeGen/X86/avx512-insert-extract.ll | 166 +- test/CodeGen/X86/avx512-intrinsics-upgrade.ll | 4 +- test/CodeGen/X86/avx512-mask-op.ll | 646 ++- test/CodeGen/X86/avx512-vec-cmp.ll | 97 +- test/CodeGen/X86/avx512bw-intrinsics-upgrade.ll | 1480 ++++--- test/CodeGen/X86/avx512bwvl-intrinsics-upgrade.ll | 128 +- test/CodeGen/X86/bitcast-and-setcc-256.ll | 2 +- .../extractelement-legalization-store-ordering.ll | 48 +- test/CodeGen/X86/fp128-i128.ll | 2 +- test/CodeGen/X86/gather-addresses.ll | 17 +- test/CodeGen/X86/half.ll | 1045 ++++- test/CodeGen/X86/illegal-bitfield-loadstore.ll | 34 +- test/CodeGen/X86/mul-constant-i32.ll | 206 +- test/CodeGen/X86/mul-constant-i64.ll | 132 +- test/CodeGen/X86/pr32329.ll | 2 +- test/CodeGen/X86/recip-fastmath.ll | 224 +- test/CodeGen/X86/recip-fastmath2.ll | 442 +- test/CodeGen/X86/sse-schedule.ll | 466 +- test/CodeGen/X86/sse2-schedule.ll | 1108 ++--- test/CodeGen/X86/sse3-schedule.ll | 88 +- test/CodeGen/X86/sse41-schedule.ll | 432 +- test/CodeGen/X86/sse42-schedule.ll | 70 +- test/CodeGen/X86/ssse3-schedule.ll | 134 +- test/CodeGen/X86/vector-shift-ashr-512.ll | 12 +- test/CodeGen/X86/vector-shuffle-512-v32.ll | 12 +- 44 files changed, 10174 insertions(+), 5334 deletions(-) create mode 100644 test/CodeGen/AArch64/ccmp-successor-probs.mir create mode 100644 test/CodeGen/AMDGPU/sdwa-peephole-instr.mir