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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_cross/gnu-release-arm-check_cross in repository toolchain/ci/glibc.

from afc53d52dc AArch64: Align ENTRY to a cacheline adds ade1fa24e3 AArch64: Add optimized Q-register memcpy

No new revisions were added by this update.

Summary of changes: sysdeps/aarch64/multiarch/Makefile | 2 +- sysdeps/aarch64/multiarch/ifunc-impl-list.c | 2 + sysdeps/aarch64/multiarch/memcpy.c | 5 +- sysdeps/aarch64/multiarch/memcpy_advsimd.S | 247 ++++++++++++++++++++++++++++ sysdeps/aarch64/multiarch/memmove.c | 3 +- 5 files changed, 255 insertions(+), 4 deletions(-) create mode 100644 sysdeps/aarch64/multiarch/memcpy_advsimd.S