This is an automated email from the git hooks/post-receive script.
unknown user pushed a change to branch master in repository llvm.
from 2b1c1c1 Define a module map entry for ProfileData. new 3d35f0d [MIR] Print on the given output instead of stderr.
The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference.
Summary of changes: lib/CodeGen/LLVMTargetMachine.cpp | 2 +- test/CodeGen/AArch64/branch-folder-merge-mmos.ll | 2 +- test/CodeGen/AArch64/stackmap-frame-setup.ll | 4 ++-- test/CodeGen/AMDGPU/detect-dead-lanes.mir | 2 +- test/CodeGen/AMDGPU/indirect-addressing-undef.mir | 2 +- test/CodeGen/AMDGPU/rename-independent-subregs.mir | 2 +- test/CodeGen/AMDGPU/si-instr-info-correct-implicit-operands.ll | 2 +- test/CodeGen/ARM/thumb1-ldst-opt.ll | 2 +- test/CodeGen/MIR/AArch64/cfi-def-cfa.mir | 2 +- test/CodeGen/MIR/AArch64/machine-dead-copy.mir | 2 +- test/CodeGen/MIR/AArch64/machine-scheduler.mir | 2 +- test/CodeGen/MIR/AArch64/multiple-lhs-operands.mir | 2 +- test/CodeGen/MIR/AArch64/stack-object-local-offset.mir | 2 +- test/CodeGen/MIR/AArch64/target-flags.mir | 2 +- test/CodeGen/MIR/AMDGPU/target-index-operands.mir | 2 +- test/CodeGen/MIR/ARM/ARMLoadStoreDBG.mir | 2 +- test/CodeGen/MIR/ARM/bundled-instructions.mir | 2 +- test/CodeGen/MIR/ARM/cfi-same-value.mir | 2 +- test/CodeGen/MIR/ARM/imm-peephole-arm.mir | 2 +- test/CodeGen/MIR/ARM/imm-peephole-thumb.mir | 2 +- test/CodeGen/MIR/Generic/basic-blocks.mir | 2 +- test/CodeGen/MIR/Generic/frame-info.mir | 2 +- test/CodeGen/MIR/Generic/llvmIR.mir | 2 +- test/CodeGen/MIR/Generic/llvmIRMissing.mir | 2 +- .../MIR/Generic/machine-basic-block-ir-block-reference.mir | 2 +- test/CodeGen/MIR/Generic/machine-function.mir | 2 +- test/CodeGen/MIR/Generic/multiRunPass.mir | 8 ++++---- test/CodeGen/MIR/Generic/register-info.mir | 2 +- test/CodeGen/MIR/Hexagon/anti-dep-partial.mir | 2 +- test/CodeGen/MIR/Lanai/peephole-compare.mir | 2 +- test/CodeGen/MIR/Mips/memory-operands.mir | 2 +- test/CodeGen/MIR/NVPTX/floating-point-immediate-operands.mir | 2 +- test/CodeGen/MIR/PowerPC/unordered-implicit-registers.mir | 2 +- test/CodeGen/MIR/X86/basic-block-liveins.mir | 2 +- test/CodeGen/MIR/X86/block-address-operands.mir | 2 +- test/CodeGen/MIR/X86/callee-saved-info.mir | 2 +- test/CodeGen/MIR/X86/cfi-def-cfa-offset.mir | 2 +- test/CodeGen/MIR/X86/cfi-def-cfa-register.mir | 2 +- test/CodeGen/MIR/X86/cfi-offset.mir | 2 +- test/CodeGen/MIR/X86/constant-pool.mir | 2 +- test/CodeGen/MIR/X86/dead-register-flag.mir | 2 +- test/CodeGen/MIR/X86/early-clobber-register-flag.mir | 2 +- test/CodeGen/MIR/X86/external-symbol-operands.mir | 2 +- test/CodeGen/MIR/X86/fixed-stack-memory-operands.mir | 2 +- test/CodeGen/MIR/X86/fixed-stack-objects.mir | 2 +- test/CodeGen/MIR/X86/frame-info-save-restore-points.mir | 2 +- test/CodeGen/MIR/X86/frame-info-stack-references.mir | 2 +- test/CodeGen/MIR/X86/frame-setup-instruction-flag.mir | 2 +- test/CodeGen/MIR/X86/function-liveins.mir | 2 +- test/CodeGen/MIR/X86/generic-virtual-registers.mir | 2 +- test/CodeGen/MIR/X86/global-value-operands.mir | 2 +- test/CodeGen/MIR/X86/immediate-operands.mir | 2 +- test/CodeGen/MIR/X86/implicit-register-flag.mir | 2 +- test/CodeGen/MIR/X86/inline-asm-registers.mir | 2 +- test/CodeGen/MIR/X86/instructions-debug-location.mir | 2 +- test/CodeGen/MIR/X86/jump-table-info.mir | 2 +- test/CodeGen/MIR/X86/killed-register-flag.mir | 2 +- test/CodeGen/MIR/X86/liveout-register-mask.mir | 2 +- test/CodeGen/MIR/X86/machine-basic-block-operands.mir | 2 +- test/CodeGen/MIR/X86/machine-instructions.mir | 2 +- test/CodeGen/MIR/X86/memory-operands.mir | 2 +- test/CodeGen/MIR/X86/metadata-operands.mir | 2 +- test/CodeGen/MIR/X86/named-registers.mir | 2 +- test/CodeGen/MIR/X86/newline-handling.mir | 2 +- test/CodeGen/MIR/X86/null-register-operands.mir | 2 +- test/CodeGen/MIR/X86/register-mask-operands.mir | 2 +- test/CodeGen/MIR/X86/simple-register-allocation-hints.mir | 2 +- test/CodeGen/MIR/X86/spill-slot-fixed-stack-objects.mir | 2 +- test/CodeGen/MIR/X86/stack-object-debug-info.mir | 2 +- test/CodeGen/MIR/X86/stack-object-operands.mir | 2 +- test/CodeGen/MIR/X86/stack-objects.mir | 2 +- test/CodeGen/MIR/X86/subregister-index-operands.mir | 2 +- test/CodeGen/MIR/X86/subregister-operands.mir | 2 +- test/CodeGen/MIR/X86/successor-basic-blocks-weights.mir | 2 +- test/CodeGen/MIR/X86/successor-basic-blocks.mir | 2 +- test/CodeGen/MIR/X86/undef-register-flag.mir | 2 +- test/CodeGen/MIR/X86/used-physical-register-info.mir | 2 +- test/CodeGen/MIR/X86/variable-sized-stack-objects.mir | 2 +- test/CodeGen/MIR/X86/virtual-registers.mir | 2 +- test/CodeGen/PowerPC/no-rlwimi-trivial-commute.mir | 2 +- test/CodeGen/PowerPC/opt-sub-inst-cr0-live.mir | 2 +- test/CodeGen/PowerPC/stackmap-frame-setup.ll | 4 ++-- test/CodeGen/X86/eflags-copy-expansion.mir | 2 +- test/CodeGen/X86/expand-vr64-gr64-copy.mir | 2 +- test/CodeGen/X86/fixup-bw-copy.mir | 2 +- test/CodeGen/X86/implicit-null-checks.mir | 2 +- test/CodeGen/X86/machine-combiner-int.ll | 2 +- test/CodeGen/X86/machine-copy-prop.mir | 2 +- test/CodeGen/X86/patchpoint-verifiable.mir | 2 +- test/CodeGen/X86/pr27681.mir | 2 +- test/CodeGen/X86/stackmap-frame-setup.ll | 4 ++-- test/CodeGen/X86/update-terminator.mir | 2 +- .../X86/virtual-registers-cleared-in-machine-functions-liveins.ll | 4 ++-- test/DebugInfo/MIR/X86/live-debug-values-3preds.mir | 2 +- test/DebugInfo/MIR/X86/live-debug-values.mir | 2 +- test/DebugInfo/X86/bbjoin.ll | 2 +- test/DebugInfo/X86/float_const_loclist.ll | 2 +- test/DebugInfo/X86/safestack-byval.ll | 2 +- test/DebugInfo/X86/single-dbg_value.ll | 2 +- tools/llc/llc.cpp | 2 +- 100 files changed, 107 insertions(+), 107 deletions(-)