This is an automated email from the git hooks/post-receive script.
tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-mainline-allmodconfig in repository toolchain/ci/linux.
from 63623fd44972 Merge tag 'for-linus' of git://git.kernel.org/pub/scm/virt [...] adds d3f703c4359f mips: vdso: fix 'jalr t9' crash in vdso code adds 07015d7a103c MIPS: Disable VDSO time functionality on microMIPS adds 976c23af3ee5 mips: vdso: add build time check that no 'jalr t9' calls left adds 97e914b7de3c MIPS: cavium_octeon: Fix syncw generation. adds bef8e2dfceed MIPS: VPE: Fix a double free and a memory leak in 'release_vpe()' adds 72cf3b3df423 MIPS: vdso: Wrap -mexplicit-relocs in cc-option adds eb41113870c9 MIPS: X1000: Fix clock of watchdog node. adds 11479e8e3cd8 MIPS: ingenic: DTS: Fix watchdog nodes adds 3234f4ed3066 MAINTAINERS: Hand MIPS over to Thomas adds d67f250e9634 Merge branch 'mips-fixes' of git://git.kernel.org/pub/scm/ [...] adds c68a9032299e riscv: set pmp configuration if kernel is running in M-mode adds 6a1ce99dc4bd RISC-V: Don't enable all interrupts in trap_init() adds e7167043ee50 riscv: Fix gitignore adds a0a31fd84f8f riscv: allocate a complete page size for each page table adds 8458ca147c20 riscv: adjust the indent adds c5f86891185c Merge tag 'riscv-for-linux-5.6-rc4' of git://git.kernel.or [...]
No new revisions were added by this update.
Summary of changes: CREDITS | 5 ++++ MAINTAINERS | 6 ++-- arch/mips/boot/dts/ingenic/jz4740.dtsi | 17 ++++++----- arch/mips/boot/dts/ingenic/jz4780.dtsi | 17 ++++++----- arch/mips/boot/dts/ingenic/x1000.dtsi | 6 ++-- arch/mips/include/asm/sync.h | 4 ++- arch/mips/kernel/vpe.c | 2 +- arch/mips/vdso/Makefile | 28 ++++++++++++++++-- arch/riscv/boot/.gitignore | 2 ++ arch/riscv/include/asm/csr.h | 12 ++++++++ arch/riscv/kernel/head.S | 6 ++++ arch/riscv/kernel/traps.c | 4 +-- arch/riscv/mm/kasan_init.c | 53 ++++++++++++++++++++-------------- 13 files changed, 109 insertions(+), 53 deletions(-)