This is an automated email from the git hooks/post-receive script.

tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-next-allmodconfig in repository toolchain/ci/llvm-project.

from 0a29028072f Recommit r363298 "[lit] Disable test on darwin when buildin [...] adds 186ca60e512 add header to help with template testing adds b3fc9fde2c7 Fix gcc-05.4 bot failures caused by in r363481 "[clangd] In [...] adds f6db5342240 gn build: Merge r363444 adds a552508841a [clangd] Type hierarchy subtypes adds fcffc2faccf [X86] CombineShuffleWithExtract - handle cases with differe [...] adds d14389c0a55 [x86] split 256-bit vector selects if operands are vector concats adds 9ff09d49dae [analyzer][NFC] Tease apart and clang-format NoStoreFuncVisitor adds 33b46a6df0b [analyzer] Track indices of arrays adds c8d88ad1a91 [CodeGenPrepare][x86] shift both sides of a vector select w [...] adds e20b388e2f9 [analyzer] Push correct version of 'Track indices of arrays' adds 52500216727 [AMDGPU] gfx10 conditional registers handling adds 490e83cd438 AMDGPU/GFX10: Support DLC bit in llvm.amdgcn.s.buffer.load [...] adds 4d4ef2a1671 [analyzer] ReturnVisitor: more portable test case adds 6d71be4e67e AMDGPU: Be explicit about whether the high-word in SI_PC_AD [...] adds 41abf2766e2 AMDGPU: Prepare for explicit absolute relocations in code g [...] adds 3a92aa29992 [docs] Fix a few problems with clang-tool docs to get the b [...] adds 2da0b89d92f [AsmPrinter] Make EmitLinkage and EmitVisibility public adds 9d8c94dfd76 [docs] Fix another bot warning by adding a blank line to se [...] adds 9b2d96024ae [docs] Fix another bot error by setting highlight language [...] new 5a663bd77ac [InstSimplify] Fix addo/subo undef folds (PR42209)

The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference.

Summary of changes: clang-tools-extra/clangd/ClangdServer.cpp | 11 +- clang-tools-extra/clangd/FindSymbols.cpp | 60 +- clang-tools-extra/clangd/FindSymbols.h | 5 + clang-tools-extra/clangd/XRefs.cpp | 54 +- clang-tools-extra/clangd/XRefs.h | 6 +- clang-tools-extra/clangd/index/FileIndex.cpp | 3 +- clang-tools-extra/clangd/test/type-hierarchy.test | 31 +- .../clangd/unittests/TypeHierarchyTests.cpp | 154 ++++- clang-tools-extra/docs/ReleaseNotes.rst | 5 +- .../clang-tidy/checks/android-cloexec-pipe.rst | 1 + .../cppcoreguidelines-pro-type-member-init.rst | 1 + clang/docs/ReleaseNotes.rst | 2 +- .../StaticAnalyzer/Core/BugReporterVisitors.cpp | 729 +++++++++++---------- .../Analysis/diagnostics/track_subexpressions.cpp | 64 ++ .../inlining/placement-new-fp-suppression.cpp | 3 +- libcxx/test/support/template_cost_testing.h | 36 + llvm/include/llvm/CodeGen/AsmPrinter.h | 14 +- llvm/include/llvm/IR/IntrinsicsAMDGPU.td | 2 +- llvm/include/llvm/MC/MCExpr.h | 2 + llvm/lib/Analysis/InstructionSimplify.cpp | 19 +- llvm/lib/CodeGen/CodeGenPrepare.cpp | 45 +- llvm/lib/MC/MCExpr.cpp | 4 + llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp | 20 +- llvm/lib/Target/AMDGPU/AMDGPUMCInstLower.cpp | 13 +- llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h | 4 + .../Target/AMDGPU/MCTargetDesc/SIMCCodeEmitter.cpp | 8 +- llvm/lib/Target/AMDGPU/SIFrameLowering.cpp | 22 +- llvm/lib/Target/AMDGPU/SIISelLowering.cpp | 135 +++- llvm/lib/Target/AMDGPU/SIISelLowering.h | 2 +- llvm/lib/Target/AMDGPU/SIInsertSkips.cpp | 20 +- llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp | 6 +- llvm/lib/Target/AMDGPU/SIInstrInfo.cpp | 225 +++++-- llvm/lib/Target/AMDGPU/SIInstrInfo.h | 9 +- llvm/lib/Target/AMDGPU/SIInstrInfo.td | 3 +- llvm/lib/Target/AMDGPU/SIInstructions.td | 7 +- llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp | 7 +- llvm/lib/Target/AMDGPU/SILowerControlFlow.cpp | 81 ++- llvm/lib/Target/AMDGPU/SILowerI1Copies.cpp | 68 +- llvm/lib/Target/AMDGPU/SIOptimizeExecMasking.cpp | 87 ++- .../Target/AMDGPU/SIOptimizeExecMaskingPreRA.cpp | 51 +- llvm/lib/Target/AMDGPU/SIPeepholeSDWA.cpp | 5 +- llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp | 29 +- llvm/lib/Target/AMDGPU/SIRegisterInfo.h | 15 + llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp | 25 +- llvm/lib/Target/AMDGPU/SIWholeQuadMode.cpp | 50 +- llvm/lib/Target/AMDGPU/SMInstructions.td | 14 +- llvm/lib/Target/X86/X86ISelLowering.cpp | 70 +- llvm/test/CodeGen/AMDGPU/llvm.memcpy.ll | 2 +- .../CodeGen/AMDGPU/mubuf-legalize-operands.mir | 285 +++++--- .../AMDGPU/no-initializer-constant-addrspace.ll | 2 +- llvm/test/CodeGen/AMDGPU/smrd-gfx10.ll | 37 ++ llvm/test/CodeGen/AMDGPU/smrd.ll | 85 +-- llvm/test/CodeGen/MIR/AMDGPU/target-flags.mir | 4 +- .../CodeGen/X86/avx512-shuffles/partial_permute.ll | 30 +- llvm/test/CodeGen/X86/cast-vsel.ll | 59 +- llvm/test/CodeGen/X86/known-signbits-vector.ll | 40 +- .../CodeGen/X86/vector-shift-by-select-loop.ll | 374 ++++++----- llvm/test/CodeGen/X86/vector-shift-lshr-128.ll | 100 +-- llvm/test/CodeGen/X86/vselect-avx.ll | 11 +- .../Transforms/CodeGenPrepare/X86/vec-shift.ll | 49 +- llvm/test/Transforms/InstCombine/with_overflow.ll | 1 + llvm/test/Transforms/InstSimplify/call.ll | 16 +- .../llvm/lib/ExecutionEngine/JITLink/BUILD.gn | 1 + 63 files changed, 2170 insertions(+), 1153 deletions(-) create mode 100644 libcxx/test/support/template_cost_testing.h create mode 100644 llvm/test/CodeGen/AMDGPU/smrd-gfx10.ll