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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-stable-allnoconfig in repository toolchain/ci/llvm-project.
from 73f255b83ad [TargetLowering] Add getBooleanContents contents check to " [...] adds f067dd839ec [LegalizeTypes] When promoting BITREVERSE/BSWAP don't take [...] adds 85a2146c155 [SDAG] fold insert_vector_elt with undef index adds faee39baa87 PR43762: when implicitly changing the active union member f [...] adds 06d3fce01d4 PR43400: Add test that we can instantiate a friend function [...] adds 32837a60ac4 [lit] Drop the user-site packages directory from search pat [...] adds 418d1ea555c PM: silence `-Wpessimizing-move` from GCC 9.2.1 (NFC) adds 40b0fa7ef21 [LLDB][formatters] ArgInfo::count -> ArgInfo::max_positional_args adds 9b0b626d2c1 Use isConvergent helper instead of directly checking attribute adds 7af8d5267b3 [X86] Use 64-bit version of source register in LowerPATCHAB [...] adds 40ab8ae9fb7 OpenMP: Add helper function for convergent runtime calls adds 56a503bdba9 OpenMP: Add convergent to more runtime functions adds 525169efd1e TableGen: Use enum names in composeSubRegIndices table adds 39eef2cbb6a PR43775: don't produce a bogus 'auto' -Wc++98-compat warnin [...] adds 1a9c01c7f6c [clangd] Pass ExtraArgs to TestTU in TweakIsAvailable matcher adds a4facd355dc [c++20] Enforce rule that a union-like class or class with [...] adds 5ab9a850f6b [clangd] Reland DefineInline action availability checks adds 2aa955411a5 gn build: Merge 5ab9a850f6b adds 657e4240b15 [X86] Fix 48/96 byte memcmp code gen adds 3d65def1fd2 [clangd] Reland DefineInline action apply logic with fully [...] adds f4d7caf6df8 [clangd] Reland Store Index in Tweak::Selection adds 7f19dd1ebff [llvm-objcopy][MachO] Implement --only-section adds d9971d0b2e3 [clangd] Do not insert parentheses when completing a using [...] adds da68fd8f816 Fix https://bugs.llvm.org/show_bug.cgi?id=43791 adds 7214f7a79f4 [RISCV] Lower llvm.trap and llvm.debugtrap adds da720a38b9f [AArch64][SVE] Implement masked load intrinsics adds 5d35b7d9e1a [ARM][AArch64] Implement __arm_rsrf, __arm_rsrf64, __arm_ws [...] adds c814f4c4592 [clangd] Do not highlight keywords in semantic highlighting adds 3cb5764f900 [clangd] Flush streams when printing HoverInfo Name and Definition adds f6e11a36c49 [ARM][AArch64] Implement __cls, __clsl and __clsll intrins [...] adds a483302fbef minor doc typo fix / testing github commit adds ba2c6255310 [Codegen][ARM] Add float softening for cbrt adds b8042dbe2bb [AMDGPU][MC][GFX10] Added v_interp_[p1/p2/mov]_f32_e64 adds ee50590e168 [DebugInfo] MachineSink: Insert undef DBG_VALUEs when sinki [...] adds f2e93d10fe0 [CVP] prevent propagating poison when substituting edge val [...] adds 4c430a7c6f6 [clangd] Do not report anonymous entities in findExplicitRe [...] adds d2ec416c7ba [InstCombine][NFC] Tests for uadd.sat and sadd.sat canonica [...] adds 35cb3ee4ca4 [AArch64][Builtins] Avoid unnecessary cache cleaning adds 1ebd4a2e3ad [DAGCombiner] widen any_ext of popcount based on target support adds f5e1b718a67 [DebugInfo] MachineSink: find more DBG_VALUEs to sink adds b911d2db5dd lld/COFF: Simplify getOutputPath() using sys::path functions. adds d7941a6ab97 [LIBOMPTARGET]Fix build, NFC. adds 265ddc57579 Precommit AArch64 test for -consider-local-interval-cost adds a233e7d7cb6 [AArch64] Fix unannotated fall-through between switch labels adds d157a9bc8ba Add Windows Control Flow Guard checks (/guard:cf). adds bf21f0d489f [InstCombine] Extra combine for uadd_sat adds e4d6f1300fa [LiveIntervalUnion] Expose extraction of last index in map [...] adds a062856bcf4 [NFC] Comment endif to test commit access adds bd879161094 [clang] Add no_builtin attribute adds 93a3128a67c Remove extra ';'. NFCI. adds 6f2de9cbb37 [scudo][standalone] Consolidate lists adds 582e3c09d48 [AIX] Refactor AIX Call Lowering to use CCState. NFCI. adds 6336317e0a3 [Docs] Disable Python docs when LLDB_DISABLE_PYTHON is set adds 2ddd1564a9c [lit] Make main.py a pure Python module adds d11b93ec6ac AMDGPU: Avoid overwriting saved PC adds 80cb2cecc65 [utils] InlineFunction: fix for debug info affecting optimizations adds 7c860698208 [OPENMP]Fix PR43771: Do not capture contexprs variables. adds 3f345732b4f Add missing lld checks in sanitizer tests. new 18824d25d8a [LV] Interleaving should not exceed estimated loop trip count. new 70f5aecedef Reland [AArch64][DebugInfo] Do not recompute CalleeSavedSta [...] new 6d63bf91948 [IR] Use UnaryOperator::CreateFNeg in NoFolder::createFNeg new e6102dc5ef8 [lit] Remove redundant comments from main function new da2a4c234dc [Docs] Update source code link to Github new 8aa0a785c42 gn build: (manually) merge d157a9bc
The 6 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference.
Summary of changes: clang-tools-extra/clangd/ClangdServer.cpp | 2 +- clang-tools-extra/clangd/CodeComplete.cpp | 20 +- clang-tools-extra/clangd/FindTarget.cpp | 11 +- clang-tools-extra/clangd/SemanticHighlighting.cpp | 20 +- clang-tools-extra/clangd/XRefs.cpp | 2 + clang-tools-extra/clangd/refactor/Tweak.cpp | 8 +- clang-tools-extra/clangd/refactor/Tweak.h | 6 +- .../clangd/refactor/tweaks/CMakeLists.txt | 1 + .../clangd/refactor/tweaks/DefineInline.cpp | 393 +++++++++++ .../clangd/test/semantic-highlighting.test | 8 +- .../clangd/unittests/CodeCompleteTests.cpp | 42 ++ .../clangd/unittests/FindTargetTests.cpp | 22 +- .../clangd/unittests/SemanticHighlightingTests.cpp | 138 ++-- .../clangd/unittests/TweakTesting.cpp | 45 +- clang-tools-extra/clangd/unittests/TweakTesting.h | 22 +- clang-tools-extra/clangd/unittests/TweakTests.cpp | 727 +++++++++++++++++++- clang/docs/ClangCommandLineReference.rst | 6 +- clang/include/clang/AST/Decl.h | 4 + clang/include/clang/Basic/Attr.td | 7 + clang/include/clang/Basic/AttrDocs.td | 37 + clang/include/clang/Basic/BuiltinsAArch64.def | 2 + clang/include/clang/Basic/BuiltinsARM.def | 2 + clang/include/clang/Basic/CodeGenOptions.def | 1 + clang/include/clang/Basic/DiagnosticGroups.td | 1 + clang/include/clang/Basic/DiagnosticSemaKinds.td | 24 + clang/include/clang/Driver/CC1Options.td | 4 + clang/include/clang/Driver/Options.td | 2 - clang/include/clang/Parse/Parser.h | 6 +- clang/include/clang/Sema/CodeCompleteConsumer.h | 13 +- clang/include/clang/Sema/Sema.h | 3 +- clang/lib/AST/ExprConstant.cpp | 13 +- clang/lib/CodeGen/CGBuiltin.cpp | 21 + clang/lib/CodeGen/CGCall.cpp | 24 +- clang/lib/CodeGen/CGOpenMPRuntimeNVPTX.cpp | 15 +- clang/lib/CodeGen/CodeGenModule.cpp | 17 +- clang/lib/CodeGen/CodeGenModule.h | 15 +- clang/lib/Driver/ToolChains/Clang.cpp | 31 +- clang/lib/Driver/ToolChains/MSVC.cpp | 22 + clang/lib/Frontend/CompilerInvocation.cpp | 1 + clang/lib/Headers/arm_acle.h | 24 + clang/lib/Parse/ParseDeclCXX.cpp | 5 +- clang/lib/Parse/ParseExprCXX.cpp | 13 +- clang/lib/Sema/SemaCodeComplete.cpp | 33 +- clang/lib/Sema/SemaDecl.cpp | 23 + clang/lib/Sema/SemaDeclAttr.cpp | 53 ++ clang/lib/Sema/SemaDeclCXX.cpp | 39 +- clang/lib/Sema/SemaOpenMP.cpp | 6 +- clang/lib/Sema/SemaType.cpp | 2 +- .../class.compare/class.compare.default/p2.cpp | 70 ++ clang/test/CodeGen/arm_acle.c | 67 ++ clang/test/CodeGen/builtins-arm.c | 15 + clang/test/CodeGen/builtins-arm64.c | 17 + clang/test/CodeGen/cfguardtable.c | 14 +- clang/test/CodeGen/no-builtin.cpp | 64 ++ clang/test/Driver/cl-fallback.c | 3 +- clang/test/Driver/cl-options.c | 9 +- ...pragma-attribute-supported-attributes-list.test | 1 + clang/test/OpenMP/constexpr_capture.cpp | 21 + clang/test/OpenMP/nvptx_parallel_codegen.cpp | 16 +- clang/test/Sema/no-builtin.cpp | 51 ++ clang/test/SemaCXX/constant-expression-cxx2a.cpp | 42 ++ clang/test/SemaCXX/cxx98-compat.cpp | 17 + .../SemaTemplate/instantiate-friend-function.cpp | 7 + compiler-rt/lib/builtins/clear_cache.c | 36 +- compiler-rt/lib/scudo/standalone/list.h | 235 ++++--- compiler-rt/lib/scudo/standalone/primary32.h | 4 +- compiler-rt/lib/scudo/standalone/primary64.h | 4 +- compiler-rt/lib/scudo/standalone/quarantine.h | 2 +- compiler-rt/lib/scudo/standalone/release.h | 14 +- compiler-rt/lib/scudo/standalone/secondary.cpp | 23 +- compiler-rt/lib/scudo/standalone/secondary.h | 7 +- compiler-rt/lib/scudo/standalone/stats.h | 32 +- .../lib/scudo/standalone/tests/list_test.cpp | 104 +-- .../lib/scudo/standalone/tests/release_test.cpp | 4 +- compiler-rt/test/asan/CMakeLists.txt | 2 +- compiler-rt/test/cfi/CMakeLists.txt | 2 +- compiler-rt/test/fuzzer/CMakeLists.txt | 2 +- libcxx/include/type_traits | 2 +- lld/COFF/Driver.cpp | 5 +- lldb/docs/CMakeLists.txt | 70 +- lldb/docs/index.rst | 2 +- lldb/scripts/Python/python-wrapper.swig | 16 +- llvm/docs/CommandGuide/llvm-objcopy.rst | 3 + llvm/docs/LangRef.rst | 11 + llvm/docs/ReleaseNotes.rst | 5 + llvm/include/llvm/CodeGen/LiveIntervalUnion.h | 1 + llvm/include/llvm/CodeGen/MachineFunction.h | 15 + llvm/include/llvm/CodeGen/Passes.h | 4 + llvm/include/llvm/CodeGen/SelectionDAG.h | 14 + llvm/include/llvm/CodeGen/TargetCallingConv.h | 8 +- llvm/include/llvm/CodeGen/TargetFrameLowering.h | 8 + llvm/include/llvm/CodeGen/TargetLowering.h | 3 +- llvm/include/llvm/IR/CallingConv.h | 6 + llvm/include/llvm/IR/InstrTypes.h | 5 + llvm/include/llvm/IR/IntrinsicsAArch64.td | 3 + llvm/include/llvm/IR/IntrinsicsARM.td | 3 + llvm/include/llvm/IR/LLVMContext.h | 1 + llvm/include/llvm/IR/NoFolder.h | 2 +- llvm/include/llvm/InitializePasses.h | 2 + llvm/include/llvm/MC/MCObjectFileInfo.h | 2 + llvm/include/llvm/Support/Path.h | 4 +- llvm/include/llvm/Target/TargetCallingConv.td | 5 + llvm/include/llvm/Transforms/CFGuard.h | 26 + llvm/lib/AsmParser/LLLexer.cpp | 1 + llvm/lib/AsmParser/LLParser.cpp | 2 + llvm/lib/AsmParser/LLToken.h | 1 + llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp | 6 +- llvm/lib/CodeGen/AsmPrinter/WinCFGuard.cpp | 22 +- llvm/lib/CodeGen/AsmPrinter/WinCFGuard.h | 9 +- llvm/lib/CodeGen/CFGuardLongjmp.cpp | 119 ++++ llvm/lib/CodeGen/CMakeLists.txt | 1 + llvm/lib/CodeGen/CodeGen.cpp | 1 + llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp | 8 + llvm/lib/CodeGen/LiveDebugValues.cpp | 3 +- llvm/lib/CodeGen/MachineSink.cpp | 152 ++++- llvm/lib/CodeGen/RegUsageInfoCollector.cpp | 4 +- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 45 +- llvm/lib/CodeGen/SelectionDAG/FastISel.cpp | 2 + .../CodeGen/SelectionDAG/LegalizeFloatTypes.cpp | 27 + .../CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp | 19 +- llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h | 2 + llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 13 +- .../CodeGen/SelectionDAG/SelectionDAGBuilder.cpp | 41 +- llvm/lib/CodeGen/TargetFrameLoweringImpl.cpp | 13 + llvm/lib/IR/AsmWriter.cpp | 1 + llvm/lib/IR/LLVMContext.cpp | 5 + llvm/lib/IR/Verifier.cpp | 12 +- llvm/lib/MC/MCObjectFileInfo.cpp | 5 + llvm/lib/Passes/PassBuilder.cpp | 2 +- llvm/lib/Support/CrashRecoveryContext.cpp | 2 +- llvm/lib/Target/AArch64/AArch64CallingConvention.h | 3 + .../lib/Target/AArch64/AArch64CallingConvention.td | 13 + llvm/lib/Target/AArch64/AArch64FastISel.cpp | 2 + llvm/lib/Target/AArch64/AArch64FrameLowering.cpp | 9 +- llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp | 21 + llvm/lib/Target/AArch64/AArch64ISelLowering.cpp | 13 +- llvm/lib/Target/AArch64/AArch64ISelLowering.h | 1 + llvm/lib/Target/AArch64/AArch64InstrInfo.td | 51 ++ .../Target/AArch64/AArch64MachineFunctionInfo.h | 52 +- llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp | 4 + llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td | 38 ++ llvm/lib/Target/AArch64/AArch64TargetMachine.cpp | 9 + .../Target/AArch64/AArch64TargetTransformInfo.h | 15 + llvm/lib/Target/AArch64/LLVMBuild.txt | 2 +- llvm/lib/Target/AArch64/SVEInstrFormats.td | 10 +- llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp | 26 +- llvm/lib/Target/AMDGPU/VOP3Instructions.td | 8 +- llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp | 5 +- llvm/lib/Target/ARM/ARMCallingConv.h | 3 + llvm/lib/Target/ARM/ARMCallingConv.td | 15 + llvm/lib/Target/ARM/ARMFastISel.cpp | 2 + llvm/lib/Target/ARM/ARMFrameLowering.cpp | 6 + llvm/lib/Target/ARM/ARMFrameLowering.h | 2 + llvm/lib/Target/ARM/ARMISelLowering.cpp | 46 ++ llvm/lib/Target/ARM/ARMTargetMachine.cpp | 9 + llvm/lib/Target/ARM/LLVMBuild.txt | 2 +- llvm/lib/Target/PowerPC/PPCISelLowering.cpp | 214 +++--- llvm/lib/Target/RISCV/RISCVISelLowering.cpp | 3 + llvm/lib/Target/RISCV/RISCVInstrInfo.td | 10 + llvm/lib/Target/X86/LLVMBuild.txt | 2 +- llvm/lib/Target/X86/X86AsmPrinter.cpp | 2 +- llvm/lib/Target/X86/X86CallingConv.td | 15 +- llvm/lib/Target/X86/X86FastISel.cpp | 1 + llvm/lib/Target/X86/X86ISelLowering.cpp | 23 +- llvm/lib/Target/X86/X86MCInstLower.cpp | 18 +- llvm/lib/Target/X86/X86RegisterInfo.cpp | 8 + llvm/lib/Target/X86/X86TargetMachine.cpp | 14 + llvm/lib/Transforms/CFGuard/CFGuard.cpp | 307 +++++++++ llvm/lib/Transforms/CFGuard/CMakeLists.txt | 9 + llvm/lib/Transforms/{ => CFGuard}/LLVMBuild.txt | 12 +- llvm/lib/Transforms/CMakeLists.txt | 1 + .../Transforms/InstCombine/InstCombineSelect.cpp | 7 + llvm/lib/Transforms/LLVMBuild.txt | 2 +- .../Scalar/CorrelatedValuePropagation.cpp | 9 +- llvm/lib/Transforms/Scalar/LoopUnswitch.cpp | 2 +- llvm/lib/Transforms/Scalar/Sink.cpp | 2 +- llvm/lib/Transforms/Utils/InlineFunction.cpp | 1 + llvm/lib/Transforms/Vectorize/LoopVectorize.cpp | 24 +- llvm/test/Bitcode/calling-conventions.3.2.ll | 9 + llvm/test/Bitcode/calling-conventions.3.2.ll.bc | Bin 1236 -> 2568 bytes llvm/test/Bitcode/operand-bundles-bc-analyzer.ll | 1 + llvm/test/CodeGen/AArch64/cfguard-checks.ll | 147 ++++ llvm/test/CodeGen/AArch64/cfguard-module-flag.ll | 25 + llvm/test/CodeGen/AArch64/cls.ll | 20 + .../AArch64/ragreedy-local-interval-cost.ll | 393 +++++++++++ .../test/CodeGen/AArch64/sched-past-vector-ldst.ll | 24 +- .../test/CodeGen/AArch64/sve-masked-ldst-nonext.ll | 87 +++ llvm/test/CodeGen/AArch64/sve-masked-ldst-sext.ll | 66 ++ llvm/test/CodeGen/AArch64/sve-masked-ldst-zext.ll | 72 ++ ...g-callee-save-size-after-livedebugvariables.mir | 92 +++ llvm/test/CodeGen/AMDGPU/call-waw-waitcnt.mir | 53 ++ llvm/test/CodeGen/ARM/cfguard-checks.ll | 151 +++++ llvm/test/CodeGen/ARM/cfguard-module-flag.ll | 26 + llvm/test/CodeGen/ARM/cls.ll | 27 + llvm/test/CodeGen/ARM/fp16-promote.ll | 15 + llvm/test/CodeGen/ARM/pow.ll | 16 + llvm/test/CodeGen/PowerPC/aix-byval-param.ll | 16 + llvm/test/CodeGen/PowerPC/aix-nest-param.ll | 13 + llvm/test/CodeGen/PowerPC/aix-sret-param.ll | 15 + llvm/test/CodeGen/PowerPC/aix-stackargs.ll | 12 + llvm/test/CodeGen/PowerPC/popcnt-zext.ll | 8 +- llvm/test/CodeGen/PowerPC/popcnt.ll | 8 +- llvm/test/CodeGen/RISCV/intrinsics/trap.ll | 38 ++ llvm/test/CodeGen/WebAssembly/simd.ll | 48 +- llvm/test/CodeGen/WinCFGuard/cfguard.ll | 5 +- llvm/test/CodeGen/X86/cfguard-checks.ll | 231 +++++++ llvm/test/CodeGen/X86/cfguard-module-flag.ll | 26 + llvm/test/CodeGen/X86/cfguard-x86-64-vectorcall.ll | 38 ++ llvm/test/CodeGen/X86/cfguard-x86-vectorcall.ll | 43 ++ llvm/test/CodeGen/X86/insertelement-var-index.ll | 16 + llvm/test/CodeGen/X86/memcmp.ll | 745 ++------------------- llvm/test/CodeGen/X86/pr43820.ll | 383 +++++++++++ llvm/test/CodeGen/X86/xray-custom-log.ll | 4 +- llvm/test/CodeGen/X86/xray-typed-event-log.ll | 8 +- .../MIR/Mips/live-debug-values-reg-copy.mir | 2 +- .../MIR/X86/live-debug-values-reg-copy.mir | 2 +- llvm/test/DebugInfo/MIR/X86/machinesink.mir | 105 +++ llvm/test/DebugInfo/MIR/X86/postra-subreg-sink.mir | 3 + llvm/test/DebugInfo/MIR/X86/sink-leaves-undef.mir | 105 +++ llvm/test/MC/AMDGPU/gfx10_asm_all.s | 132 ++++ .../test/MC/Disassembler/AMDGPU/gfx10_dasm_all.txt | 132 ++++ .../CorrelatedValuePropagation/phi-common-val.ll | 3 +- .../Inline/inline-skip-use-empty-alloca.ll | 71 ++ .../test/Transforms/InstCombine/overflow_to_sat.ll | 730 ++++++++++++++++++++ .../Transforms/InstCombine/saturating-add-sub.ll | 44 ++ .../LoopVectorize/X86/no_fpmath_with_hotness.ll | 2 +- .../tools/llvm-objcopy/MachO/only-section.test | 153 +++++ llvm/tools/llvm-objcopy/MachO/MachOObjcopy.cpp | 23 +- llvm/tools/llvm-objcopy/MachO/MachOReader.cpp | 1 + llvm/tools/llvm-objcopy/MachO/Object.cpp | 7 + llvm/tools/llvm-objcopy/MachO/Object.h | 4 + llvm/unittests/Support/AlignmentTest.cpp | 2 +- llvm/utils/TableGen/RegisterInfoEmitter.cpp | 2 +- .../clangd/refactor/tweaks/BUILD.gn | 1 + llvm/utils/gn/secondary/llvm/lib/CodeGen/BUILD.gn | 1 + .../gn/secondary/llvm/lib/Target/AArch64/BUILD.gn | 2 + .../gn/secondary/llvm/lib/Target/ARM/BUILD.gn | 2 + .../gn/secondary/llvm/lib/Target/X86/BUILD.gn | 1 + .../secondary/llvm/lib/Transforms/CFGuard/BUILD.gn | 10 + llvm/utils/lit/lit.py | 7 +- llvm/utils/lit/lit/main.py | 33 +- llvm/utils/lit/tests/lit.cfg | 4 + .../deviceRTLs/nvptx/src/target_impl.h | 2 +- 243 files changed, 7596 insertions(+), 1489 deletions(-) create mode 100644 clang-tools-extra/clangd/refactor/tweaks/DefineInline.cpp create mode 100644 clang/test/CXX/class/class.compare/class.compare.default/p2.cpp create mode 100644 clang/test/CodeGen/no-builtin.cpp create mode 100644 clang/test/OpenMP/constexpr_capture.cpp create mode 100644 clang/test/Sema/no-builtin.cpp create mode 100644 llvm/include/llvm/Transforms/CFGuard.h create mode 100644 llvm/lib/CodeGen/CFGuardLongjmp.cpp create mode 100644 llvm/lib/Transforms/CFGuard/CFGuard.cpp create mode 100644 llvm/lib/Transforms/CFGuard/CMakeLists.txt copy llvm/lib/Transforms/{ => CFGuard}/LLVMBuild.txt (71%) create mode 100644 llvm/test/CodeGen/AArch64/cfguard-checks.ll create mode 100644 llvm/test/CodeGen/AArch64/cfguard-module-flag.ll create mode 100644 llvm/test/CodeGen/AArch64/cls.ll create mode 100644 llvm/test/CodeGen/AArch64/ragreedy-local-interval-cost.ll create mode 100644 llvm/test/CodeGen/AArch64/sve-masked-ldst-nonext.ll create mode 100644 llvm/test/CodeGen/AArch64/sve-masked-ldst-sext.ll create mode 100644 llvm/test/CodeGen/AArch64/sve-masked-ldst-zext.ll create mode 100644 llvm/test/CodeGen/AArch64/wrong-callee-save-size-after-livedebu [...] create mode 100644 llvm/test/CodeGen/AMDGPU/call-waw-waitcnt.mir create mode 100644 llvm/test/CodeGen/ARM/cfguard-checks.ll create mode 100644 llvm/test/CodeGen/ARM/cfguard-module-flag.ll create mode 100644 llvm/test/CodeGen/ARM/cls.ll create mode 100644 llvm/test/CodeGen/PowerPC/aix-byval-param.ll create mode 100644 llvm/test/CodeGen/PowerPC/aix-nest-param.ll create mode 100644 llvm/test/CodeGen/PowerPC/aix-sret-param.ll create mode 100644 llvm/test/CodeGen/PowerPC/aix-stackargs.ll create mode 100644 llvm/test/CodeGen/RISCV/intrinsics/trap.ll create mode 100644 llvm/test/CodeGen/X86/cfguard-checks.ll create mode 100644 llvm/test/CodeGen/X86/cfguard-module-flag.ll create mode 100644 llvm/test/CodeGen/X86/cfguard-x86-64-vectorcall.ll create mode 100644 llvm/test/CodeGen/X86/cfguard-x86-vectorcall.ll create mode 100644 llvm/test/CodeGen/X86/pr43820.ll create mode 100644 llvm/test/DebugInfo/MIR/X86/machinesink.mir create mode 100644 llvm/test/DebugInfo/MIR/X86/sink-leaves-undef.mir create mode 100644 llvm/test/Transforms/Inline/inline-skip-use-empty-alloca.ll create mode 100644 llvm/test/Transforms/InstCombine/overflow_to_sat.ll create mode 100644 llvm/test/tools/llvm-objcopy/MachO/only-section.test create mode 100644 llvm/utils/gn/secondary/llvm/lib/Transforms/CFGuard/BUILD.gn