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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-lts-allnoconfig in repository toolchain/ci/llvm-project.

from e5eeb8465f2 Make unittests include path relative adds d0b09f89e0e [NFC][mlir] Adding more operators to EDSC TemplatedIndexedValue adds 32e4e719663 test/CodeGen/AMDGPU: Add a test case that shows a miscompilation adds a24d46318f6 [NFC] Corrected a minor typo in a comment adds 99b03c1c18d Detect and disable openmp tests that require multiple hardw [...] adds d799190851f [ConstantFold] fold fsub -0.0, undef to undef rather than NaN adds b0761bbc763 [DependenceAnalysis] Memory dependence analysis internal ca [...] adds c51b0bede82 [Hexagon] Introduce noop intrinsic to cast between vector p [...] adds 35b685270b4 [mlir] Add a signedness semantics bit to IntegerType adds 86c52af05a6 [TargetLowering] SimplifyDemandedBits - use getValidShiftAm [...] adds d33e96b68c6 [X86] Regenerate hi reg tests adds b55c58a2d56 [Error/unittests] Add a FailedWithMessage gtest matcher adds 4fdaac0e1eb [PowerPC][NFC] Remove Darwin specific logic in frame finalization. adds a49a41e7855 [AST][NFC] Update outdated comments in ASTStructuralEquival [...] adds 175f6e309ab [PowerPC][NFC] Add a test for vrsave usage iinline asm. adds de8793b9184 [lldb/DWARF] Add support for type units in dwp files adds f0c642e8227 Remove unused functions in llvm-ml adds 5125803d344 [mlir] Silence error: call to constructor of 'llvm::APInt' [...] adds b64aa8c7151 AMDGPU/GlobalISel: Fix constant bus violation with source m [...] adds fab4cdea391 AMDGPU/GlobalISel: Select llvm.amdgcn.fmul.legacy adds 79ff188adde AMDGPU/GlobalISel: Legalize G_FPOW adds ac7abe0ba9a AMDGPU/GlobalISel: Manually select G_BUILD_VECTOR_TRUNC adds 83012cb2171 [ARM] Correct Formatting. NFC adds 89dc8fe6222 AMDGPU/GlobalISel: Precommit xnor matching test adds 6ed8e201433 [ELF] Ignore the maximum of input section alignments for two cases adds de0dda54d38 [ELF] Warn changed output section address adds c47e0e2d37d [lldb-vscode] Use libOption with tablegen to parse command [...] adds dbd7281aa77 [ELF] Shuffle .init_array/.fini_array with --shuffle-sections= adds 42ec6fdce92 [TargetLowering] Apply basic shift combines before recursiv [...] adds 043ed2e22ac AMDGPU/GlobalISel: Fix xnor matching adds 6a479220b5e AMDGPU/GlobalISel: Commit test changes I forgot to squash adds cab39e4b8c8 GlobalISel: Fix narrowing of (G_ASHR i64:x, 32) adds 9fff6e823cf [AArch64][SVE] Add +fullfp16 to sve-vector-splat.ll adds 134bab7cd56 [DSE,MSSA] Add debug counter. adds 23444edf30b [AST matchers] Add basic matchers for googletest EXPECT/ASS [...] adds fc4455891c0 [VectorCombine] refactor matching code to reduce duplication; NFC adds db9c40f5624 [AArch64][SVE] Add intrinsics for SVE2 bitwise ternary operations adds 60023e34711 AMDGPU: Use default operand for VOP3P clamp adds 41bd9ead35f [SystemZ] Return scalarized costs for vector instructions [...] adds 8c70a2597f5 [gn build] Port 23444edf30b adds a8db806d52c [SimplifyLibCalls][IRBuilder] Accept any IRBuilder in Simpl [...] adds c90ea87cfd7 [X86] Fix SDLoc initialization adds 98f5268a729 [VectorUtils] Move ToVectorTy to VectorUtils.h (NFC). adds deb0a8bfc49 [DSE,MSSA] Dbg counters required assertions. Mark test acco [...] adds 656dff9af48 [InstCombine] Use replaceOperand() in more places adds e4df934ca7b [Clang interpreter] Rename Block.{h,cpp} to InterpBlock.{h,cpp} adds 0e3e242209c [BFI] Fix missed BFI updates in MachineSink. adds b178555318c [InstCombine] Improve simplify demanded bits worklist management adds 31ec721516b [llvm][CodeGen] DAG Combiner folds for vscale. adds bc7b26c333f [MLIR] Allow Loop dialect IfOp and ForOp to define values adds 6b4a193defb [XCOFF][AIX] Put undefined symbol name into StringTable whe [...] adds 2769fb90f0a [LoopVectorize][X86] Regenerate tests. NFCI. adds 1723f219939 Fix MSVC "not all control paths return a value" warning. NFCI. adds 72eef820d52 AMDGPU/GlobalISel: Select G_SHUFFLE_VECTOR adds dfce5fd50a0 AMDGPU/GlobalISel: Select VOP3P instructions adds 4c1c9422a3a AMDGPU/GlobalISel: Select llvm.amdgcn.fdot2 adds db06870dbd5 AMDGPU: Move dot intrinsic patterns to instruction def adds 07d2cdae116 [lldb/cmake] Enable more verbose find_package output. adds 00955a62e43 AMDGPU/GlobalISel: Fix SALU mapping for v2s16 min/max adds 73d8d83a6d9 [ARM] Change ARMAttributeParser::Parse to use support::endi [...] adds 7dd6a862e5e [libc++] Do not set the `availability=XXX` feature when not [...] adds 266959c0f72 [AArch64][SVE] Add backend support for splats of immediates adds 0781e93a6ea [CodeGen][RISCV] Fix clang/test/CodeGen/atomic_ops.c for RISC-V adds 29ad9d6b26e [mlir][spirv] Add lowering for load/store zero-rank memref [...] adds 042d97eda9f [MLIR] Remove constexpr from LoopOps.td adds d2b7c09e79a [Hexagon] Simplify intrinsic (vandvrt (vandqrt q b) m) -> q [...] adds 69d757c0e8f Move StandardOps/Ops.h to StandardOps/IR/Ops.h adds e2ed1d14d6c [llvm][aarch64] SVE addressing modes. adds 34e3485560c [VectorCombine] refactor cost calcs to reduce duplication; NFC adds 33bf1196475 [llvm][CodeGen][aarch64] Add contiguous prefetch intrinsics [...] adds 446b150065c [IR] Update BasicBlock::validateInstrOrdering comments, NFC adds 8875ee18d72 [X86] Add a new format type for instructions that represent [...] adds 1874dee5662 [macho][NFC] Extract all CPU_(SUB_)TYPE logic to BinaryFormat adds 0bb90628b5f Allow customized relative PYTHONHOME adds 8fa776b8ed0 [gn build] Port 1874dee5662 adds e9c79a7aef1 [VectorCombine] refactor to reduce duplicated code; NFC adds b72f1448ce4 AMDGPU/GlobalISel: Better code for one case of G_SHUFFLE_VE [...] adds a5b22b768f5 [AArch64][SVE] Add support for DestructiveBinary and Destru [...] adds dc046c70de9 [llvm-objcopy][MachO] Change the storage of sections adds 1f04d1b7069 [lldb/test] Move `platform process list` tests to its own d [...] adds d7c403e6404 [lldb/Plugins] Add ability to fetch crash information on cr [...] adds 5c33a81b7a4 [AArch64][SVE] Fix -Wimplicit-fallthrough after D73711 adds a6c8698924d clang/Modules: Finish renaming CompilerInstance::ModuleMana [...] adds 0ad6fc9928d [SelectionDAG] remove unused isFast() helper function; NFC adds fad1c750f16 [AArch64][SVE] Fix -DBUILD_SHARED_LIBS=on builds after -D74 [...] adds fddbff14735 [AArch64] Delete an unneeded dependency on Object after 187 [...] adds d37cbda5f9a [Hexagon] Define __ELF__ by default. adds 0a70edd6962 [CloneFunction] Update loop headers after cloning all block [...] adds 9708279c725 [Attributor][FIX] Undo 16188f9 until SCC iterator bug is fixed adds 618dec2aeff [GISel][KnownBits] Add a cache mechanism to speed compile time adds 528a6a1d4cc [Attributor][FIX] Disable a test to unblock the builders adds a32d539798e [Target] Remove libObject dependency in lib/Target adds 215a31115f8 Revert "Allow customized relative PYTHONHOME" adds 393f4e8ac26 [Analysis][Docs] Parents of loops documentation. adds 26222db01b0 [mlir][DeclarativeParser] Add support for the TypesMatchWit [...] adds 2d0477a0036 [mlir][DeclarativeParser] Add basic support for optional gr [...] adds ca4ea51c0af [mlir][DeclarativeParser] Add an 'attr-dict-with-keyword' d [...] adds 93813e5feb1 [mlir] Add a utility iterator range that repeats a given va [...] adds b1de971ba8c [mlir][ODS] Add support for specifying the successors of an [...] adds 9eb436feaa7 [mlir][DeclarativeParser] Add support for formatting the su [...] adds 0050e8f0cf5 [mlir][Tutorial] Add a section to Toy Ch.2 detailing the cu [...] adds 266877a2a8b [llvm-objdump] Print method name from debug info in disasse [...] adds 75af9da7557 [MC][ELF] Error for sh_type, sh_flags or sh_entsize change adds 8a0f0e2656a [lldb/test] Tweak libcxx string test on Apple+ARM devices adds d3e170c4388 Revert "[AMDGPU] Don’t marke the .note section as ALLOC" adds 42060c0a987 [mlir][DeclarativeParser][NFC] Use explicit type names in T [...] adds 340feac6721 [Driver] Escape the program path for -frecord-command-line adds bf4933b4ea6 AMDGPU/GlobalISel: Remove dead code adds 3ec3f62f0a0 Allow customized relative PYTHONHOME (Attemp 1) adds d17123b2577 [llvm-objdump][test] Fix source-interleave-function-from-de [...] adds 3648370a792 [WebAssembly] Fix a non-determinism problem in FixIrreducib [...] adds e33c9bb245a Flags for displaying only hot nodes in CFGPrinter graph adds ebee1312597 [lldb][test] Fix sh_type of .debug_cu_index and .debug_tu_index adds 1b1a97e9b55 Remove unused variable adds 228a2bc9b70 [X86] Teach combineCVTPH2PS to shrink v8i16 loads when the [...] adds e29065a1053 [lldb][test] Fix sh_flags and sh_entsize of .debug_str.dwo adds a4f45ee73a9 [libc] Lay out framework for fuzzing libc functions. adds b6d63c92ec3 [GISel][KnownBits] Suppress unused warning on the dump method adds 59a572eb742 [Preprocessor][test] Move AArch64 tests from init.c to init [...] adds 0123744d46a [Preprocessor][test] Fix __VERSION__ in init-aarch64.c adds fc6057e34fb [Frontend] Replace CC1 option -mcode-model with -mcmodel= adds d2e949eed5b [AArch64] Predefine __AARCH64_CMODEL_*__ as GCC does adds 271f9647732 [Preprocessor][X86] Fix __code_model_*__ predefine macros adds d192a4ab2b8 Update Quantization.md adds 453cd2dbe57 Update ShapeInference.md adds 635034f1938 [VE][fix] missing include

No new revisions were added by this update.

Summary of changes: clang/include/clang/ASTMatchers/GtestMatchers.h | 45 + clang/include/clang/Driver/CC1Options.td | 2 - clang/include/clang/Driver/Options.td | 2 +- clang/include/clang/Frontend/CompilerInstance.h | 3 +- clang/lib/AST/ASTStructuralEquivalence.cpp | 12 +- clang/lib/AST/CMakeLists.txt | 2 +- .../lib/AST/Interp/{Block.cpp => InterpBlock.cpp} | 2 +- clang/lib/AST/Interp/{Block.h => InterpBlock.h} | 2 +- clang/lib/AST/Interp/Pointer.cpp | 2 +- clang/lib/AST/Interp/Pointer.h | 4 +- clang/lib/ASTMatchers/CMakeLists.txt | 1 + clang/lib/ASTMatchers/GtestMatchers.cpp | 104 ++ clang/lib/Basic/Targets/AArch64.cpp | 7 + clang/lib/Basic/Targets/Hexagon.cpp | 2 + clang/lib/Basic/Targets/X86.cpp | 2 +- clang/lib/Driver/ToolChains/Clang.cpp | 13 +- clang/lib/Frontend/ChainedIncludesSource.cpp | 2 +- clang/lib/Frontend/CompilerInstance.cpp | 4 +- clang/lib/Frontend/CompilerInvocation.cpp | 13 +- clang/lib/Frontend/FrontendAction.cpp | 4 +- clang/test/CodeGen/atomic_ops.c | 55 +- clang/test/CodeGen/codemodels.c | 10 +- clang/test/Driver/clang_f_opts.c | 5 + clang/test/Driver/code-model.c | 15 - clang/test/Driver/mcmodel.c | 14 + clang/test/Preprocessor/aarch64-target-features.c | 3 - clang/test/Preprocessor/hexagon-predefines.c | 5 + clang/test/Preprocessor/init-aarch64.c | 701 ++++++++++ clang/test/Preprocessor/init.c | 1334 +------------------- clang/unittests/ASTMatchers/CMakeLists.txt | 1 + clang/unittests/ASTMatchers/GtestMatchersTest.cpp | 191 +++ compiler-rt/lib/builtins/CMakeLists.txt | 3 +- libc/CMakeLists.txt | 1 + libc/cmake/modules/LLVMLibCRules.cmake | 67 +- libc/docs/fuzzing.rst | 15 + libc/docs/source_layout.rst | 10 +- libc/fuzzing/CMakeLists.txt | 5 + libc/fuzzing/string/CMakeLists.txt | 7 + libc/fuzzing/string/strcpy_fuzz.cpp | 38 + libc/src/signal/linux/raise.cpp | 2 +- libcxx/utils/libcxx/test/config.py | 2 +- lld/ELF/InputFiles.cpp | 3 +- lld/ELF/LinkerScript.cpp | 22 +- lld/ELF/LinkerScript.h | 4 + lld/ELF/Writer.cpp | 40 +- lld/test/ELF/linkerscript/lma-align.test | 12 +- lld/test/ELF/linkerscript/outsections-addr.s | 6 +- lld/test/ELF/linkerscript/section-align2.test | 36 + lld/test/ELF/shuffle-sections-init-fini.s | 62 + lldb/bindings/interface/SBTarget.i | 6 + lldb/cmake/modules/FindLuaAndSwig.cmake | 4 +- lldb/cmake/modules/FindPythonInterpAndLibs.cmake | 8 +- lldb/cmake/modules/LLDBConfig.cmake | 15 +- lldb/include/lldb/API/SBTarget.h | 3 + lldb/include/lldb/Host/Config.h.cmake | 2 + lldb/include/lldb/Target/Platform.h | 21 + lldb/include/lldb/Target/Process.h | 2 +- lldb/source/API/SBTarget.cpp | 26 + lldb/source/Commands/CommandObjectProcess.cpp | 77 +- lldb/source/Commands/Options.td | 5 + .../Plugins/Platform/MacOSX/PlatformDarwin.cpp | 124 ++ .../Plugins/Platform/MacOSX/PlatformDarwin.h | 32 + .../Python/ScriptInterpreterPython.cpp | 32 +- .../Plugins/SymbolFile/DWARF/DWARFContext.cpp | 6 + .../source/Plugins/SymbolFile/DWARF/DWARFContext.h | 2 + .../commands/platform/process/{ => list}/Makefile | 0 .../platform/process/{ => list}/TestProcessList.py | 0 .../commands/platform/process/{ => list}/main.cpp | 0 .../libcxx/string/TestDataFormatterLibcxxString.py | 4 +- .../process_crash_info}/Makefile | 0 .../process_crash_info/TestProcessCrashInfo.py | 97 ++ .../API/functionalities/process_crash_info/main.c | 7 + lldb/test/Shell/SymbolFile/DWARF/dwp-debug-types.s | 211 ++++ lldb/test/Shell/SymbolFile/DWARF/dwp.s | 4 +- lldb/test/Shell/VSCode/TestOptions.test | 8 + lldb/test/Shell/helper/toolchain.py | 1 + lldb/tools/lldb-vscode/CMakeLists.txt | 4 + lldb/tools/lldb-vscode/Options.td | 25 + lldb/tools/lldb-vscode/lldb-vscode.cpp | 105 +- llvm/docs/Extensions.rst | 4 +- llvm/docs/LoopTerminology.rst | 3 + llvm/include/llvm/Analysis/CFGPrinter.h | 5 + llvm/include/llvm/Analysis/LoopInfo.h | 8 + .../llvm/Analysis/MemoryDependenceAnalysis.h | 3 +- llvm/include/llvm/Analysis/VectorUtils.h | 9 + llvm/include/llvm/BinaryFormat/MachO.h | 7 + .../llvm/CodeGen/GlobalISel/GISelKnownBits.h | 3 + .../llvm/CodeGen/MachineBlockFrequencyInfo.h | 2 + llvm/include/llvm/CodeGen/SelectionDAGNodes.h | 6 - llvm/include/llvm/IR/BasicBlock.h | 11 +- llvm/include/llvm/IR/IRBuilder.h | 23 + llvm/include/llvm/IR/IntrinsicsAArch64.td | 17 +- llvm/include/llvm/IR/IntrinsicsHexagon.td | 10 +- llvm/include/llvm/Object/ELFObjectFile.h | 2 +- llvm/include/llvm/Support/ARMAttributeParser.h | 3 +- llvm/include/llvm/Testing/Support/Error.h | 42 + .../llvm/Transforms/Utils/SimplifyLibCalls.h | 4 +- llvm/lib/Analysis/CFGPrinter.cpp | 36 + llvm/lib/Analysis/MemoryDependenceAnalysis.cpp | 29 +- llvm/lib/BinaryFormat/CMakeLists.txt | 1 + llvm/lib/BinaryFormat/MachO.cpp | 101 ++ llvm/lib/CodeGen/CodeGenPrepare.cpp | 3 +- llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp | 4 +- llvm/lib/CodeGen/GlobalISel/GISelKnownBits.cpp | 42 +- llvm/lib/CodeGen/MachineBlockFrequencyInfo.cpp | 6 + llvm/lib/CodeGen/MachineSink.cpp | 7 +- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 39 +- llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp | 93 +- llvm/lib/IR/BasicBlock.cpp | 2 +- llvm/lib/IR/ConstantFold.cpp | 6 +- llvm/lib/MC/MCParser/ELFAsmParser.cpp | 19 +- llvm/lib/MC/MCParser/MasmParser.cpp | 77 +- llvm/lib/MC/XCOFFObjectWriter.cpp | 26 +- llvm/lib/Support/ARMAttributeParser.cpp | 8 +- llvm/lib/Support/YAMLTraits.cpp | 2 +- .../Target/AArch64/AArch64ExpandPseudoInsts.cpp | 183 +++ llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp | 167 +++ llvm/lib/Target/AArch64/AArch64InstrFormats.td | 26 +- llvm/lib/Target/AArch64/AArch64InstrInfo.cpp | 19 + llvm/lib/Target/AArch64/AArch64InstrInfo.h | 31 +- llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td | 217 +++- llvm/lib/Target/AArch64/AArch64TargetMachine.cpp | 3 + .../AArch64/MCTargetDesc/AArch64AsmBackend.cpp | 20 +- .../MCTargetDesc/AArch64MachObjectWriter.cpp | 2 +- llvm/lib/Target/AArch64/MCTargetDesc/LLVMBuild.txt | 2 +- llvm/lib/Target/AArch64/SVEInstrFormats.td | 100 +- llvm/lib/Target/AMDGPU/AMDGPUGISel.td | 4 + llvm/lib/Target/AMDGPU/AMDGPUGlobalISelUtils.cpp | 9 + llvm/lib/Target/AMDGPU/AMDGPUGlobalISelUtils.h | 1 + llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp | 13 - llvm/lib/Target/AMDGPU/AMDGPUInstrInfo.td | 12 +- .../Target/AMDGPU/AMDGPUInstructionSelector.cpp | 311 ++++- llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h | 10 +- llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp | 54 +- llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.h | 1 + llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp | 93 +- .../AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp | 2 +- llvm/lib/Target/AMDGPU/SIInstrInfo.td | 5 +- llvm/lib/Target/AMDGPU/VOP3Instructions.td | 24 +- llvm/lib/Target/AMDGPU/VOP3PInstructions.td | 61 +- llvm/lib/Target/ARM/ARMISelLowering.cpp | 9 +- llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp | 35 +- .../Target/ARM/MCTargetDesc/ARMAsmBackendDarwin.h | 12 +- llvm/lib/Target/ARM/MCTargetDesc/LLVMBuild.txt | 2 +- llvm/lib/Target/ARM/README-Thumb.txt | 2 +- llvm/lib/Target/Hexagon/HexagonISelLowering.cpp | 2 +- llvm/lib/Target/Hexagon/HexagonISelLowering.h | 2 + llvm/lib/Target/Hexagon/HexagonISelLoweringHVX.cpp | 40 +- llvm/lib/Target/PowerPC/MCTargetDesc/LLVMBuild.txt | 2 +- .../Target/PowerPC/MCTargetDesc/PPCAsmBackend.cpp | 8 +- llvm/lib/Target/PowerPC/PPCFrameLowering.cpp | 16 +- .../Target/SystemZ/SystemZTargetTransformInfo.cpp | 261 ++-- llvm/lib/Target/VE/MCTargetDesc/VEMCExpr.cpp | 2 +- .../WebAssemblyFixIrreducibleControlFlow.cpp | 28 +- llvm/lib/Target/X86/MCTargetDesc/LLVMBuild.txt | 2 +- llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp | 306 ++--- llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h | 10 + .../Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp | 2 + llvm/lib/Target/X86/X86ISelLowering.cpp | 22 +- llvm/lib/Target/X86/X86InstrAVX512.td | 17 +- llvm/lib/Target/X86/X86InstrFormats.td | 1 + llvm/lib/Target/X86/X86InstrInfo.td | 10 +- llvm/lib/Target/X86/X86InstrSSE.td | 6 +- llvm/lib/Target/X86/X86InstrSystem.td | 12 +- llvm/lib/Target/X86/X86InstrTSX.td | 4 +- llvm/lib/Transforms/IPO/Attributor.cpp | 8 +- .../Transforms/InstCombine/InstCombineCalls.cpp | 97 +- .../InstCombine/InstCombineSimplifyDemanded.cpp | 4 +- .../InstCombine/InstructionCombining.cpp | 36 +- .../lib/Transforms/Scalar/DeadStoreElimination.cpp | 7 + llvm/lib/Transforms/Utils/CloneFunction.cpp | 7 +- llvm/lib/Transforms/Utils/InjectTLIMappings.cpp | 9 - llvm/lib/Transforms/Utils/SimplifyLibCalls.cpp | 29 +- llvm/lib/Transforms/Vectorize/LoopVectorize.cpp | 9 - llvm/lib/Transforms/Vectorize/VectorCombine.cpp | 213 ++-- llvm/test/Analysis/ConstantFolding/fp-undef.ll | 2 +- .../Analysis/CostModel/SystemZ/oldarch-vectors.ll | 13 + .../MemoryDependenceAnalysis/memdep_with_tbaa.ll | 125 ++ llvm/test/CodeGen/AArch64/O0-pipeline.ll | 1 + llvm/test/CodeGen/AArch64/O3-pipeline.ll | 1 + llvm/test/CodeGen/AArch64/sve-gep.ll | 4 +- .../sve-intrinsics-contiguous-prefetches.ll | 252 ++++ .../AArch64/sve-intrinsics-fp-arith-merging.ll | 261 ++++ ...pred-contiguous-ldst-addressing-mode-reg-imm.ll | 622 +++++++++ ...pred-contiguous-ldst-addressing-mode-reg-reg.ll | 610 +++++++++ ...ed-non-temporal-ldst-addressing-mode-reg-imm.ll | 171 +++ ...ed-non-temporal-ldst-addressing-mode-reg-reg.ll | 145 +++ llvm/test/CodeGen/AArch64/sve-vector-splat.ll | 101 +- llvm/test/CodeGen/AArch64/sve-vscale-combine.ll | 97 ++ llvm/test/CodeGen/AArch64/sve2-bitwise-ternary.ll | 284 +++++ .../AMDGPU/GlobalISel/combine-ashr-narrow.mir | 4 +- .../AMDGPU/GlobalISel/constant-bus-restriction.ll | 67 + llvm/test/CodeGen/AMDGPU/GlobalISel/fmul.v2f16.ll | 542 ++++++++ llvm/test/CodeGen/AMDGPU/GlobalISel/fpow.ll | 619 +++++++++ .../CodeGen/AMDGPU/GlobalISel/inst-select-and.mir | 12 +- .../AMDGPU/GlobalISel/inst-select-ashr.v2s16.mir | 54 +- .../inst-select-build-vector-trunc.v2s16.mir | 272 +++- .../AMDGPU/GlobalISel/inst-select-fadd.s32.mir | 90 +- .../AMDGPU/GlobalISel/inst-select-fadd.s64.mir | 90 +- .../GlobalISel/inst-select-fcanonicalize.mir | 14 +- .../GlobalISel/inst-select-fmaxnum-ieee.v2s16.mir | 11 +- .../GlobalISel/inst-select-fmaxnum.v2s16.mir | 11 +- .../GlobalISel/inst-select-fminnum-ieee.v2s16.mir | 10 +- .../GlobalISel/inst-select-fminnum.v2s16.mir | 10 +- .../AMDGPU/GlobalISel/inst-select-fmul.v2s16.mir | 74 ++ .../AMDGPU/GlobalISel/inst-select-lshr.v2s16.mir | 54 +- .../CodeGen/AMDGPU/GlobalISel/inst-select-or.mir | 8 +- .../AMDGPU/GlobalISel/inst-select-pattern-or3.mir | 12 +- .../AMDGPU/GlobalISel/inst-select-pattern-xor3.mir | 24 +- .../AMDGPU/GlobalISel/inst-select-shl.v2s16.mir | 55 +- .../inst-select-shuffle-vector.v2s16.mir | 740 +++++++++++ .../CodeGen/AMDGPU/GlobalISel/inst-select-xor.mir | 8 +- .../CodeGen/AMDGPU/GlobalISel/legalize-fpow.mir | 306 ++++- .../CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.fdot2.ll | 183 +++ .../AMDGPU/GlobalISel/llvm.amdgcn.fmul.legacy.ll | 136 ++ .../CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.sdot2.ll | 388 ++++++ .../CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.sdot4.ll | 141 +++ .../CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.sdot8.ll | 94 ++ .../CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.udot2.ll | 388 ++++++ .../CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.udot4.ll | 141 +++ .../CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.udot8.ll | 94 ++ .../AMDGPU/GlobalISel/regbankselect-smax.mir | 94 +- .../AMDGPU/GlobalISel/regbankselect-smin.mir | 94 +- .../AMDGPU/GlobalISel/regbankselect-umax.mir | 96 +- .../AMDGPU/GlobalISel/regbankselect-umin.mir | 96 +- llvm/test/CodeGen/AMDGPU/GlobalISel/xnor.ll | 272 ++++ llvm/test/CodeGen/AMDGPU/hsa.ll | 3 +- llvm/test/CodeGen/AMDGPU/skip-if-dead.ll | 35 + .../Hexagon/autohvx/vector-predicate-typecast.ll | 31 + llvm/test/CodeGen/PowerPC/aix-undef-func-call.ll | 20 + llvm/test/CodeGen/PowerPC/vrsave-inline-asm.ll | 42 + llvm/test/CodeGen/X86/h-register-addressing-32.ll | 51 +- llvm/test/CodeGen/X86/h-register-addressing-64.ll | 58 +- llvm/test/CodeGen/X86/machine-sink.ll | 1 + llvm/test/MC/AArch64/SVE2/bsl-diagnostics.s | 12 +- llvm/test/MC/AArch64/SVE2/bsl1n-diagnostics.s | 12 +- llvm/test/MC/AArch64/SVE2/bsl2n-diagnostics.s | 12 +- llvm/test/MC/AArch64/SVE2/nbsl-diagnostics.s | 12 +- llvm/test/MC/ELF/exclude-debug-dwo.s | 14 +- llvm/test/MC/ELF/section-entsize-changed.s | 12 + llvm/test/MC/ELF/section-flags-changed.s | 12 + llvm/test/MC/ELF/section-type-changed.s | 11 + llvm/test/Other/cfg_deopt_unreach.ll | 33 + llvm/test/Transforms/Attributor/liveness.ll | 1 + .../DeadStoreElimination/MSSA/debug-counter.ll | 86 ++ .../Transforms/InstCombine/2010-11-01-lshr-mask.ll | 2 +- .../InstCombine}/Hexagon/lit.local.cfg | 0 .../InstCombine/Hexagon/simplify-hvx-qvq.ll | 82 ++ .../Transforms/InstCombine/simplify-libcalls.ll | 2 +- .../Transforms/LoopVectorize/X86/interleaving.ll | 60 +- .../LoopVectorize/X86/strided_load_cost.ll | 109 +- .../test/tools/llvm-objdump/AMDGPU/source-lines.ll | 1 + .../Hexagon/source-interleave-hexagon.ll | 1 + .../X86/source-interleave-function-from-debug.test | 108 ++ .../llvm-objdump/X86/source-interleave-x86_64.test | 1 + llvm/test/tools/llvm-objdump/embedded-source.test | 1 + llvm/tools/llvm-exegesis/lib/X86/Target.cpp | 1 + .../llvm-objcopy/MachO/MachOLayoutBuilder.cpp | 46 +- llvm/tools/llvm-objcopy/MachO/MachOObjcopy.cpp | 32 +- llvm/tools/llvm-objcopy/MachO/MachOReader.cpp | 16 +- llvm/tools/llvm-objcopy/MachO/MachOWriter.cpp | 42 +- llvm/tools/llvm-objcopy/MachO/Object.cpp | 4 +- llvm/tools/llvm-objcopy/MachO/Object.h | 4 +- llvm/tools/llvm-objdump/llvm-objdump.cpp | 78 +- llvm/tools/llvm-readobj/ELFDumper.cpp | 2 +- llvm/unittests/Support/ARMAttributeParser.cpp | 2 +- llvm/unittests/Support/ErrorTest.cpp | 40 + llvm/utils/TableGen/X86RecognizableInstr.cpp | 3 + llvm/utils/TableGen/X86RecognizableInstr.h | 1 + llvm/utils/gn/secondary/clang/lib/AST/BUILD.gn | 2 +- .../gn/secondary/clang/lib/ASTMatchers/BUILD.gn | 1 + .../secondary/clang/unittests/ASTMatchers/BUILD.gn | 1 + .../gn/secondary/llvm/lib/BinaryFormat/BUILD.gn | 5 +- mlir/docs/LangRef.md | 11 +- mlir/docs/OpDefinitions.md | 103 +- mlir/docs/Quantization.md | 106 +- mlir/docs/Rationale.md | 19 +- mlir/docs/ShapeInference.md | 40 +- mlir/docs/Tutorials/Toy/Ch-2.md | 186 ++- mlir/docs/Tutorials/Toy/Ch-3.md | 32 +- mlir/docs/Tutorials/Toy/Ch-4.md | 32 +- mlir/docs/Tutorials/Toy/Ch-5.md | 14 +- mlir/docs/Tutorials/Toy/Ch-6.md | 10 +- mlir/docs/Tutorials/Toy/Ch-7.md | 68 +- mlir/examples/toy/Ch2/include/toy/Ops.td | 39 +- mlir/examples/toy/Ch2/mlir/Dialect.cpp | 75 ++ mlir/examples/toy/Ch3/include/toy/Ops.td | 47 +- mlir/examples/toy/Ch3/mlir/Dialect.cpp | 75 ++ mlir/examples/toy/Ch4/include/toy/Ops.td | 47 +- mlir/examples/toy/Ch4/mlir/Dialect.cpp | 75 ++ mlir/examples/toy/Ch5/include/toy/Ops.td | 47 +- mlir/examples/toy/Ch5/mlir/Dialect.cpp | 75 ++ mlir/examples/toy/Ch5/mlir/LowerToAffineLoops.cpp | 2 +- mlir/examples/toy/Ch6/include/toy/Ops.td | 45 +- mlir/examples/toy/Ch6/mlir/Dialect.cpp | 75 ++ mlir/examples/toy/Ch6/mlir/LowerToAffineLoops.cpp | 2 +- mlir/examples/toy/Ch6/mlir/LowerToLLVM.cpp | 4 +- mlir/examples/toy/Ch7/include/toy/Ops.td | 64 +- mlir/examples/toy/Ch7/mlir/Dialect.cpp | 75 ++ mlir/examples/toy/Ch7/mlir/LowerToAffineLoops.cpp | 2 +- mlir/examples/toy/Ch7/mlir/LowerToLLVM.cpp | 4 +- .../include/mlir/Dialect/AffineOps/EDSC/Builders.h | 67 +- mlir/include/mlir/Dialect/FxpMathOps/FxpMathOps.td | 18 +- mlir/include/mlir/Dialect/GPU/GPUOps.td | 2 +- mlir/include/mlir/Dialect/LLVMIR/LLVMOpBase.td | 19 + mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td | 31 +- mlir/include/mlir/Dialect/Linalg/EDSC/Builders.h | 2 +- .../mlir/Dialect/Linalg/IR/LinalgStructuredOps.td | 2 +- mlir/include/mlir/Dialect/Linalg/Utils/Utils.h | 2 +- mlir/include/mlir/Dialect/LoopOps/LoopOps.td | 161 ++- .../mlir/Dialect/QuantOps/QuantPredicates.td | 2 +- .../include/mlir/Dialect/QuantOps/UniformSupport.h | 4 +- .../mlir/Dialect/SPIRV/SPIRVControlFlowOps.td | 20 +- .../mlir/Dialect/StandardOps/CMakeLists.txt | 7 +- .../mlir/Dialect/StandardOps/EDSC/Builders.h | 2 +- .../Dialect/StandardOps/{ => IR}/CMakeLists.txt | 0 .../mlir/Dialect/StandardOps/{ => IR}/Ops.h | 10 +- .../mlir/Dialect/StandardOps/{ => IR}/Ops.td | 76 +- mlir/include/mlir/Dialect/VectorOps/VectorOps.td | 14 +- mlir/include/mlir/EDSC/Builders.h | 64 +- mlir/include/mlir/IR/Attributes.h | 20 +- mlir/include/mlir/IR/Builders.h | 5 + mlir/include/mlir/IR/Matchers.h | 2 +- mlir/include/mlir/IR/OpBase.td | 44 +- mlir/include/mlir/IR/OpDefinition.h | 24 +- mlir/include/mlir/IR/OpImplementation.h | 21 + mlir/include/mlir/IR/Operation.h | 2 +- mlir/include/mlir/IR/OperationSupport.h | 5 + mlir/include/mlir/IR/StandardTypes.h | 51 +- mlir/include/mlir/IR/Types.h | 22 +- mlir/include/mlir/InitAllDialects.h | 2 +- mlir/include/mlir/Support/STLExtras.h | 20 + mlir/include/mlir/TableGen/Constraint.h | 2 +- mlir/include/mlir/TableGen/Operator.h | 18 + mlir/include/mlir/TableGen/Successor.h | 44 + mlir/include/mlir/Transforms/Utils.h | 2 +- mlir/lib/Analysis/AffineAnalysis.cpp | 2 +- mlir/lib/Analysis/AffineStructures.cpp | 2 +- mlir/lib/Analysis/NestedMatcher.cpp | 2 +- mlir/lib/Analysis/Utils.cpp | 6 +- .../AffineToStandard/AffineToStandard.cpp | 4 +- .../Conversion/GPUCommon/OpToFuncCallLowering.h | 2 +- .../Conversion/GPUToNVVM/LowerGpuOpsToNVVMOps.cpp | 2 +- .../Conversion/GPUToSPIRV/ConvertGPUToSPIRV.cpp | 9 +- .../GPUToVulkan/ConvertLaunchFuncToVulkanCalls.cpp | 2 +- .../lib/Conversion/LinalgToSPIRV/LinalgToSPIRV.cpp | 2 +- .../LoopToStandard/ConvertLoopToStandard.cpp | 2 +- mlir/lib/Conversion/LoopsToGPU/LoopsToGPU.cpp | 2 +- mlir/lib/Conversion/LoopsToGPU/LoopsToGPUPass.cpp | 2 +- .../StandardToLLVM/ConvertStandardToLLVM.cpp | 2 +- .../StandardToSPIRV/ConvertStandardToSPIRV.cpp | 2 +- .../StandardToSPIRV/LegalizeStandardForSPIRV.cpp | 2 +- .../Conversion/StandardToSPIRV/StandardToSPIRV.td | 2 +- .../VectorToLLVM/ConvertVectorToLLVM.cpp | 10 +- mlir/lib/Dialect/AffineOps/AffineOps.cpp | 2 +- mlir/lib/Dialect/AffineOps/EDSC/Builders.cpp | 6 +- .../FxpMathOps/Transforms/LowerUniformRealMath.cpp | 2 +- .../FxpMathOps/Transforms/UniformKernelUtils.h | 6 +- mlir/lib/Dialect/GPU/IR/GPUDialect.cpp | 4 +- .../Dialect/GPU/Transforms/AllReduceLowering.cpp | 2 +- .../lib/Dialect/GPU/Transforms/KernelOutlining.cpp | 2 +- mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp | 70 +- .../Dialect/Linalg/Analysis/DependenceAnalysis.cpp | 2 +- mlir/lib/Dialect/Linalg/IR/LinalgOps.cpp | 4 +- mlir/lib/Dialect/Linalg/Transforms/Promotion.cpp | 2 +- mlir/lib/Dialect/Linalg/Utils/Utils.cpp | 8 +- mlir/lib/Dialect/LoopOps/LoopOps.cpp | 146 ++- .../LoopOps/Transforms/ParallelLoopFusion.cpp | 2 +- .../Dialect/QuantOps/Transforms/ConvertConst.cpp | 2 +- mlir/lib/Dialect/SPIRV/SPIRVLowering.cpp | 11 +- mlir/lib/Dialect/SPIRV/SPIRVOps.cpp | 38 +- .../Dialect/SPIRV/Serialization/Deserializer.cpp | 4 +- mlir/lib/Dialect/SPIRV/TargetAndABI.cpp | 2 +- mlir/lib/Dialect/StandardOps/CMakeLists.txt | 3 +- mlir/lib/Dialect/StandardOps/{ => IR}/Ops.cpp | 319 +---- mlir/lib/Dialect/VectorOps/VectorOps.cpp | 60 +- mlir/lib/Dialect/VectorOps/VectorTransforms.cpp | 2 +- mlir/lib/Dialect/VectorOps/VectorUtils.cpp | 2 +- mlir/lib/IR/AsmPrinter.cpp | 12 +- mlir/lib/IR/Attributes.cpp | 54 +- mlir/lib/IR/Builders.cpp | 18 +- mlir/lib/IR/MLIRContext.cpp | 52 +- mlir/lib/IR/Operation.cpp | 10 +- mlir/lib/IR/StandardTypes.cpp | 71 +- mlir/lib/IR/TypeDetail.h | 47 +- mlir/lib/Parser/Lexer.cpp | 21 +- mlir/lib/Parser/Parser.cpp | 75 +- mlir/lib/Parser/Token.cpp | 15 +- mlir/lib/Parser/Token.h | 5 + mlir/lib/Parser/TokenKinds.def | 2 +- .../lib/Quantizer/Configurations/FxpMathConfig.cpp | 2 +- mlir/lib/TableGen/CMakeLists.txt | 1 + mlir/lib/TableGen/Constraint.cpp | 2 + mlir/lib/TableGen/Operator.cpp | 48 + mlir/lib/TableGen/Successor.cpp | 24 + .../Transforms/AffineLoopInvariantCodeMotion.cpp | 2 +- mlir/lib/Transforms/LoopCoalescing.cpp | 2 +- mlir/lib/Transforms/LoopFusion.cpp | 4 +- mlir/lib/Transforms/MemRefDataFlowOpt.cpp | 2 +- mlir/lib/Transforms/PipelineDataTransfer.cpp | 2 +- mlir/lib/Transforms/Utils/FoldUtils.cpp | 2 +- .../Utils/GreedyPatternRewriteDriver.cpp | 2 +- mlir/lib/Transforms/Utils/LoopFusionUtils.cpp | 2 +- mlir/lib/Transforms/Utils/Utils.cpp | 2 +- mlir/lib/Transforms/Vectorize.cpp | 2 +- mlir/test/Conversion/LoopsToGPU/parallel_loop.mlir | 4 +- .../Conversion/StandardToSPIRV/std-to-spirv.mlir | 38 + mlir/test/Dialect/Linalg/parallel_loops.mlir | 2 +- mlir/test/Dialect/Loops/invalid.mlir | 110 +- mlir/test/Dialect/Loops/ops.mlir | 132 +- mlir/test/Dialect/Loops/parallel-loop-fusion.mlir | 56 +- .../Dialect/SPIRV/Serialization/memory-ops.mlir | 34 + mlir/test/Dialect/SPIRV/control-flow-ops.mlir | 6 +- mlir/test/Examples/Toy/Ch2/codegen.toy | 24 +- mlir/test/Examples/Toy/Ch2/scalar.toy | 8 +- mlir/test/Examples/Toy/Ch3/codegen.toy | 24 +- mlir/test/Examples/Toy/Ch3/scalar.toy | 8 +- mlir/test/Examples/Toy/Ch4/codegen.toy | 24 +- mlir/test/Examples/Toy/Ch4/scalar.toy | 8 +- mlir/test/Examples/Toy/Ch4/shape_inference.mlir | 34 +- mlir/test/Examples/Toy/Ch5/affine-lowering.mlir | 14 +- mlir/test/Examples/Toy/Ch5/codegen.toy | 24 +- mlir/test/Examples/Toy/Ch5/scalar.toy | 8 +- mlir/test/Examples/Toy/Ch5/shape_inference.mlir | 34 +- mlir/test/Examples/Toy/Ch6/affine-lowering.mlir | 14 +- mlir/test/Examples/Toy/Ch6/codegen.toy | 24 +- mlir/test/Examples/Toy/Ch6/llvm-lowering.mlir | 10 +- mlir/test/Examples/Toy/Ch6/scalar.toy | 8 +- mlir/test/Examples/Toy/Ch6/shape_inference.mlir | 34 +- mlir/test/Examples/Toy/Ch7/affine-lowering.mlir | 14 +- mlir/test/Examples/Toy/Ch7/codegen.toy | 24 +- mlir/test/Examples/Toy/Ch7/llvm-lowering.mlir | 10 +- mlir/test/Examples/Toy/Ch7/scalar.toy | 8 +- mlir/test/Examples/Toy/Ch7/shape_inference.mlir | 34 +- mlir/test/Examples/Toy/Ch7/struct-codegen.toy | 30 +- mlir/test/Examples/Toy/Ch7/struct-opt.mlir | 19 +- mlir/test/IR/invalid-ops.mlir | 8 +- mlir/test/IR/invalid.mlir | 25 +- mlir/test/IR/parser.mlir | 6 + .../TestVectorTransformPatterns.td | 2 +- mlir/test/lib/IR/TestMatchers.cpp | 2 +- mlir/test/lib/TestDialect/TestDialect.cpp | 6 +- mlir/test/lib/TestDialect/TestOps.td | 13 +- mlir/test/lib/TestDialect/TestPatterns.cpp | 6 +- mlir/test/lib/Transforms/TestConstantFold.cpp | 2 +- mlir/test/lib/Transforms/TestInlining.cpp | 2 +- mlir/test/lib/Transforms/TestLoopFusion.cpp | 2 +- mlir/test/lib/Transforms/TestMemRefBoundCheck.cpp | 2 +- .../lib/Transforms/TestMemRefDependenceCheck.cpp | 2 +- .../lib/Transforms/TestMemRefStrideCalculation.cpp | 2 +- mlir/test/lib/Transforms/TestOpaqueLoc.cpp | 2 +- mlir/test/lib/Transforms/TestVectorTransforms.cpp | 2 +- mlir/test/mlir-tblgen/op-attribute.td | 4 +- mlir/test/mlir-tblgen/op-format-spec.td | 92 +- mlir/test/mlir-tblgen/op-format.mlir | 19 + mlir/test/mlir-tblgen/predicate.td | 2 +- mlir/tools/mlir-tblgen/OpDefinitionsGen.cpp | 136 +- mlir/tools/mlir-tblgen/OpFormatGen.cpp | 913 ++++++++++---- openmp/runtime/test/lit.cfg | 7 + openmp/runtime/test/ompt/teams/parallel_team.c | 2 +- openmp/runtime/test/ompt/teams/serial_teams.c | 2 +- 461 files changed, 17143 insertions(+), 4430 deletions(-) create mode 100644 clang/include/clang/ASTMatchers/GtestMatchers.h rename clang/lib/AST/Interp/{Block.cpp => InterpBlock.cpp} (98%) rename clang/lib/AST/Interp/{Block.h => InterpBlock.h} (98%) create mode 100644 clang/lib/ASTMatchers/GtestMatchers.cpp delete mode 100644 clang/test/Driver/code-model.c create mode 100644 clang/test/Driver/mcmodel.c create mode 100644 clang/test/Preprocessor/init-aarch64.c create mode 100644 clang/unittests/ASTMatchers/GtestMatchersTest.cpp create mode 100644 libc/docs/fuzzing.rst create mode 100644 libc/fuzzing/CMakeLists.txt create mode 100644 libc/fuzzing/string/CMakeLists.txt create mode 100644 libc/fuzzing/string/strcpy_fuzz.cpp create mode 100644 lld/test/ELF/linkerscript/section-align2.test create mode 100644 lld/test/ELF/shuffle-sections-init-fini.s rename lldb/test/API/commands/platform/process/{ => list}/Makefile (100%) rename lldb/test/API/commands/platform/process/{ => list}/TestProcessList.py (100%) rename lldb/test/API/commands/platform/process/{ => list}/main.cpp (100%) copy lldb/test/API/{api/listeners => functionalities/process_crash_info}/Makefile (100%) create mode 100644 lldb/test/API/functionalities/process_crash_info/TestProcessCra [...] create mode 100644 lldb/test/API/functionalities/process_crash_info/main.c create mode 100644 lldb/test/Shell/SymbolFile/DWARF/dwp-debug-types.s create mode 100644 lldb/test/Shell/VSCode/TestOptions.test create mode 100644 lldb/tools/lldb-vscode/Options.td create mode 100644 llvm/lib/BinaryFormat/MachO.cpp create mode 100644 llvm/test/Analysis/CostModel/SystemZ/oldarch-vectors.ll create mode 100644 llvm/test/Analysis/MemoryDependenceAnalysis/memdep_with_tbaa.ll create mode 100644 llvm/test/CodeGen/AArch64/sve-intrinsics-contiguous-prefetches.ll create mode 100644 llvm/test/CodeGen/AArch64/sve-intrinsics-fp-arith-merging.ll create mode 100644 llvm/test/CodeGen/AArch64/sve-pred-contiguous-ldst-addressing-m [...] create mode 100644 llvm/test/CodeGen/AArch64/sve-pred-contiguous-ldst-addressing-m [...] create mode 100644 llvm/test/CodeGen/AArch64/sve-pred-non-temporal-ldst-addressing [...] create mode 100644 llvm/test/CodeGen/AArch64/sve-pred-non-temporal-ldst-addressing [...] create mode 100644 llvm/test/CodeGen/AArch64/sve-vscale-combine.ll create mode 100644 llvm/test/CodeGen/AArch64/sve2-bitwise-ternary.ll create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/fmul.v2f16.ll create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/fpow.ll create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fmul.v2s16.mir create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-shuffle-vector. [...] create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.fdot2.ll create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.fmul.legacy.ll create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.sdot2.ll create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.sdot4.ll create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.sdot8.ll create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.udot2.ll create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.udot4.ll create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.udot8.ll create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/xnor.ll create mode 100644 llvm/test/CodeGen/Hexagon/autohvx/vector-predicate-typecast.ll create mode 100644 llvm/test/CodeGen/PowerPC/vrsave-inline-asm.ll create mode 100644 llvm/test/MC/ELF/section-entsize-changed.s create mode 100644 llvm/test/MC/ELF/section-flags-changed.s create mode 100644 llvm/test/MC/ELF/section-type-changed.s create mode 100644 llvm/test/Other/cfg_deopt_unreach.ll create mode 100644 llvm/test/Transforms/DeadStoreElimination/MSSA/debug-counter.ll copy llvm/test/{CodeGen => Transforms/InstCombine}/Hexagon/lit.local.cfg (100%) create mode 100644 llvm/test/Transforms/InstCombine/Hexagon/simplify-hvx-qvq.ll create mode 100644 llvm/test/tools/llvm-objdump/X86/source-interleave-function-fro [...] copy mlir/include/mlir/Dialect/StandardOps/{ => IR}/CMakeLists.txt (100%) rename mlir/include/mlir/Dialect/StandardOps/{ => IR}/Ops.h (98%) rename mlir/include/mlir/Dialect/StandardOps/{ => IR}/Ops.td (96%) create mode 100644 mlir/include/mlir/TableGen/Successor.h rename mlir/lib/Dialect/StandardOps/{ => IR}/Ops.cpp (89%) create mode 100644 mlir/lib/TableGen/Successor.cpp