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from 155b8551 [LV] Generate both scalar and vector integer induction variables new 31c3e4f [GlobalISel] Add RegBankSelected MachineFunction property. new 1f82c34 [GlobalISel] Verify RegBankSelected MF property. new 7abac75 [GlobalISel] Set and require RegBankSelected MF property. new e2e5c07 [LVI] NFC. Sink a condition type check from the caller down t [...]

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Summary of changes: .../llvm/CodeGen/GlobalISel/InstructionSelect.h | 3 +- include/llvm/CodeGen/GlobalISel/RegBankSelect.h | 5 ++ include/llvm/CodeGen/MIRYamlMapping.h | 2 + include/llvm/CodeGen/MachineFunction.h | 3 + lib/Analysis/LazyValueInfo.cpp | 64 +++++++++++----------- lib/CodeGen/MIRParser/MIRParser.cpp | 3 + lib/CodeGen/MIRPrinter.cpp | 2 + lib/CodeGen/MachineFunction.cpp | 3 + lib/CodeGen/MachineVerifier.cpp | 18 +++++- .../AArch64/GlobalISel/arm64-instructionselect.mir | 15 +++++ .../AArch64/GlobalISel/arm64-regbankselect.mir | 16 ++++++ .../AArch64/GlobalISel/verify-regbankselected.mir | 21 +++++++ .../CodeGen/MIR/Generic/global-isel-properties.mir | 3 + 13 files changed, 125 insertions(+), 33 deletions(-) create mode 100644 test/CodeGen/AArch64/GlobalISel/verify-regbankselected.mir