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from 01cadc5 Tweak the pipeline model for Exynos M1 new 7ef15dd PR target/69810 * config/rs6000/rs6000.md (zero_extendqi<mode [...]

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Summary of changes: gcc/ChangeLog | 9 +++++++++ gcc/config/rs6000/rs6000.md | 44 ++++++++------------------------------------ 2 files changed, 17 insertions(+), 36 deletions(-)