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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-lts-allyesconfig in repository toolchain/ci/llvm-monorepo.

from 762612de08d [NFC] Add utility function for SafetyInfo updates for moveBefore adds 1b48fc32b48 [XRay] Improve FDR trace handling and error messaging adds 140e7074de0 [XRay] Add atomic fences around non-atomic reads and writes adds 21c99463a84 [XRay] Fix enter function tracing for record unwriting adds 174721be954 [XRay] Add a static assertion on size of metadata payload (NFC) adds 988a47c487d [XRay] Add a test for function id encoding/decoding (NFC) adds 723e2c61d29 [lldb] Fix signature in test to match rL346453 adds ea430d2cf42 [ARM] Small reorganisation in ARMParallelDSP adds e14abd1b6a0 [ARM] Enable mixed types in ARM CGP adds 7c53e8aa88e [DebugInfo][Dexter] Unreachable line stepped onto after Sim [...] adds cedab8cbffc [X86] Fix VZEROUPPER scheduling info on SNB,HSW,BDW,SXL,SKX. adds 010a2a8a26e [CallSiteSplitting] Only record conditions up to the IDom(c [...] adds b66005f1065 [SelectionDAG] swap select_cc operands to enable folding adds 087fab3f498 [Tooling] Avoid diagnosing missing input files in an edge-c [...] adds f1c1b8c9688 [IPSCCP,PM] Preserve DT in the new pass manager. adds 68344e23d89 [llvm-mca] Use a small vector for instructions in the EntryStage. adds 716b2769ac7 [clangd] Make TestTU build with preamble, and fix the fallout. adds 5d6bfdd9fe9 [llvm-exegesis][NFC] Add a way to declare the default count [...] adds 2bde1dbc44d [X86] Add Subtarget to more lowerVectorShuffle functions. NFCI. adds 24ffd701f13 [clang-cl] Add warning for /Zc:dllexportInlines- when the f [...] adds bc2f97c6b6b Revert r346483: [CallSiteSplitting] Only record conditions [...] adds 7274f3cfc08 [llvm-exegesis] Fix unit tests on PowerPC/AArch64. adds 1147f735880 [Hexagon] Handle Hexagon's SHF_HEX_GPREL section flag adds e7fd729d38d [MIPS GlobalISel] narrowScalar G_CONSTANT adds a18f367e343 [RISCV] Update test/CodeGen/RISCV/calling-conv.ll after rL346432 adds c5fe2c0b4eb [RISCV] Avoid unnecessary XOR for seteq/setne 0 adds 8525790ec6b [x86] try to form broadcast before widening shuffle elements adds 3667f05fa1a [ARM] Don't promote i1 types in ARM CGP adds b7e9ec5f693 Revert "[VFS] Add "expand tilde" argument to getRealPath." adds 99af66aa4fb AMDGPU: Add testcase to demonstrate a condition with pre-ex [...] adds 76adc99d6c4 revert rL346478 adds 96bb3a56db9 [clangd] Don't treat top-level decls as "local" if they are [...] adds 16a498d61ac [SystemZ] Avoid inserting same value after replication adds b9b243759dd Resubmit "Fix bug in PE/COFF plugin." adds b89cbe785b3 [llvm-cov] Add lcov tracefile export format. adds 77670ca7069 [OPENMP][NVPTX]Allow to use shared memory for the target|te [...] adds 9457816f3cc Revert "[DEBUGINFO, NVPTX]DO not emit ',debug' option if no [...] adds e4464af240e [docs][statepoint] tweak a title adds ebb4aeb0d75 [CostModel] Add SK_ExtractSubvector handling to getInstruct [...] adds ee314e0d62f [NativePDB] Add support for bitfield records. adds e41c9b1e152 [Power9] Allow gpr callee saved spills in prologue to vecto [...] adds 7285ad9fb95 [docs][statepoint] Expand a bit on problems with mixing ref [...] adds 0546dc6976a [llvm-cov] Remove "default:" label in the switch covering a [...] adds fe7b75e5bf2 Fix -Wsign-compare warning adds ec144f39442 [WebAssembly] Respect `--no-mangle` in more locations adds 034461b4a7e [NativePDB] Fix completion of enum types. adds 490ddc5b44e [docs][statepoints] Reformulate open issues list adds 7634123d275 Annotate switch with LLVM_FALLTHROUGH adds dab692c9913 Use the correct address space when emitting the ctor function list adds 18fccafbec7 Introduce the _Clang scoped attribute token. adds 0a3951c61c7 Type safe version of MachinePassRegistry adds f58624d66ad [Hexagon] Place globals with explicit .sdata section in small data adds dfce0f047ab [clangd] Fix clang-tidy warnings. adds f6fc66cd0f7 Add missing include adds eb8082a6988 Driver: Make -fsanitize=shadow-call-stack compatible with - [...] adds 6f30daf8a99 Add missing include adds 7b03fd136fc [AMDGPU] Always pass TRI into findRegister[Use/Def]OperandIdx adds 5852473383e [llvm-strings] Fix whitespaces to match strings output. adds 0145d4376fa [DAGCombiner][X86][Mips] Enable combineShuffleOfScalars to [...] adds 4a07891c955 Add total function byte size and inline function byte size [...] adds 7e4949b3d3a [Hexagon] Implement noreturn optimization adds a29648c8329 [AMDGPU] Cleanup optimize-if-exec-masking.mir test. NFC. adds 046667c9fa8 [TTI] Flip vector types in getShuffleCost SK_ExtractSubvector call adds f3b8cad9b1f [WebAssembly] Hotfix of WebAssemblyInstructionTableSize aft [...] adds 5c069385a7d [HIP] Remove useless sections in linked files adds f3080e73205 [Hexagon] Fix unused variable warning in release builds adds 27669fe71a8 [CostModel][X86] SK_ExtractSubvector is free if the subvect [...] adds 4254aa24dac [X86] Turn X86ISD::VSEXT into X86ISD::VZEXT if the upper bi [...] adds 4b007fcc9d2 [DWARFv5] Emit normal type units in .debug_info comdats. adds 83e11b3b674 [SystemZ] Add a couple of missing tests adds d6b53d87e36 Fix a nondeterminism in the debug info for VLA size expressions. adds df031b62c19 [Hexagon] Fix some -Wunused-function with LLVM_DUMP_METHOD [...] adds 28c365d873b [MS demangler] Use a slightly shorter unmangling for mangle [...] adds 767d9b163ea [llvm-mca] Account for buffered resources when analyzing "S [...] adds 7f0e49005c6 [AArch64] Support HiSilicon's TSV110 processor adds bf59dc76a80 Allow a double-underscore spelling of Clang attributes usin [...] adds 347e4d14c2c Use the correct address space when bitcasting func pointer [...] adds 16e925a7ecb Revert rL346454: Fix a use-after-free introduced by r344915. adds c669678c1f6 Branch/tag all projects with a single commit in release-tag [...] adds e053b4ae068 [OPENMP][NVPTX]Extend number of constructs executed in SPMD mode. adds 0c5dd9671de [X86] Move the promotion of v16i16->v16i8 for avx512f but n [...] adds 8162d499679 Remove llvm include from debugserver, change LLVM_FALLTHROU [...] adds 0d8dd3d3dc8 [ASTMatchers] overload ignoringParens for Expr adds 8c4fcc6dd9f [clang-tidy] fix PR39583 - ignoring ParenCast for string-li [...] adds 0b2715ed4c1 Revert "Revert rL346454: Fix a use-after-free introduced by [...] adds a08bdc97843 [hwasan] Add entire report to abort message on Android. adds 163b3844160 [WebAssembly] Disable custom NaN payload tests adds 1f69b414ec1 Revert "Exclude wasm target from Windows packaging due to PR39448" adds 9533708db1a Re-land r343606 "[winasan] Unpoison the stack in NtTerminat [...] adds bf31a8e1a73 Work with a gdb-remote target that doesn't handle the qWatc [...] adds 9f5373361af [JumpThreading] Fix exponential time algorithm computing kn [...] adds a55948126a1 [ARM] Add MemOperand to LDRcp to enable DCE. adds d2e172a9e3c [SelectionDAG] Fix a -Wparentheses warning from gcc in an a [...] adds 77048c71df1 [AVR] Reorder the CHECK lines in directmem.ll to match curr [...] adds ad0100b498b Fix ClangFormat issue of recognizing ObjC subscript as C++ [...] adds c36087f929e [libcxx] Provide thread annotations for shared_mutex adds 17b8def7673 [ARM64] [Windows] Handle funclets adds 460d692a102 [GC] Simplify linking of GC builtin GC strategies adds b7c98df1d3d [WebAssembly] Update bleeding-edge cpu features adds b3428b42447 Enable listening for EXC_RESOURCE events, and format mach e [...] adds b19b35e4f69 Add extra diagnostics to test adds 62c644e4ac5 Unbreak the linux bot from the previous commit. Fred neede [...] adds 5d6ad16de04 [X86] In LowerHorizontalByteSum, emit vector_shuffle nodes [...] adds fd50d05d355 test/CodeGen/X86: Relax test case adds b91a72edc92 RegAllocFast: Further cleanups; NFC adds dcad980da5b Fix DragonFlyBSD build adds 6a887d2c52a [PDB] Simplify some ghash code, NFC adds 3bfaaaca6c3 Correct atexit(3) support in MSan/NetBSD new d4c06f47753 [X86] Add a test case to show scalarized vector srem to dem [...] new 3cc927bed99 [X86] Use a MOVSX instruction instead of a MOVZX instructio [...]

The 2 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference.

Summary of changes: .../ProBoundsArrayToPointerDecayCheck.cpp | 9 +- clang-tools-extra/clangd/AST.cpp | 11 +- clang-tools-extra/clangd/ClangdUnit.cpp | 3 + ...uidelines-pro-bounds-array-to-pointer-decay.cpp | 4 + .../unittests/clangd/ClangdUnitTests.cpp | 22 + .../unittests/clangd/QualityTests.cpp | 38 +- .../unittests/clangd/SymbolCollectorTests.cpp | 22 +- clang-tools-extra/unittests/clangd/TestTU.cpp | 36 +- clang-tools-extra/unittests/clangd/TestTU.h | 10 +- clang/docs/LibASTMatchersReference.html | 11 + clang/include/clang/ASTMatchers/ASTMatchers.h | 21 +- clang/include/clang/Basic/DiagnosticDriverKinds.td | 4 + clang/include/clang/Basic/DiagnosticParseKinds.td | 3 + clang/lib/ASTMatchers/Dynamic/Registry.cpp | 2 +- clang/lib/Basic/Attributes.cpp | 22 +- clang/lib/CodeGen/CGDecl.cpp | 17 +- clang/lib/CodeGen/CGException.cpp | 6 +- clang/lib/CodeGen/CGOpenMPRuntimeNVPTX.cpp | 260 +++++--- clang/lib/CodeGen/CGOpenMPRuntimeNVPTX.h | 6 +- clang/lib/CodeGen/CodeGenFunction.h | 2 + clang/lib/CodeGen/CodeGenModule.cpp | 5 +- clang/lib/Driver/SanitizerArgs.cpp | 2 +- clang/lib/Driver/ToolChains/CommonArgs.cpp | 4 + clang/lib/Driver/ToolChains/MSVC.cpp | 6 + clang/lib/Format/TokenAnnotator.cpp | 3 +- clang/lib/Parse/ParseDeclCXX.cpp | 44 +- clang/lib/Sema/ParsedAttr.cpp | 25 +- clang/lib/Tooling/Tooling.cpp | 6 + clang/test/CodeGen/debug-info-vla.c | 4 +- clang/test/CodeGen/ubsan-debuglog-return.c | 2 +- clang/test/CodeGenCXX/debug-info-vla.cpp | 2 +- clang/test/Driver/cl-options.c | 2 + clang/test/Driver/fsanitize.c | 4 + clang/test/FixIt/fixit-cxx11-attributes.cpp | 3 + clang/test/OpenMP/nvptx_SPMD_codegen.cpp | 13 +- clang/test/OpenMP/nvptx_data_sharing.cpp | 11 +- ...tx_distribute_parallel_generic_mode_codegen.cpp | 8 +- clang/test/OpenMP/nvptx_parallel_codegen.cpp | 11 +- clang/test/OpenMP/nvptx_parallel_for_codegen.cpp | 11 +- .../test/OpenMP/nvptx_target_parallel_codegen.cpp | 4 +- .../nvptx_target_parallel_proc_bind_codegen.cpp | 6 +- .../nvptx_target_parallel_reduction_codegen.cpp | 6 +- clang/test/OpenMP/nvptx_target_teams_codegen.cpp | 2 +- ...arget_teams_distribute_parallel_for_codegen.cpp | 11 +- ..._teams_distribute_parallel_for_simd_codegen.cpp | 11 +- clang/test/OpenMP/nvptx_teams_codegen.cpp | 26 +- clang/test/Parser/cxx0x-attributes.cpp | 8 + clang/test/Preprocessor/has_attribute.cpp | 38 +- clang/test/SemaCXX/attr-optnone.cpp | 8 + clang/test/SemaCXX/switch-implicit-fallthrough.cpp | 15 + .../unittests/ASTMatchers/ASTMatchersNodeTest.cpp | 8 + clang/unittests/Format/FormatTest.cpp | 2 + compiler-rt/lib/asan/asan_win.cc | 12 +- compiler-rt/lib/hwasan/hwasan.cc | 1 + compiler-rt/lib/hwasan/hwasan.h | 2 + compiler-rt/lib/hwasan/hwasan_linux.cc | 7 +- compiler-rt/lib/hwasan/hwasan_report.cc | 51 +- compiler-rt/lib/hwasan/hwasan_report.h | 2 +- compiler-rt/lib/msan/msan_interceptors.cc | 68 +- .../lib/xray/tests/unit/fdr_controller_test.cc | 87 +++ compiler-rt/lib/xray/xray_fdr_controller.h | 15 +- compiler-rt/lib/xray/xray_fdr_log_writer.h | 65 ++ compiler-rt/lib/xray/xray_fdr_logging.cc | 7 + .../test/asan/TestCases/Windows/dll_host.cc | 1 + .../test/hwasan/TestCases/abort-message-android.cc | 28 + libcxx/include/shared_mutex | 15 +- lld/COFF/PDB.cpp | 38 +- lld/test/wasm/cxx-mangling.ll | 10 +- lld/wasm/Driver.cpp | 6 +- lld/wasm/Symbols.cpp | 8 +- lld/wasm/Symbols.h | 1 + lld/wasm/Writer.cpp | 6 +- .../SymbolFile/NativePDB/Inputs/bitfields.lldbinit | 5 + .../NativePDB/Inputs/globals-bss.lldbinit | 3 + .../SymbolFile/NativePDB/ast-reconstruction.cpp | 15 +- lldb/lit/SymbolFile/NativePDB/bitfields.cpp | 61 ++ lldb/lit/SymbolFile/NativePDB/globals-bss.cpp | 35 + .../test/functionalities/exec/TestExec.py | 4 + .../TestNoWatchpointSupportInfo.py | 64 ++ .../Plugins/ObjectFile/PECOFF/ObjectFilePECOFF.cpp | 6 +- .../Process/Utility/StopInfoMachException.cpp | 51 ++ .../gdb-remote/GDBRemoteCommunicationClient.cpp | 5 + .../SymbolFile/NativePDB/SymbolFileNativePDB.cpp | 1 + .../SymbolFile/NativePDB/UdtRecordCompleter.cpp | 24 +- lldb/source/Target/Target.cpp | 10 +- lldb/tools/debugserver/source/DNBRegisterInfo.cpp | 1 + .../debugserver/source/MacOSX/MachException.cpp | 55 +- lldb/tools/debugserver/source/RNBRemote.cpp | 4 +- llvm/docs/CommandGuide/llvm-cov.rst | 22 +- llvm/docs/ReleaseNotes.rst | 3 +- llvm/docs/Statepoints.rst | 104 +-- llvm/include/llvm/CodeGen/GCs.h | 18 +- .../llvm/CodeGen/LinkAllCodegenComponents.h | 6 +- llvm/include/llvm/CodeGen/MachineFrameInfo.h | 29 +- llvm/include/llvm/CodeGen/MachinePassRegistry.h | 80 ++- llvm/include/llvm/CodeGen/MachineScheduler.h | 10 +- llvm/include/llvm/CodeGen/RegAllocRegistry.h | 16 +- llvm/include/llvm/CodeGen/SchedulerRegistry.h | 13 +- llvm/include/llvm/IR/Instruction.h | 8 + llvm/include/llvm/IR/Instructions.h | 19 + llvm/include/llvm/MC/MCObjectFileInfo.h | 8 +- llvm/include/llvm/Support/AArch64TargetParser.def | 3 + llvm/include/llvm/Support/VirtualFileSystem.h | 17 +- llvm/include/llvm/Target/TargetPfmCounters.td | 4 + .../include/llvm/Transforms/Scalar/JumpThreading.h | 25 +- llvm/include/llvm/Transforms/Scalar/SCCP.h | 11 +- llvm/include/llvm/XRay/FDRRecordProducer.h | 5 + llvm/include/llvm/XRay/FDRRecords.h | 234 +++++-- llvm/lib/Analysis/TargetTransformInfo.cpp | 10 +- llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp | 7 +- llvm/lib/CodeGen/BuiltinGCs.cpp | 8 +- llvm/lib/CodeGen/MIRPrinter.cpp | 26 +- llvm/lib/CodeGen/MachinePassRegistry.cpp | 38 -- llvm/lib/CodeGen/MachineScheduler.cpp | 3 +- llvm/lib/CodeGen/PrologEpilogInserter.cpp | 28 + llvm/lib/CodeGen/RegAllocFast.cpp | 427 ++++++------ llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 73 +- llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 4 +- llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp | 3 +- llvm/lib/CodeGen/TargetPassConfig.cpp | 3 +- llvm/lib/Demangle/MicrosoftDemangleNodes.cpp | 9 +- llvm/lib/IR/Instruction.cpp | 7 + llvm/lib/IR/Instructions.cpp | 29 + llvm/lib/MC/MCObjectFileInfo.cpp | 9 +- llvm/lib/MC/MCParser/ELFAsmParser.cpp | 3 + llvm/lib/MC/MCSectionELF.cpp | 3 + llvm/lib/Support/Host.cpp | 11 + llvm/lib/Support/Unix/Path.inc | 4 +- llvm/lib/Support/VirtualFileSystem.cpp | 27 +- llvm/lib/Target/AArch64/AArch64.td | 23 + llvm/lib/Target/AArch64/AArch64FrameLowering.cpp | 147 +++- llvm/lib/Target/AArch64/AArch64FrameLowering.h | 11 + llvm/lib/Target/AArch64/AArch64ISelLowering.cpp | 24 + llvm/lib/Target/AArch64/AArch64ISelLowering.h | 8 + llvm/lib/Target/AArch64/AArch64InstrInfo.cpp | 30 +- llvm/lib/Target/AArch64/AArch64InstrInfo.td | 14 + llvm/lib/Target/AArch64/AArch64MCInstLower.cpp | 13 + llvm/lib/Target/AArch64/AArch64PfmCounters.td | 19 + llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp | 13 +- llvm/lib/Target/AArch64/AArch64RegisterInfo.h | 3 + llvm/lib/Target/AArch64/AArch64Subtarget.cpp | 5 + llvm/lib/Target/AArch64/AArch64Subtarget.h | 3 +- llvm/lib/Target/AArch64/CMakeLists.txt | 1 + llvm/lib/Target/AMDGPU/AMDGPUMacroFusion.cpp | 5 +- llvm/lib/Target/AMDGPU/R600EmitClauseMarkers.cpp | 4 +- llvm/lib/Target/AMDGPU/R600InstrInfo.cpp | 4 +- llvm/lib/Target/AMDGPU/SIInstrInfo.cpp | 4 +- llvm/lib/Target/ARM/ARMCodeGenPrepare.cpp | 136 ++-- llvm/lib/Target/ARM/ARMFastISel.cpp | 7 +- llvm/lib/Target/ARM/ARMParallelDSP.cpp | 275 ++++---- llvm/lib/Target/Hexagon/Hexagon.td | 3 + llvm/lib/Target/Hexagon/HexagonFrameLowering.cpp | 33 +- llvm/lib/Target/Hexagon/HexagonFrameLowering.h | 2 + llvm/lib/Target/Hexagon/HexagonISelDAGToDAGHVX.cpp | 11 +- llvm/lib/Target/Hexagon/HexagonSubtarget.h | 3 + .../lib/Target/Hexagon/HexagonTargetObjectFile.cpp | 15 +- llvm/lib/Target/Mips/MipsLegalizerInfo.cpp | 24 +- .../NVPTX/MCTargetDesc/NVPTXTargetStreamer.cpp | 10 +- .../NVPTX/MCTargetDesc/NVPTXTargetStreamer.h | 3 - llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp | 21 +- llvm/lib/Target/PowerPC/CMakeLists.txt | 1 + llvm/lib/Target/PowerPC/PPC.td | 18 +- llvm/lib/Target/PowerPC/PPCFrameLowering.cpp | 139 +++- llvm/lib/Target/PowerPC/PPCFrameLowering.h | 7 + llvm/lib/Target/PowerPC/PPCPfmCounters.td | 19 + llvm/lib/Target/RISCV/RISCVInstrInfo.td | 2 + llvm/lib/Target/SystemZ/SystemZISelLowering.cpp | 4 +- .../Disassembler/WebAssemblyDisassembler.cpp | 2 + llvm/lib/Target/WebAssembly/WebAssembly.td | 3 +- llvm/lib/Target/X86/X86ISelLowering.cpp | 92 ++- llvm/lib/Target/X86/X86InstrAVX512.td | 12 + llvm/lib/Target/X86/X86InstrCompiler.td | 9 + llvm/lib/Target/X86/X86PfmCounters.td | 4 + llvm/lib/Target/X86/X86SchedBroadwell.td | 6 +- llvm/lib/Target/X86/X86SchedHaswell.td | 6 +- llvm/lib/Target/X86/X86SchedSandyBridge.td | 7 + llvm/lib/Target/X86/X86SchedSkylakeClient.td | 6 +- llvm/lib/Target/X86/X86SchedSkylakeServer.td | 6 +- llvm/lib/Target/X86/X86TargetTransformInfo.cpp | 368 +++++----- llvm/lib/Transforms/IPO/SCCP.cpp | 35 +- llvm/lib/Transforms/Scalar/JumpThreading.cpp | 37 +- llvm/lib/Transforms/Scalar/SCCP.cpp | 65 +- llvm/lib/Transforms/Utils/SimplifyCFG.cpp | 16 + llvm/lib/XRay/FDRRecordProducer.cpp | 117 +++- llvm/lib/XRay/FDRRecords.cpp | 34 + llvm/lib/XRay/FDRTraceWriter.cpp | 6 +- llvm/lib/XRay/RecordInitializer.cpp | 54 +- llvm/test/Analysis/CostModel/X86/reduce-add.ll | 94 +-- llvm/test/Analysis/CostModel/X86/reduce-and.ll | 144 ++-- llvm/test/Analysis/CostModel/X86/reduce-mul.ll | 124 ++-- llvm/test/Analysis/CostModel/X86/reduce-or.ll | 144 ++-- llvm/test/Analysis/CostModel/X86/reduce-smax.ll | 70 +- llvm/test/Analysis/CostModel/X86/reduce-smin.ll | 70 +- llvm/test/Analysis/CostModel/X86/reduce-umax.ll | 70 +- llvm/test/Analysis/CostModel/X86/reduce-umin.ll | 70 +- llvm/test/Analysis/CostModel/X86/reduce-xor.ll | 144 ++-- llvm/test/Analysis/CostModel/X86/reduction.ll | 36 +- .../CostModel/X86/shuffle-extract_subvector.ll | 128 ++-- llvm/test/CodeGen/AArch64/cpus.ll | 1 + llvm/test/CodeGen/AArch64/remat.ll | 1 + llvm/test/CodeGen/AArch64/select_cc.ll | 54 ++ .../test/CodeGen/AArch64/wineh-try-catch-nobase.ll | 49 ++ .../CodeGen/AArch64/wineh-try-catch-realign.ll | 59 ++ llvm/test/CodeGen/AArch64/wineh-try-catch-vla.ll | 52 ++ llvm/test/CodeGen/AArch64/wineh-try-catch.ll | 197 ++++++ .../CodeGen/AMDGPU/optimize-if-exec-masking.mir | 314 ++------- llvm/test/CodeGen/AMDGPU/waitcnt-preexisting.mir | 36 + llvm/test/CodeGen/ARM/CGP/arm-cgp-calls.ll | 29 +- llvm/test/CodeGen/ARM/CGP/arm-cgp-casts.ll | 242 ++++++- llvm/test/CodeGen/ARM/CGP/arm-cgp-signed-icmps.ll | 7 +- llvm/test/CodeGen/ARM/ldrcppic.ll | 56 ++ llvm/test/CodeGen/AVR/directmem.ll | 33 +- llvm/test/CodeGen/Hexagon/noreturn-stack-elim.ll | 94 +++ .../test/CodeGen/Hexagon/sdata-explicit-section.ll | 6 + .../test/CodeGen/MIR/PowerPC/prolog_vec_spills.mir | 62 ++ llvm/test/CodeGen/Mips/cconv/vector.ll | 121 ++-- llvm/test/CodeGen/RISCV/calling-conv.ll | 24 +- llvm/test/CodeGen/RISCV/fp128.ll | 1 - llvm/test/CodeGen/RISCV/get-setcc-result-type.ll | 4 - llvm/test/CodeGen/RISCV/i32-icmp.ll | 20 + .../RISCV/umulo-128-legalisation-lowering.ll | 196 +++--- llvm/test/CodeGen/SystemZ/fp-round-01.ll | 65 +- llvm/test/CodeGen/SystemZ/vec-move-19.ll | 20 + llvm/test/CodeGen/Thumb/branchless-cmp.ll | 16 +- llvm/test/CodeGen/WebAssembly/immediates.ll | 34 +- .../X86/2009-04-12-FastIselOverflowCrash.ll | 10 +- llvm/test/CodeGen/X86/avx-schedule.ll | 84 +-- llvm/test/CodeGen/X86/avx2-schedule.ll | 40 +- llvm/test/CodeGen/X86/avx512-ext.ll | 96 +-- llvm/test/CodeGen/X86/avx512-fma.ll | 40 +- llvm/test/CodeGen/X86/avx512-insert-extract.ll | 44 +- llvm/test/CodeGen/X86/avx512-mask-op.ll | 64 +- llvm/test/CodeGen/X86/avx512-masked-memop-64-32.ll | 14 +- llvm/test/CodeGen/X86/avx512-schedule.ll | 140 ++-- llvm/test/CodeGen/X86/avx512-select.ll | 8 +- llvm/test/CodeGen/X86/avx512-trunc.ll | 26 +- llvm/test/CodeGen/X86/avx512-vec-cmp.ll | 3 +- llvm/test/CodeGen/X86/avx512vpopcntdq-schedule.ll | 8 +- llvm/test/CodeGen/X86/compress_expand.ll | 10 +- llvm/test/CodeGen/X86/dwarf-headers.ll | 12 +- llvm/test/CodeGen/X86/f16c-schedule.ll | 10 +- llvm/test/CodeGen/X86/fma-schedule.ll | 120 ++-- llvm/test/CodeGen/X86/fma4-schedule.ll | 24 +- llvm/test/CodeGen/X86/haddsub-undef.ll | 4 +- .../CodeGen/X86/insert-into-constant-vector.ll | 30 +- llvm/test/CodeGen/X86/known-signbits-vector.ll | 7 +- llvm/test/CodeGen/X86/masked_gather_scatter.ll | 64 +- llvm/test/CodeGen/X86/masked_memop.ll | 6 +- llvm/test/CodeGen/X86/pmul.ll | 32 +- llvm/test/CodeGen/X86/pr39187-g.ll | 121 ++++ .../test/CodeGen/X86/prefer-avx256-mask-shuffle.ll | 8 +- llvm/test/CodeGen/X86/prefer-avx256-trunc.ll | 2 +- llvm/test/CodeGen/X86/setcc-lowering.ll | 2 +- .../test/CodeGen/X86/shuffle-of-splat-multiuses.ll | 6 +- llvm/test/CodeGen/X86/shuffle-vs-trunc-256.ll | 4 +- llvm/test/CodeGen/X86/shuffle-vs-trunc-512.ll | 8 +- llvm/test/CodeGen/X86/vec_cast.ll | 34 +- llvm/test/CodeGen/X86/vec_int_to_fp.ll | 38 +- llvm/test/CodeGen/X86/vector-compare-results.ll | 28 +- llvm/test/CodeGen/X86/vector-idiv-sdiv-128.ll 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