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from 5672fe9da4a AVR cc0 conversion - adjust peepholes new f546e0d3d03 aarch64: Use RTL builtins for vmull[_high]_p8 intrinsics new 60518e64732 aarch64: Use RTL builtins for FP ml[as]_n intrinsics new b0d9aac8992 aarch64: Use RTL builtins for FP ml[as] intrinsics new 1baf4ed8786 aarch64: Use RTL builtins for FP ml[as][q]_lane intrinsics new d388179a798 aarch64: Use RTL builtins for FP ml[as][q]_laneq intrinsics new d8d291f3367 testsuite: aarch64: Add fusion tests for FP vml[as] intrinsics

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Summary of changes: gcc/config/aarch64/aarch64-simd-builtins.def | 11 + gcc/config/aarch64/aarch64-simd.md | 230 +++++++++++++++++++-- gcc/config/aarch64/arm_neon.h | 80 +++---- gcc/config/aarch64/iterators.md | 1 + .../advsimd-intrinsics/vmla_float_not_fused.c | 67 ++++++ .../advsimd-intrinsics/vmls_float_not_fused.c | 67 ++++++ 6 files changed, 385 insertions(+), 71 deletions(-) create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmla_float_ [...] create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmls_float_ [...]